128d6ccceSTvrtko Ursulin /*
228d6ccceSTvrtko Ursulin * SPDX-License-Identifier: MIT
328d6ccceSTvrtko Ursulin *
428d6ccceSTvrtko Ursulin * Copyright © 2018 Intel Corporation
528d6ccceSTvrtko Ursulin */
628d6ccceSTvrtko Ursulin
728d6ccceSTvrtko Ursulin #include "igt_reset.h"
828d6ccceSTvrtko Ursulin
9112ed2d3SChris Wilson #include "gt/intel_engine.h"
10cb823ed9SChris Wilson #include "gt/intel_gt.h"
11112ed2d3SChris Wilson
1228d6ccceSTvrtko Ursulin #include "../i915_drv.h"
1328d6ccceSTvrtko Ursulin
igt_global_reset_lock(struct intel_gt * gt)14cb823ed9SChris Wilson void igt_global_reset_lock(struct intel_gt *gt)
1528d6ccceSTvrtko Ursulin {
1628d6ccceSTvrtko Ursulin struct intel_engine_cs *engine;
1728d6ccceSTvrtko Ursulin enum intel_engine_id id;
1828d6ccceSTvrtko Ursulin
19cb823ed9SChris Wilson pr_debug("%s: current gpu_error=%08lx\n", __func__, gt->reset.flags);
2028d6ccceSTvrtko Ursulin
21cb823ed9SChris Wilson while (test_and_set_bit(I915_RESET_BACKOFF, >->reset.flags))
22cb823ed9SChris Wilson wait_event(gt->reset.queue,
23cb823ed9SChris Wilson !test_bit(I915_RESET_BACKOFF, >->reset.flags));
2428d6ccceSTvrtko Ursulin
255d904e3cSTvrtko Ursulin for_each_engine(engine, gt, id) {
2628d6ccceSTvrtko Ursulin while (test_and_set_bit(I915_RESET_ENGINE + id,
27cb823ed9SChris Wilson >->reset.flags))
28cb823ed9SChris Wilson wait_on_bit(>->reset.flags, I915_RESET_ENGINE + id,
2928d6ccceSTvrtko Ursulin TASK_UNINTERRUPTIBLE);
3028d6ccceSTvrtko Ursulin }
3128d6ccceSTvrtko Ursulin }
3228d6ccceSTvrtko Ursulin
igt_global_reset_unlock(struct intel_gt * gt)33cb823ed9SChris Wilson void igt_global_reset_unlock(struct intel_gt *gt)
3428d6ccceSTvrtko Ursulin {
3528d6ccceSTvrtko Ursulin struct intel_engine_cs *engine;
3628d6ccceSTvrtko Ursulin enum intel_engine_id id;
3728d6ccceSTvrtko Ursulin
385d904e3cSTvrtko Ursulin for_each_engine(engine, gt, id)
39*9030e39cSThomas Hellström clear_and_wake_up_bit(I915_RESET_ENGINE + id, >->reset.flags);
4028d6ccceSTvrtko Ursulin
41cb823ed9SChris Wilson clear_bit(I915_RESET_BACKOFF, >->reset.flags);
42cb823ed9SChris Wilson wake_up_all(>->reset.queue);
4328d6ccceSTvrtko Ursulin }
44f6470c9bSMichal Wajdeczko
igt_force_reset(struct intel_gt * gt)45cb823ed9SChris Wilson bool igt_force_reset(struct intel_gt *gt)
46f6470c9bSMichal Wajdeczko {
47cb823ed9SChris Wilson intel_gt_set_wedged(gt);
48cb823ed9SChris Wilson intel_gt_reset(gt, 0, NULL);
49f6470c9bSMichal Wajdeczko
50cb823ed9SChris Wilson return !intel_gt_is_wedged(gt);
51f6470c9bSMichal Wajdeczko }
52