1df0566a6SJani Nikula /* SPDX-License-Identifier: MIT */ 2df0566a6SJani Nikula /* 3df0566a6SJani Nikula * Copyright © 2019 Intel Corporation 4df0566a6SJani Nikula */ 5df0566a6SJani Nikula 6df0566a6SJani Nikula #ifndef __INTEL_FIFO_UNDERRUN_H__ 7df0566a6SJani Nikula #define __INTEL_FIFO_UNDERRUN_H__ 8df0566a6SJani Nikula 9df0566a6SJani Nikula #include <linux/types.h> 10df0566a6SJani Nikula 11df0566a6SJani Nikula struct drm_i915_private; 12*66560f33SVille Syrjälä struct intel_crtc; 1319cfeb41SJani Nikula enum pipe; 14df0566a6SJani Nikula 15*66560f33SVille Syrjälä void intel_init_fifo_underrun_reporting(struct drm_i915_private *i915, 16*66560f33SVille Syrjälä struct intel_crtc *crtc, bool enable); 17df0566a6SJani Nikula bool intel_set_cpu_fifo_underrun_reporting(struct drm_i915_private *dev_priv, 18df0566a6SJani Nikula enum pipe pipe, bool enable); 19df0566a6SJani Nikula bool intel_set_pch_fifo_underrun_reporting(struct drm_i915_private *dev_priv, 20df0566a6SJani Nikula enum pipe pch_transcoder, 21df0566a6SJani Nikula bool enable); 22df0566a6SJani Nikula void intel_cpu_fifo_underrun_irq_handler(struct drm_i915_private *dev_priv, 23df0566a6SJani Nikula enum pipe pipe); 24df0566a6SJani Nikula void intel_pch_fifo_underrun_irq_handler(struct drm_i915_private *dev_priv, 25df0566a6SJani Nikula enum pipe pch_transcoder); 26df0566a6SJani Nikula void intel_check_cpu_fifo_underruns(struct drm_i915_private *dev_priv); 27df0566a6SJani Nikula void intel_check_pch_fifo_underruns(struct drm_i915_private *dev_priv); 28df0566a6SJani Nikula 29df0566a6SJani Nikula #endif /* __INTEL_FIFO_UNDERRUN_H__ */ 30