1f837a61fSImre Deak /* SPDX-License-Identifier: MIT */ 2f837a61fSImre Deak /* 3f837a61fSImre Deak * Copyright © 2020-2021 Intel Corporation 4f837a61fSImre Deak */ 5f837a61fSImre Deak 6f837a61fSImre Deak #ifndef __INTEL_FB_H__ 7f837a61fSImre Deak #define __INTEL_FB_H__ 8f837a61fSImre Deak 9e2b83294SImre Deak #include <linux/bits.h> 10f837a61fSImre Deak #include <linux/types.h> 11f837a61fSImre Deak 12705d4feeSJani Nikula struct drm_device; 13705d4feeSJani Nikula struct drm_file; 14f837a61fSImre Deak struct drm_framebuffer; 15705d4feeSJani Nikula struct drm_i915_gem_object; 163cee6269SImre Deak struct drm_i915_private; 17705d4feeSJani Nikula struct drm_mode_fb_cmd2; 18ee456a4cSImre Deak struct intel_fb_view; 19ee456a4cSImre Deak struct intel_framebuffer; 20e2b83294SImre Deak struct intel_plane; 21d7bdd1c8SImre Deak struct intel_plane_state; 22d7bdd1c8SImre Deak 2310a657ddSImre Deak #define INTEL_PLANE_CAP_NONE 0 2410a657ddSImre Deak #define INTEL_PLANE_CAP_CCS_RC BIT(0) 2510a657ddSImre Deak #define INTEL_PLANE_CAP_CCS_RC_CC BIT(1) 2610a657ddSImre Deak #define INTEL_PLANE_CAP_CCS_MC BIT(2) 2710a657ddSImre Deak #define INTEL_PLANE_CAP_TILING_X BIT(3) 2810a657ddSImre Deak #define INTEL_PLANE_CAP_TILING_Y BIT(4) 2910a657ddSImre Deak #define INTEL_PLANE_CAP_TILING_Yf BIT(5) 30072ce416SStanislav Lisovskiy #define INTEL_PLANE_CAP_TILING_4 BIT(6) 31e2b83294SImre Deak 32d5c45330SVille Syrjälä bool intel_fb_is_tiled_modifier(u64 modifier); 33e359c47bSImre Deak bool intel_fb_is_ccs_modifier(u64 modifier); 340b2c31ddSImre Deak bool intel_fb_is_rc_ccs_cc_modifier(u64 modifier); 350b2c31ddSImre Deak bool intel_fb_is_mc_ccs_modifier(u64 modifier); 36e359c47bSImre Deak 37f5042343SImre Deak bool intel_fb_is_ccs_aux_plane(const struct drm_framebuffer *fb, int color_plane); 38b0f1670dSImre Deak int intel_fb_rc_ccs_cc_plane(const struct drm_framebuffer *fb); 39b0f1670dSImre Deak 40e2b83294SImre Deak u64 *intel_fb_plane_get_modifiers(struct drm_i915_private *i915, 417df7bca5SImre Deak u8 plane_caps); 42e2b83294SImre Deak bool intel_fb_plane_supports_modifier(struct intel_plane *plane, u64 modifier); 43e2b83294SImre Deak 44672d0751SImre Deak const struct drm_format_info * 45672d0751SImre Deak intel_fb_get_format_info(const struct drm_mode_fb_cmd2 *cmd); 46672d0751SImre Deak 470f2922efSImre Deak bool 480f2922efSImre Deak intel_format_info_is_yuv_semiplanar(const struct drm_format_info *info, 490f2922efSImre Deak u64 modifier); 500f2922efSImre Deak 513e5e0a75SImre Deak bool is_surface_linear(const struct drm_framebuffer *fb, int color_plane); 523e5e0a75SImre Deak 535e4eb4e6SImre Deak int main_to_ccs_plane(const struct drm_framebuffer *fb, int main_plane); 545e4eb4e6SImre Deak int skl_ccs_to_main_plane(const struct drm_framebuffer *fb, int ccs_plane); 555e4eb4e6SImre Deak int skl_main_to_aux_plane(const struct drm_framebuffer *fb, int main_plane); 565e4eb4e6SImre Deak 5790df0884SImre Deak unsigned int intel_tile_size(const struct drm_i915_private *i915); 58d3616883SJani Nikula unsigned int intel_tile_width_bytes(const struct drm_framebuffer *fb, int color_plane); 593cee6269SImre Deak unsigned int intel_tile_height(const struct drm_framebuffer *fb, int color_plane); 603cee6269SImre Deak unsigned int intel_tile_row_size(const struct drm_framebuffer *fb, int color_plane); 61b8db2611SJani Nikula unsigned int intel_fb_align_height(const struct drm_framebuffer *fb, 62b8db2611SJani Nikula int color_plane, unsigned int height); 6390df0884SImre Deak unsigned int intel_cursor_alignment(const struct drm_i915_private *i915); 641c8d9adfSJani Nikula unsigned int intel_surf_alignment(const struct drm_framebuffer *fb, 651c8d9adfSJani Nikula int color_plane); 663cee6269SImre Deak 673cee6269SImre Deak void intel_fb_plane_get_subsampling(int *hsub, int *vsub, 683cee6269SImre Deak const struct drm_framebuffer *fb, 693cee6269SImre Deak int color_plane); 703cee6269SImre Deak 713cee6269SImre Deak u32 intel_plane_adjust_aligned_offset(int *x, int *y, 723cee6269SImre Deak const struct intel_plane_state *state, 733cee6269SImre Deak int color_plane, 743cee6269SImre Deak u32 old_offset, u32 new_offset); 753cee6269SImre Deak u32 intel_plane_compute_aligned_offset(int *x, int *y, 763cee6269SImre Deak const struct intel_plane_state *state, 773cee6269SImre Deak int color_plane); 783cee6269SImre Deak 798a405373SImre Deak bool intel_fb_needs_pot_stride_remap(const struct intel_framebuffer *fb); 80d3b4aa43SImre Deak bool intel_fb_supports_90_270_rotation(const struct intel_framebuffer *fb); 81d3b4aa43SImre Deak 82959086ecSImre Deak int intel_fill_fb_info(struct drm_i915_private *i915, struct intel_framebuffer *fb); 83ee456a4cSImre Deak void intel_fb_fill_view(const struct intel_framebuffer *fb, unsigned int rotation, 84ee456a4cSImre Deak struct intel_fb_view *view); 853cee6269SImre Deak int intel_plane_compute_gtt(struct intel_plane_state *plane_state); 863cee6269SImre Deak 87705d4feeSJani Nikula int intel_framebuffer_init(struct intel_framebuffer *ifb, 88705d4feeSJani Nikula struct drm_i915_gem_object *obj, 89705d4feeSJani Nikula struct drm_mode_fb_cmd2 *mode_cmd); 90705d4feeSJani Nikula struct drm_framebuffer * 91705d4feeSJani Nikula intel_user_framebuffer_create(struct drm_device *dev, 92705d4feeSJani Nikula struct drm_file *filp, 93705d4feeSJani Nikula const struct drm_mode_fb_cmd2 *user_mode_cmd); 94705d4feeSJani Nikula 95*c5de2484SVille Syrjälä bool intel_fb_modifier_uses_dpt(struct drm_i915_private *i915, u64 modifier); 961538f65fSJani Nikula bool intel_fb_uses_dpt(const struct drm_framebuffer *fb); 971538f65fSJani Nikula 98f837a61fSImre Deak #endif /* __INTEL_FB_H__ */ 99