1*e8dbb566STvrtko Ursulinconfig DRM_I915_REQUEST_TIMEOUT 2*e8dbb566STvrtko Ursulin int "Default timeout for requests (ms)" 3*e8dbb566STvrtko Ursulin default 20000 # milliseconds 4*e8dbb566STvrtko Ursulin help 5*e8dbb566STvrtko Ursulin Configures the default timeout after which any user submissions will 6*e8dbb566STvrtko Ursulin be forcefully terminated. 7*e8dbb566STvrtko Ursulin 8*e8dbb566STvrtko Ursulin Beware setting this value lower, or close to heartbeat interval 9*e8dbb566STvrtko Ursulin rounded to whole seconds times three, in order to avoid allowing 10*e8dbb566STvrtko Ursulin misbehaving applications causing total rendering failure in unrelated 11*e8dbb566STvrtko Ursulin clients. 12*e8dbb566STvrtko Ursulin 13*e8dbb566STvrtko Ursulin May be 0 to disable the timeout. 14*e8dbb566STvrtko Ursulin 1516dc224fSChris Wilsonconfig DRM_I915_FENCE_TIMEOUT 1616dc224fSChris Wilson int "Timeout for unsignaled foreign fences (ms, jiffy granularity)" 1716dc224fSChris Wilson default 10000 # milliseconds 1816dc224fSChris Wilson help 1916dc224fSChris Wilson When listening to a foreign fence, we install a supplementary timer 2016dc224fSChris Wilson to ensure that we are always signaled and our userspace is able to 2116dc224fSChris Wilson make forward progress. This value specifies the timeout used for an 2216dc224fSChris Wilson unsignaled foreign fence. 2316dc224fSChris Wilson 2416dc224fSChris Wilson May be 0 to disable the timeout, and rely on the foreign fence being 2516dc224fSChris Wilson eventually signaled. 2616dc224fSChris Wilson 27b27e35aeSChris Wilsonconfig DRM_I915_USERFAULT_AUTOSUSPEND 28b27e35aeSChris Wilson int "Runtime autosuspend delay for userspace GGTT mmaps (ms)" 29b27e35aeSChris Wilson default 250 # milliseconds 30b27e35aeSChris Wilson help 31b27e35aeSChris Wilson On runtime suspend, as we suspend the device, we have to revoke 32b27e35aeSChris Wilson userspace GGTT mmaps and force userspace to take a pagefault on 33b27e35aeSChris Wilson their next access. The revocation and subsequent recreation of 34b27e35aeSChris Wilson the GGTT mmap can be very slow and so we impose a small hysteris 35b27e35aeSChris Wilson that complements the runtime-pm autosuspend and provides a lower 36b27e35aeSChris Wilson floor on the autosuspend delay. 37b27e35aeSChris Wilson 38b27e35aeSChris Wilson May be 0 to disable the extra delay and solely use the device level 39b27e35aeSChris Wilson runtime pm autosuspend delay tunable. 40b27e35aeSChris Wilson 41058179e7SChris Wilsonconfig DRM_I915_HEARTBEAT_INTERVAL 42058179e7SChris Wilson int "Interval between heartbeat pulses (ms)" 43058179e7SChris Wilson default 2500 # milliseconds 44058179e7SChris Wilson help 45058179e7SChris Wilson The driver sends a periodic heartbeat down all active engines to 46058179e7SChris Wilson check the health of the GPU and undertake regular house-keeping of 47058179e7SChris Wilson internal driver state. 48058179e7SChris Wilson 499a40bdddSChris Wilson This is adjustable via 509a40bdddSChris Wilson /sys/class/drm/card?/engine/*/heartbeat_interval_ms 519a40bdddSChris Wilson 52058179e7SChris Wilson May be 0 to disable heartbeats and therefore disable automatic GPU 53058179e7SChris Wilson hang detection. 54058179e7SChris Wilson 553a7a92abSChris Wilsonconfig DRM_I915_PREEMPT_TIMEOUT 563a7a92abSChris Wilson int "Preempt timeout (ms, jiffy granularity)" 575766a5ffSChris Wilson default 640 # milliseconds 583a7a92abSChris Wilson help 593a7a92abSChris Wilson How long to wait (in milliseconds) for a preemption event to occur 603a7a92abSChris Wilson when submitting a new context via execlists. If the current context 613a7a92abSChris Wilson does not hit an arbitration point and yield to HW before the timer 623a7a92abSChris Wilson expires, the HW will be reset to allow the more important context 633a7a92abSChris Wilson to execute. 643a7a92abSChris Wilson 65db3d8338SChris Wilson This is adjustable via 66db3d8338SChris Wilson /sys/class/drm/card?/engine/*/preempt_timeout_ms 67db3d8338SChris Wilson 683a7a92abSChris Wilson May be 0 to disable the timeout. 693a7a92abSChris Wilson 7007bcfd12STvrtko Ursulin The compiled in default may get overridden at driver probe time on 7107bcfd12STvrtko Ursulin certain platforms and certain engines which will be reflected in the 7207bcfd12STvrtko Ursulin sysfs control. 7307bcfd12STvrtko Ursulin 74062444bbSChris Wilsonconfig DRM_I915_MAX_REQUEST_BUSYWAIT 75062444bbSChris Wilson int "Busywait for request completion limit (ns)" 76062444bbSChris Wilson default 8000 # nanoseconds 777ce99d24SChris Wilson help 787ce99d24SChris Wilson Before sleeping waiting for a request (GPU operation) to complete, 797ce99d24SChris Wilson we may spend some time polling for its completion. As the IRQ may 807ce99d24SChris Wilson take a non-negligible time to setup, we do a short spin first to 817ce99d24SChris Wilson check if the request will complete in the time it would have taken 827ce99d24SChris Wilson us to enable the interrupt. 837ce99d24SChris Wilson 84062444bbSChris Wilson This is adjustable via 85062444bbSChris Wilson /sys/class/drm/card?/engine/*/max_busywait_duration_ns 86062444bbSChris Wilson 877ce99d24SChris Wilson May be 0 to disable the initial spin. In practice, we estimate 887ce99d24SChris Wilson the cost of enabling the interrupt (if currently disabled) to be 897ce99d24SChris Wilson a few microseconds. 90a8c51ed2SChris Wilson 91a8c51ed2SChris Wilsonconfig DRM_I915_STOP_TIMEOUT 92a8c51ed2SChris Wilson int "How long to wait for an engine to quiesce gracefully before reset (ms)" 93a8c51ed2SChris Wilson default 100 # milliseconds 94a8c51ed2SChris Wilson help 95a8c51ed2SChris Wilson By stopping submission and sleeping for a short time before resetting 96a8c51ed2SChris Wilson the GPU, we allow the innocent contexts also on the system to quiesce. 97a8c51ed2SChris Wilson It is then less likely for a hanging context to cause collateral 98a8c51ed2SChris Wilson damage as the system is reset in order to recover. The corollary is 99a8c51ed2SChris Wilson that the reset itself may take longer and so be more disruptive to 100a8c51ed2SChris Wilson interactive or low latency workloads. 101b79029b2SChris Wilson 10272338a1fSChris Wilson This is adjustable via 10372338a1fSChris Wilson /sys/class/drm/card?/engine/*/stop_timeout_ms 10472338a1fSChris Wilson 105b79029b2SChris Wilsonconfig DRM_I915_TIMESLICE_DURATION 106b79029b2SChris Wilson int "Scheduling quantum for userspace batches (ms, jiffy granularity)" 107b79029b2SChris Wilson default 1 # milliseconds 108b79029b2SChris Wilson help 109b79029b2SChris Wilson When two user batches of equal priority are executing, we will 110b79029b2SChris Wilson alternate execution of each batch to ensure forward progress of 111b79029b2SChris Wilson all users. This is necessary in some cases where there may be 112b79029b2SChris Wilson an implicit dependency between those batches that requires 113b79029b2SChris Wilson concurrent execution in order for them to proceed, e.g. they 114b79029b2SChris Wilson interact with each other via userspace semaphores. Each context 115b79029b2SChris Wilson is scheduled for execution for the timeslice duration, before 116b79029b2SChris Wilson switching to the next context. 117b79029b2SChris Wilson 1181a2695a7SChris Wilson This is adjustable via 1191a2695a7SChris Wilson /sys/class/drm/card?/engine/*/timeslice_duration_ms 1201a2695a7SChris Wilson 121b79029b2SChris Wilson May be 0 to disable timeslicing. 122