xref: /openbmc/linux/drivers/gpu/drm/i915/Kconfig.profile (revision 3a7a92aba8fb77162e1e9963360fd81fc15c39a5)
1b27e35aeSChris Wilsonconfig DRM_I915_USERFAULT_AUTOSUSPEND
2b27e35aeSChris Wilson	int "Runtime autosuspend delay for userspace GGTT mmaps (ms)"
3b27e35aeSChris Wilson	default 250 # milliseconds
4b27e35aeSChris Wilson	help
5b27e35aeSChris Wilson	  On runtime suspend, as we suspend the device, we have to revoke
6b27e35aeSChris Wilson	  userspace GGTT mmaps and force userspace to take a pagefault on
7b27e35aeSChris Wilson	  their next access. The revocation and subsequent recreation of
8b27e35aeSChris Wilson	  the GGTT mmap can be very slow and so we impose a small hysteris
9b27e35aeSChris Wilson	  that complements the runtime-pm autosuspend and provides a lower
10b27e35aeSChris Wilson	  floor on the autosuspend delay.
11b27e35aeSChris Wilson
12b27e35aeSChris Wilson	  May be 0 to disable the extra delay and solely use the device level
13b27e35aeSChris Wilson	  runtime pm autosuspend delay tunable.
14b27e35aeSChris Wilson
15*3a7a92abSChris Wilsonconfig DRM_I915_PREEMPT_TIMEOUT
16*3a7a92abSChris Wilson	int "Preempt timeout (ms, jiffy granularity)"
17*3a7a92abSChris Wilson	default 100 # milliseconds
18*3a7a92abSChris Wilson	help
19*3a7a92abSChris Wilson	  How long to wait (in milliseconds) for a preemption event to occur
20*3a7a92abSChris Wilson	  when submitting a new context via execlists. If the current context
21*3a7a92abSChris Wilson	  does not hit an arbitration point and yield to HW before the timer
22*3a7a92abSChris Wilson	  expires, the HW will be reset to allow the more important context
23*3a7a92abSChris Wilson	  to execute.
24*3a7a92abSChris Wilson
25*3a7a92abSChris Wilson	  May be 0 to disable the timeout.
26*3a7a92abSChris Wilson
277ce99d24SChris Wilsonconfig DRM_I915_SPIN_REQUEST
28ea60f4bdSChris Wilson	int "Busywait for request completion (us)"
297ce99d24SChris Wilson	default 5 # microseconds
307ce99d24SChris Wilson	help
317ce99d24SChris Wilson	  Before sleeping waiting for a request (GPU operation) to complete,
327ce99d24SChris Wilson	  we may spend some time polling for its completion. As the IRQ may
337ce99d24SChris Wilson	  take a non-negligible time to setup, we do a short spin first to
347ce99d24SChris Wilson	  check if the request will complete in the time it would have taken
357ce99d24SChris Wilson	  us to enable the interrupt.
367ce99d24SChris Wilson
377ce99d24SChris Wilson	  May be 0 to disable the initial spin. In practice, we estimate
387ce99d24SChris Wilson	  the cost of enabling the interrupt (if currently disabled) to be
397ce99d24SChris Wilson	  a few microseconds.
40a8c51ed2SChris Wilson
41a8c51ed2SChris Wilsonconfig DRM_I915_STOP_TIMEOUT
42a8c51ed2SChris Wilson	int "How long to wait for an engine to quiesce gracefully before reset (ms)"
43a8c51ed2SChris Wilson	default 100 # milliseconds
44a8c51ed2SChris Wilson	help
45a8c51ed2SChris Wilson	  By stopping submission and sleeping for a short time before resetting
46a8c51ed2SChris Wilson	  the GPU, we allow the innocent contexts also on the system to quiesce.
47a8c51ed2SChris Wilson	  It is then less likely for a hanging context to cause collateral
48a8c51ed2SChris Wilson	  damage as the system is reset in order to recover. The corollary is
49a8c51ed2SChris Wilson	  that the reset itself may take longer and so be more disruptive to
50a8c51ed2SChris Wilson	  interactive or low latency workloads.
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