xref: /openbmc/linux/drivers/gpu/drm/i915/Kconfig.profile (revision 16dc224f1c0ff8d242ef41c40d4da0264d351daa)
1*16dc224fSChris Wilsonconfig DRM_I915_FENCE_TIMEOUT
2*16dc224fSChris Wilson	int "Timeout for unsignaled foreign fences (ms, jiffy granularity)"
3*16dc224fSChris Wilson	default 10000 # milliseconds
4*16dc224fSChris Wilson	help
5*16dc224fSChris Wilson	  When listening to a foreign fence, we install a supplementary timer
6*16dc224fSChris Wilson	  to ensure that we are always signaled and our userspace is able to
7*16dc224fSChris Wilson	  make forward progress. This value specifies the timeout used for an
8*16dc224fSChris Wilson	  unsignaled foreign fence.
9*16dc224fSChris Wilson
10*16dc224fSChris Wilson	  May be 0 to disable the timeout, and rely on the foreign fence being
11*16dc224fSChris Wilson	  eventually signaled.
12*16dc224fSChris Wilson
13b27e35aeSChris Wilsonconfig DRM_I915_USERFAULT_AUTOSUSPEND
14b27e35aeSChris Wilson	int "Runtime autosuspend delay for userspace GGTT mmaps (ms)"
15b27e35aeSChris Wilson	default 250 # milliseconds
16b27e35aeSChris Wilson	help
17b27e35aeSChris Wilson	  On runtime suspend, as we suspend the device, we have to revoke
18b27e35aeSChris Wilson	  userspace GGTT mmaps and force userspace to take a pagefault on
19b27e35aeSChris Wilson	  their next access. The revocation and subsequent recreation of
20b27e35aeSChris Wilson	  the GGTT mmap can be very slow and so we impose a small hysteris
21b27e35aeSChris Wilson	  that complements the runtime-pm autosuspend and provides a lower
22b27e35aeSChris Wilson	  floor on the autosuspend delay.
23b27e35aeSChris Wilson
24b27e35aeSChris Wilson	  May be 0 to disable the extra delay and solely use the device level
25b27e35aeSChris Wilson	  runtime pm autosuspend delay tunable.
26b27e35aeSChris Wilson
27058179e7SChris Wilsonconfig DRM_I915_HEARTBEAT_INTERVAL
28058179e7SChris Wilson	int "Interval between heartbeat pulses (ms)"
29058179e7SChris Wilson	default 2500 # milliseconds
30058179e7SChris Wilson	help
31058179e7SChris Wilson	  The driver sends a periodic heartbeat down all active engines to
32058179e7SChris Wilson	  check the health of the GPU and undertake regular house-keeping of
33058179e7SChris Wilson	  internal driver state.
34058179e7SChris Wilson
359a40bdddSChris Wilson	  This is adjustable via
369a40bdddSChris Wilson	  /sys/class/drm/card?/engine/*/heartbeat_interval_ms
379a40bdddSChris Wilson
38058179e7SChris Wilson	  May be 0 to disable heartbeats and therefore disable automatic GPU
39058179e7SChris Wilson	  hang detection.
40058179e7SChris Wilson
413a7a92abSChris Wilsonconfig DRM_I915_PREEMPT_TIMEOUT
423a7a92abSChris Wilson	int "Preempt timeout (ms, jiffy granularity)"
435766a5ffSChris Wilson	default 640 # milliseconds
443a7a92abSChris Wilson	help
453a7a92abSChris Wilson	  How long to wait (in milliseconds) for a preemption event to occur
463a7a92abSChris Wilson	  when submitting a new context via execlists. If the current context
473a7a92abSChris Wilson	  does not hit an arbitration point and yield to HW before the timer
483a7a92abSChris Wilson	  expires, the HW will be reset to allow the more important context
493a7a92abSChris Wilson	  to execute.
503a7a92abSChris Wilson
51db3d8338SChris Wilson	  This is adjustable via
52db3d8338SChris Wilson	  /sys/class/drm/card?/engine/*/preempt_timeout_ms
53db3d8338SChris Wilson
543a7a92abSChris Wilson	  May be 0 to disable the timeout.
553a7a92abSChris Wilson
5607bcfd12STvrtko Ursulin	  The compiled in default may get overridden at driver probe time on
5707bcfd12STvrtko Ursulin	  certain platforms and certain engines which will be reflected in the
5807bcfd12STvrtko Ursulin	  sysfs control.
5907bcfd12STvrtko Ursulin
60062444bbSChris Wilsonconfig DRM_I915_MAX_REQUEST_BUSYWAIT
61062444bbSChris Wilson	int "Busywait for request completion limit (ns)"
62062444bbSChris Wilson	default 8000 # nanoseconds
637ce99d24SChris Wilson	help
647ce99d24SChris Wilson	  Before sleeping waiting for a request (GPU operation) to complete,
657ce99d24SChris Wilson	  we may spend some time polling for its completion. As the IRQ may
667ce99d24SChris Wilson	  take a non-negligible time to setup, we do a short spin first to
677ce99d24SChris Wilson	  check if the request will complete in the time it would have taken
687ce99d24SChris Wilson	  us to enable the interrupt.
697ce99d24SChris Wilson
70062444bbSChris Wilson	  This is adjustable via
71062444bbSChris Wilson	  /sys/class/drm/card?/engine/*/max_busywait_duration_ns
72062444bbSChris Wilson
737ce99d24SChris Wilson	  May be 0 to disable the initial spin. In practice, we estimate
747ce99d24SChris Wilson	  the cost of enabling the interrupt (if currently disabled) to be
757ce99d24SChris Wilson	  a few microseconds.
76a8c51ed2SChris Wilson
77a8c51ed2SChris Wilsonconfig DRM_I915_STOP_TIMEOUT
78a8c51ed2SChris Wilson	int "How long to wait for an engine to quiesce gracefully before reset (ms)"
79a8c51ed2SChris Wilson	default 100 # milliseconds
80a8c51ed2SChris Wilson	help
81a8c51ed2SChris Wilson	  By stopping submission and sleeping for a short time before resetting
82a8c51ed2SChris Wilson	  the GPU, we allow the innocent contexts also on the system to quiesce.
83a8c51ed2SChris Wilson	  It is then less likely for a hanging context to cause collateral
84a8c51ed2SChris Wilson	  damage as the system is reset in order to recover. The corollary is
85a8c51ed2SChris Wilson	  that the reset itself may take longer and so be more disruptive to
86a8c51ed2SChris Wilson	  interactive or low latency workloads.
87b79029b2SChris Wilson
8872338a1fSChris Wilson	  This is adjustable via
8972338a1fSChris Wilson	  /sys/class/drm/card?/engine/*/stop_timeout_ms
9072338a1fSChris Wilson
91b79029b2SChris Wilsonconfig DRM_I915_TIMESLICE_DURATION
92b79029b2SChris Wilson	int "Scheduling quantum for userspace batches (ms, jiffy granularity)"
93b79029b2SChris Wilson	default 1 # milliseconds
94b79029b2SChris Wilson	help
95b79029b2SChris Wilson	  When two user batches of equal priority are executing, we will
96b79029b2SChris Wilson	  alternate execution of each batch to ensure forward progress of
97b79029b2SChris Wilson	  all users. This is necessary in some cases where there may be
98b79029b2SChris Wilson	  an implicit dependency between those batches that requires
99b79029b2SChris Wilson	  concurrent execution in order for them to proceed, e.g. they
100b79029b2SChris Wilson	  interact with each other via userspace semaphores. Each context
101b79029b2SChris Wilson	  is scheduled for execution for the timeslice duration, before
102b79029b2SChris Wilson	  switching to the next context.
103b79029b2SChris Wilson
1041a2695a7SChris Wilson	  This is adjustable via
1051a2695a7SChris Wilson	  /sys/class/drm/card?/engine/*/timeslice_duration_ms
1061a2695a7SChris Wilson
107b79029b2SChris Wilson	  May be 0 to disable timeslicing.
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