xref: /openbmc/linux/drivers/gpu/drm/i915/Kconfig.profile (revision 7ae9fb1b7ecbb5d85d07857943f677fd1a559b18)
1e8dbb566STvrtko Ursulinconfig DRM_I915_REQUEST_TIMEOUT
2e8dbb566STvrtko Ursulin	int "Default timeout for requests (ms)"
3e8dbb566STvrtko Ursulin	default 20000 # milliseconds
4e8dbb566STvrtko Ursulin	help
5e8dbb566STvrtko Ursulin	  Configures the default timeout after which any user submissions will
6e8dbb566STvrtko Ursulin	  be forcefully terminated.
7e8dbb566STvrtko Ursulin
8e8dbb566STvrtko Ursulin	  Beware setting this value lower, or close to heartbeat interval
9e8dbb566STvrtko Ursulin	  rounded to whole seconds times three, in order to avoid allowing
10e8dbb566STvrtko Ursulin	  misbehaving applications causing total rendering failure in unrelated
11e8dbb566STvrtko Ursulin	  clients.
12e8dbb566STvrtko Ursulin
13e8dbb566STvrtko Ursulin	  May be 0 to disable the timeout.
14e8dbb566STvrtko Ursulin
1516dc224fSChris Wilsonconfig DRM_I915_FENCE_TIMEOUT
1616dc224fSChris Wilson	int "Timeout for unsignaled foreign fences (ms, jiffy granularity)"
1716dc224fSChris Wilson	default 10000 # milliseconds
1816dc224fSChris Wilson	help
1916dc224fSChris Wilson	  When listening to a foreign fence, we install a supplementary timer
2016dc224fSChris Wilson	  to ensure that we are always signaled and our userspace is able to
2116dc224fSChris Wilson	  make forward progress. This value specifies the timeout used for an
2216dc224fSChris Wilson	  unsignaled foreign fence.
2316dc224fSChris Wilson
2416dc224fSChris Wilson	  May be 0 to disable the timeout, and rely on the foreign fence being
2516dc224fSChris Wilson	  eventually signaled.
2616dc224fSChris Wilson
27b27e35aeSChris Wilsonconfig DRM_I915_USERFAULT_AUTOSUSPEND
28b27e35aeSChris Wilson	int "Runtime autosuspend delay for userspace GGTT mmaps (ms)"
29b27e35aeSChris Wilson	default 250 # milliseconds
30b27e35aeSChris Wilson	help
31b27e35aeSChris Wilson	  On runtime suspend, as we suspend the device, we have to revoke
32b27e35aeSChris Wilson	  userspace GGTT mmaps and force userspace to take a pagefault on
33b27e35aeSChris Wilson	  their next access. The revocation and subsequent recreation of
34b27e35aeSChris Wilson	  the GGTT mmap can be very slow and so we impose a small hysteris
35b27e35aeSChris Wilson	  that complements the runtime-pm autosuspend and provides a lower
36b27e35aeSChris Wilson	  floor on the autosuspend delay.
37b27e35aeSChris Wilson
38b27e35aeSChris Wilson	  May be 0 to disable the extra delay and solely use the device level
39b27e35aeSChris Wilson	  runtime pm autosuspend delay tunable.
40b27e35aeSChris Wilson
41058179e7SChris Wilsonconfig DRM_I915_HEARTBEAT_INTERVAL
42058179e7SChris Wilson	int "Interval between heartbeat pulses (ms)"
43058179e7SChris Wilson	default 2500 # milliseconds
44058179e7SChris Wilson	help
45058179e7SChris Wilson	  The driver sends a periodic heartbeat down all active engines to
46058179e7SChris Wilson	  check the health of the GPU and undertake regular house-keeping of
47058179e7SChris Wilson	  internal driver state.
48058179e7SChris Wilson
499a40bdddSChris Wilson	  This is adjustable via
509a40bdddSChris Wilson	  /sys/class/drm/card?/engine/*/heartbeat_interval_ms
519a40bdddSChris Wilson
52058179e7SChris Wilson	  May be 0 to disable heartbeats and therefore disable automatic GPU
53058179e7SChris Wilson	  hang detection.
54058179e7SChris Wilson
553a7a92abSChris Wilsonconfig DRM_I915_PREEMPT_TIMEOUT
563a7a92abSChris Wilson	int "Preempt timeout (ms, jiffy granularity)"
575766a5ffSChris Wilson	default 640 # milliseconds
583a7a92abSChris Wilson	help
593a7a92abSChris Wilson	  How long to wait (in milliseconds) for a preemption event to occur
60*d7a8680eSJohn Harrison	  when submitting a new context. If the current context does not hit
61*d7a8680eSJohn Harrison	  an arbitration point and yield to HW before the timer expires, the
62*d7a8680eSJohn Harrison	  HW will be reset to allow the more important context to execute.
63*d7a8680eSJohn Harrison
64*d7a8680eSJohn Harrison	  This is adjustable via
65*d7a8680eSJohn Harrison	  /sys/class/drm/card?/engine/*/preempt_timeout_ms
66*d7a8680eSJohn Harrison
67*d7a8680eSJohn Harrison	  May be 0 to disable the timeout.
68*d7a8680eSJohn Harrison
69*d7a8680eSJohn Harrison	  The compiled in default may get overridden at driver probe time on
70*d7a8680eSJohn Harrison	  certain platforms and certain engines which will be reflected in the
71*d7a8680eSJohn Harrison	  sysfs control.
72*d7a8680eSJohn Harrison
73*d7a8680eSJohn Harrisonconfig DRM_I915_PREEMPT_TIMEOUT_COMPUTE
74*d7a8680eSJohn Harrison	int "Preempt timeout for compute engines (ms, jiffy granularity)"
75*d7a8680eSJohn Harrison	default 7500 # milliseconds
76*d7a8680eSJohn Harrison	help
77*d7a8680eSJohn Harrison	  How long to wait (in milliseconds) for a preemption event to occur
78*d7a8680eSJohn Harrison	  when submitting a new context to a compute capable engine. If the
79*d7a8680eSJohn Harrison	  current context does not hit an arbitration point and yield to HW
80*d7a8680eSJohn Harrison	  before the timer expires, the HW will be reset to allow the more
81*d7a8680eSJohn Harrison	  important context to execute.
823a7a92abSChris Wilson
83db3d8338SChris Wilson	  This is adjustable via
84db3d8338SChris Wilson	  /sys/class/drm/card?/engine/*/preempt_timeout_ms
85db3d8338SChris Wilson
863a7a92abSChris Wilson	  May be 0 to disable the timeout.
873a7a92abSChris Wilson
8807bcfd12STvrtko Ursulin	  The compiled in default may get overridden at driver probe time on
8907bcfd12STvrtko Ursulin	  certain platforms and certain engines which will be reflected in the
9007bcfd12STvrtko Ursulin	  sysfs control.
9107bcfd12STvrtko Ursulin
92062444bbSChris Wilsonconfig DRM_I915_MAX_REQUEST_BUSYWAIT
93062444bbSChris Wilson	int "Busywait for request completion limit (ns)"
94062444bbSChris Wilson	default 8000 # nanoseconds
957ce99d24SChris Wilson	help
967ce99d24SChris Wilson	  Before sleeping waiting for a request (GPU operation) to complete,
977ce99d24SChris Wilson	  we may spend some time polling for its completion. As the IRQ may
987ce99d24SChris Wilson	  take a non-negligible time to setup, we do a short spin first to
997ce99d24SChris Wilson	  check if the request will complete in the time it would have taken
1007ce99d24SChris Wilson	  us to enable the interrupt.
1017ce99d24SChris Wilson
102062444bbSChris Wilson	  This is adjustable via
103062444bbSChris Wilson	  /sys/class/drm/card?/engine/*/max_busywait_duration_ns
104062444bbSChris Wilson
1057ce99d24SChris Wilson	  May be 0 to disable the initial spin. In practice, we estimate
1067ce99d24SChris Wilson	  the cost of enabling the interrupt (if currently disabled) to be
1077ce99d24SChris Wilson	  a few microseconds.
108a8c51ed2SChris Wilson
109a8c51ed2SChris Wilsonconfig DRM_I915_STOP_TIMEOUT
110a8c51ed2SChris Wilson	int "How long to wait for an engine to quiesce gracefully before reset (ms)"
111a8c51ed2SChris Wilson	default 100 # milliseconds
112a8c51ed2SChris Wilson	help
113a8c51ed2SChris Wilson	  By stopping submission and sleeping for a short time before resetting
114a8c51ed2SChris Wilson	  the GPU, we allow the innocent contexts also on the system to quiesce.
115a8c51ed2SChris Wilson	  It is then less likely for a hanging context to cause collateral
116a8c51ed2SChris Wilson	  damage as the system is reset in order to recover. The corollary is
117a8c51ed2SChris Wilson	  that the reset itself may take longer and so be more disruptive to
118a8c51ed2SChris Wilson	  interactive or low latency workloads.
119b79029b2SChris Wilson
12072338a1fSChris Wilson	  This is adjustable via
12172338a1fSChris Wilson	  /sys/class/drm/card?/engine/*/stop_timeout_ms
12272338a1fSChris Wilson
123b79029b2SChris Wilsonconfig DRM_I915_TIMESLICE_DURATION
124b79029b2SChris Wilson	int "Scheduling quantum for userspace batches (ms, jiffy granularity)"
125b79029b2SChris Wilson	default 1 # milliseconds
126b79029b2SChris Wilson	help
127b79029b2SChris Wilson	  When two user batches of equal priority are executing, we will
128b79029b2SChris Wilson	  alternate execution of each batch to ensure forward progress of
129b79029b2SChris Wilson	  all users. This is necessary in some cases where there may be
130b79029b2SChris Wilson	  an implicit dependency between those batches that requires
131b79029b2SChris Wilson	  concurrent execution in order for them to proceed, e.g. they
132b79029b2SChris Wilson	  interact with each other via userspace semaphores. Each context
133b79029b2SChris Wilson	  is scheduled for execution for the timeslice duration, before
134b79029b2SChris Wilson	  switching to the next context.
135b79029b2SChris Wilson
1361a2695a7SChris Wilson	  This is adjustable via
1371a2695a7SChris Wilson	  /sys/class/drm/card?/engine/*/timeslice_duration_ms
1381a2695a7SChris Wilson
139b79029b2SChris Wilson	  May be 0 to disable timeslicing.
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