1d2912cb1SThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-only */ 223e7b2abSXinliang Liu /* 323e7b2abSXinliang Liu * Copyright (c) 2016 Linaro Limited. 4*6616125bSHao Fang * Copyright (c) 2014-2016 HiSilicon Limited. 523e7b2abSXinliang Liu */ 623e7b2abSXinliang Liu 723e7b2abSXinliang Liu #ifndef __KIRIN_DRM_DRV_H__ 823e7b2abSXinliang Liu #define __KIRIN_DRM_DRV_H__ 923e7b2abSXinliang Liu 10c11a03f6SXu YiPing #define to_kirin_crtc(crtc) \ 11c11a03f6SXu YiPing container_of(crtc, struct kirin_crtc, base) 12c11a03f6SXu YiPing 13c11a03f6SXu YiPing #define to_kirin_plane(plane) \ 14c11a03f6SXu YiPing container_of(plane, struct kirin_plane, base) 15c11a03f6SXu YiPing 16c11a03f6SXu YiPing /* kirin-format translate table */ 17c11a03f6SXu YiPing struct kirin_format { 18c11a03f6SXu YiPing u32 pixel_format; 19c11a03f6SXu YiPing u32 hw_format; 20c11a03f6SXu YiPing }; 21c11a03f6SXu YiPing 22c11a03f6SXu YiPing struct kirin_crtc { 23c11a03f6SXu YiPing struct drm_crtc base; 24c11a03f6SXu YiPing void *hw_ctx; 25c11a03f6SXu YiPing bool enable; 26c11a03f6SXu YiPing }; 27c11a03f6SXu YiPing 28c11a03f6SXu YiPing struct kirin_plane { 29c11a03f6SXu YiPing struct drm_plane base; 30c11a03f6SXu YiPing void *hw_ctx; 31c11a03f6SXu YiPing u32 ch; 32c11a03f6SXu YiPing }; 33c11a03f6SXu YiPing 3423e7b2abSXinliang Liu /* display controller init/cleanup ops */ 357903ba41SXu YiPing struct kirin_drm_data { 36e200d8ebSXu YiPing const u32 *channel_formats; 37e200d8ebSXu YiPing u32 channel_formats_cnt; 3849af4611SXu YiPing int config_max_width; 3949af4611SXu YiPing int config_max_height; 4048fa7c17SXu YiPing u32 num_planes; 4148fa7c17SXu YiPing u32 prim_plane; 42e200d8ebSXu YiPing 4370a59dd8SDaniel Vetter const struct drm_driver *driver; 445fb2e411SXu YiPing const struct drm_crtc_helper_funcs *crtc_helper_funcs; 455fb2e411SXu YiPing const struct drm_crtc_funcs *crtc_funcs; 465fb2e411SXu YiPing const struct drm_plane_helper_funcs *plane_helper_funcs; 475fb2e411SXu YiPing const struct drm_plane_funcs *plane_funcs; 48bdaf419eSXu YiPing const struct drm_mode_config_funcs *mode_config_funcs; 492e89b4fbSXu YiPing 502e89b4fbSXu YiPing void *(*alloc_hw_ctx)(struct platform_device *pdev, 512e89b4fbSXu YiPing struct drm_crtc *crtc); 522e89b4fbSXu YiPing void (*cleanup_hw_ctx)(void *hw_ctx); 5323e7b2abSXinliang Liu }; 5423e7b2abSXinliang Liu 557903ba41SXu YiPing extern struct kirin_drm_data ade_driver_data; 56783ad972SXinliang Liu 5723e7b2abSXinliang Liu #endif /* __KIRIN_DRM_DRV_H__ */ 58