1e098bc96SEvan Quan /* 2e098bc96SEvan Quan * Copyright 2019 Advanced Micro Devices, Inc. 3e098bc96SEvan Quan * 4e098bc96SEvan Quan * Permission is hereby granted, free of charge, to any person obtaining a 5e098bc96SEvan Quan * copy of this software and associated documentation files (the "Software"), 6e098bc96SEvan Quan * to deal in the Software without restriction, including without limitation 7e098bc96SEvan Quan * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8e098bc96SEvan Quan * and/or sell copies of the Software, and to permit persons to whom the 9e098bc96SEvan Quan * Software is furnished to do so, subject to the following conditions: 10e098bc96SEvan Quan * 11e098bc96SEvan Quan * The above copyright notice and this permission notice shall be included in 12e098bc96SEvan Quan * all copies or substantial portions of the Software. 13e098bc96SEvan Quan * 14e098bc96SEvan Quan * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15e098bc96SEvan Quan * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16e098bc96SEvan Quan * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17e098bc96SEvan Quan * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18e098bc96SEvan Quan * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19e098bc96SEvan Quan * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20e098bc96SEvan Quan * OTHER DEALINGS IN THE SOFTWARE. 21e098bc96SEvan Quan */ 22e098bc96SEvan Quan 23e098bc96SEvan Quan #ifndef __SMU_INTERNAL_H__ 24e098bc96SEvan Quan #define __SMU_INTERNAL_H__ 25e098bc96SEvan Quan 26e098bc96SEvan Quan #include "amdgpu_smu.h" 27e098bc96SEvan Quan 28e098bc96SEvan Quan #if defined(SWSMU_CODE_LAYER_L1) 29e098bc96SEvan Quan 30e098bc96SEvan Quan #define smu_ppt_funcs(intf, ret, smu, args...) \ 31e098bc96SEvan Quan ((smu)->ppt_funcs ? ((smu)->ppt_funcs->intf ? (smu)->ppt_funcs->intf(smu, ##args) : ret) : -EINVAL) 32e098bc96SEvan Quan 33e098bc96SEvan Quan #define smu_init_microcode(smu) smu_ppt_funcs(init_microcode, 0, smu) 34e098bc96SEvan Quan #define smu_fini_microcode(smu) smu_ppt_funcs(fini_microcode, 0, smu) 35e098bc96SEvan Quan #define smu_init_smc_tables(smu) smu_ppt_funcs(init_smc_tables, 0, smu) 36e098bc96SEvan Quan #define smu_fini_smc_tables(smu) smu_ppt_funcs(fini_smc_tables, 0, smu) 37e098bc96SEvan Quan #define smu_init_power(smu) smu_ppt_funcs(init_power, 0, smu) 38e098bc96SEvan Quan #define smu_fini_power(smu) smu_ppt_funcs(fini_power, 0, smu) 39e098bc96SEvan Quan #define smu_setup_pptable(smu) smu_ppt_funcs(setup_pptable, 0, smu) 40e098bc96SEvan Quan #define smu_powergate_sdma(smu, gate) smu_ppt_funcs(powergate_sdma, 0, smu, gate) 41e098bc96SEvan Quan #define smu_get_vbios_bootup_values(smu) smu_ppt_funcs(get_vbios_bootup_values, 0, smu) 42e098bc96SEvan Quan #define smu_check_fw_version(smu) smu_ppt_funcs(check_fw_version, 0, smu) 43e098bc96SEvan Quan #define smu_write_pptable(smu) smu_ppt_funcs(write_pptable, 0, smu) 44e098bc96SEvan Quan #define smu_set_min_dcef_deep_sleep(smu, clk) smu_ppt_funcs(set_min_dcef_deep_sleep, 0, smu, clk) 45e098bc96SEvan Quan #define smu_set_driver_table_location(smu) smu_ppt_funcs(set_driver_table_location, 0, smu) 46e098bc96SEvan Quan #define smu_set_tool_table_location(smu) smu_ppt_funcs(set_tool_table_location, 0, smu) 47e098bc96SEvan Quan #define smu_notify_memory_pool_location(smu) smu_ppt_funcs(notify_memory_pool_location, 0, smu) 48e098bc96SEvan Quan #define smu_gfx_off_control(smu, enable) smu_ppt_funcs(gfx_off_control, 0, smu, enable) 49e098bc96SEvan Quan #define smu_get_gfx_off_status(smu) smu_ppt_funcs(get_gfx_off_status, 0, smu) 50*0ad7347aSAndré Almeida #define smu_get_gfx_off_entrycount(smu, value) smu_ppt_funcs(get_gfx_off_entrycount, 0, smu, value) 51*0ad7347aSAndré Almeida #define smu_get_gfx_off_residency(smu, value) smu_ppt_funcs(get_gfx_off_residency, 0, smu, value) 52*0ad7347aSAndré Almeida #define smu_set_gfx_off_residency(smu, value) smu_ppt_funcs(set_gfx_off_residency, 0, smu, value) 53e098bc96SEvan Quan #define smu_set_last_dcef_min_deep_sleep_clk(smu) smu_ppt_funcs(set_last_dcef_min_deep_sleep_clk, 0, smu) 54e098bc96SEvan Quan #define smu_system_features_control(smu, en) smu_ppt_funcs(system_features_control, 0, smu, en) 55e098bc96SEvan Quan #define smu_init_max_sustainable_clocks(smu) smu_ppt_funcs(init_max_sustainable_clocks, 0, smu) 56e098bc96SEvan Quan #define smu_set_default_od_settings(smu) smu_ppt_funcs(set_default_od_settings, 0, smu) 57e098bc96SEvan Quan #define smu_send_smc_msg_with_param(smu, msg, param, read_arg) smu_ppt_funcs(send_smc_msg_with_param, 0, smu, msg, param, read_arg) 58e098bc96SEvan Quan #define smu_send_smc_msg(smu, msg, read_arg) smu_ppt_funcs(send_smc_msg, 0, smu, msg, read_arg) 59e098bc96SEvan Quan #define smu_init_display_count(smu, count) smu_ppt_funcs(init_display_count, 0, smu, count) 60e098bc96SEvan Quan #define smu_feature_set_allowed_mask(smu) smu_ppt_funcs(set_allowed_mask, 0, smu) 61cc188a73SEvan Quan #define smu_feature_get_enabled_mask(smu, mask) smu_ppt_funcs(get_enabled_mask, -EOPNOTSUPP, smu, mask) 62e098bc96SEvan Quan #define smu_feature_is_enabled(smu, mask) smu_ppt_funcs(feature_is_enabled, 0, smu, mask) 63f69c15e1SEvan Quan #define smu_disable_all_features_with_exception(smu, mask) smu_ppt_funcs(disable_all_features_with_exception, 0, smu, mask) 64e098bc96SEvan Quan #define smu_is_dpm_running(smu) smu_ppt_funcs(is_dpm_running, 0, smu) 65e098bc96SEvan Quan #define smu_notify_display_change(smu) smu_ppt_funcs(notify_display_change, 0, smu) 66e098bc96SEvan Quan #define smu_populate_umd_state_clk(smu) smu_ppt_funcs(populate_umd_state_clk, 0, smu) 67e098bc96SEvan Quan #define smu_enable_thermal_alert(smu) smu_ppt_funcs(enable_thermal_alert, 0, smu) 68e098bc96SEvan Quan #define smu_disable_thermal_alert(smu) smu_ppt_funcs(disable_thermal_alert, 0, smu) 69e098bc96SEvan Quan #define smu_smc_read_sensor(smu, sensor, data, size) smu_ppt_funcs(read_sensor, -EINVAL, smu, sensor, data, size) 70e098bc96SEvan Quan #define smu_pre_display_config_changed(smu) smu_ppt_funcs(pre_display_config_changed, 0, smu) 71e098bc96SEvan Quan #define smu_display_config_changed(smu) smu_ppt_funcs(display_config_changed, 0, smu) 72e098bc96SEvan Quan #define smu_apply_clocks_adjust_rules(smu) smu_ppt_funcs(apply_clocks_adjust_rules, 0, smu) 73e098bc96SEvan Quan #define smu_notify_smc_display_config(smu) smu_ppt_funcs(notify_smc_display_config, 0, smu) 74e098bc96SEvan Quan #define smu_run_btc(smu) smu_ppt_funcs(run_btc, 0, smu) 75e098bc96SEvan Quan #define smu_get_allowed_feature_mask(smu, feature_mask, num) smu_ppt_funcs(get_allowed_feature_mask, 0, smu, feature_mask, num) 76e098bc96SEvan Quan #define smu_set_watermarks_table(smu, clock_ranges) smu_ppt_funcs(set_watermarks_table, 0, smu, clock_ranges) 77e098bc96SEvan Quan #define smu_thermal_temperature_range_update(smu, range, rw) smu_ppt_funcs(thermal_temperature_range_update, 0, smu, range, rw) 78e098bc96SEvan Quan #define smu_register_irq_handler(smu) smu_ppt_funcs(register_irq_handler, 0, smu) 79e098bc96SEvan Quan #define smu_get_dpm_ultimate_freq(smu, param, min, max) smu_ppt_funcs(get_dpm_ultimate_freq, 0, smu, param, min, max) 80e098bc96SEvan Quan #define smu_asic_set_performance_level(smu, level) smu_ppt_funcs(set_performance_level, -EINVAL, smu, level) 81e098bc96SEvan Quan #define smu_dump_pptable(smu) smu_ppt_funcs(dump_pptable, 0, smu) 82e098bc96SEvan Quan #define smu_update_pcie_parameters(smu, pcie_gen_cap, pcie_width_cap) smu_ppt_funcs(update_pcie_parameters, 0, smu, pcie_gen_cap, pcie_width_cap) 83e098bc96SEvan Quan #define smu_set_power_source(smu, power_src) smu_ppt_funcs(set_power_source, 0, smu, power_src) 842f60dd50SLuben Tuikov #define smu_i2c_init(smu) smu_ppt_funcs(i2c_init, 0, smu) 852f60dd50SLuben Tuikov #define smu_i2c_fini(smu) smu_ppt_funcs(i2c_fini, 0, smu) 86e098bc96SEvan Quan #define smu_get_unique_id(smu) smu_ppt_funcs(get_unique_id, 0, smu) 87e098bc96SEvan Quan #define smu_log_thermal_throttling(smu) smu_ppt_funcs(log_thermal_throttling_event, 0, smu) 88488f211dSEvan Quan #define smu_get_asic_power_limits(smu, current, default, max) smu_ppt_funcs(get_power_limit, 0, smu, current, default, max) 89e098bc96SEvan Quan #define smu_get_pp_feature_mask(smu, buf) smu_ppt_funcs(get_pp_feature_mask, 0, smu, buf) 90e098bc96SEvan Quan #define smu_set_pp_feature_mask(smu, new_mask) smu_ppt_funcs(set_pp_feature_mask, 0, smu, new_mask) 91588a4d5cSEvan Quan #define smu_gfx_ulv_control(smu, enablement) smu_ppt_funcs(gfx_ulv_control, 0, smu, enablement) 92f0d51d20SEvan Quan #define smu_deep_sleep_control(smu, enablement) smu_ppt_funcs(deep_sleep_control, 0, smu, enablement) 93337b57aeSAlex Deucher #define smu_get_fan_parameters(smu) smu_ppt_funcs(get_fan_parameters, 0, smu) 944bdd4d25SEvan Quan #define smu_post_init(smu) smu_ppt_funcs(post_init, 0, smu) 9576c71f00SEvan Quan #define smu_gpo_control(smu, enablement) smu_ppt_funcs(gpo_control, 0, smu, enablement) 96c98ee897SXiaojian Du #define smu_set_fine_grain_gfx_freq_parameters(smu) smu_ppt_funcs(set_fine_grain_gfx_freq_parameters, 0, smu) 97b874c667SEvan Quan #define smu_get_default_config_table_settings(smu, config_table) smu_ppt_funcs(get_default_config_table_settings, -EOPNOTSUPP, smu, config_table) 98b874c667SEvan Quan #define smu_set_config_table(smu, config_table) smu_ppt_funcs(set_config_table, -EOPNOTSUPP, smu, config_table) 99b37c41f2SEvan Quan #define smu_init_pptable_microcode(smu) smu_ppt_funcs(init_pptable_microcode, 0, smu) 100e098bc96SEvan Quan 101e098bc96SEvan Quan #endif 102e098bc96SEvan Quan #endif 103