197bda032SHarry Wentland #ifndef DC_DSC_H_ 297bda032SHarry Wentland #define DC_DSC_H_ 397bda032SHarry Wentland /* 497bda032SHarry Wentland * Copyright 2019 Advanced Micro Devices, Inc. 597bda032SHarry Wentland * 697bda032SHarry Wentland * Permission is hereby granted, free of charge, to any person obtaining a 797bda032SHarry Wentland * copy of this software and associated documentation files (the "Software"), 897bda032SHarry Wentland * to deal in the Software without restriction, including without limitation 997bda032SHarry Wentland * the rights to use, copy, modify, merge, publish, distribute, sublicense, 1097bda032SHarry Wentland * and/or sell copies of the Software, and to permit persons to whom the 1197bda032SHarry Wentland * Software is furnished to do so, subject to the following conditions: 1297bda032SHarry Wentland * 1397bda032SHarry Wentland * The above copyright notice and this permission notice shall be included in 1497bda032SHarry Wentland * all copies or substantial portions of the Software. 1597bda032SHarry Wentland * 1697bda032SHarry Wentland * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 1797bda032SHarry Wentland * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 1897bda032SHarry Wentland * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 1997bda032SHarry Wentland * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 2097bda032SHarry Wentland * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 2197bda032SHarry Wentland * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 2297bda032SHarry Wentland * OTHER DEALINGS IN THE SOFTWARE. 2397bda032SHarry Wentland * 2497bda032SHarry Wentland * Author: AMD 2597bda032SHarry Wentland */ 269c0ab2ddSNikola Cornij 2739a4eb85SWenjing Liu /* put it here temporarily until linux has the new addresses official defined */ 2839a4eb85SWenjing Liu /* DP Extended DSC Capabilities */ 2939a4eb85SWenjing Liu #define DP_DSC_BRANCH_OVERALL_THROUGHPUT_0 0x0a0 /* DP 1.4a SCR */ 3039a4eb85SWenjing Liu #define DP_DSC_BRANCH_OVERALL_THROUGHPUT_1 0x0a1 3139a4eb85SWenjing Liu #define DP_DSC_BRANCH_MAX_LINE_WIDTH 0x0a2 320417df16SBayan Zabihiyan #include "dc_types.h" 3339a4eb85SWenjing Liu 3497bda032SHarry Wentland struct dc_dsc_bw_range { 359c0ab2ddSNikola Cornij uint32_t min_kbps; /* Bandwidth if min_target_bpp_x16 is used */ 3697bda032SHarry Wentland uint32_t min_target_bpp_x16; 379c0ab2ddSNikola Cornij uint32_t max_kbps; /* Bandwidth if max_target_bpp_x16 is used */ 3897bda032SHarry Wentland uint32_t max_target_bpp_x16; 399c0ab2ddSNikola Cornij uint32_t stream_kbps; /* Uncompressed stream bandwidth */ 4097bda032SHarry Wentland }; 4197bda032SHarry Wentland 420417df16SBayan Zabihiyan struct display_stream_compressor { 430417df16SBayan Zabihiyan const struct dsc_funcs *funcs; 440417df16SBayan Zabihiyan struct dc_context *ctx; 450417df16SBayan Zabihiyan int inst; 460417df16SBayan Zabihiyan }; 4797bda032SHarry Wentland 48799a5f74SWenjing Liu struct dc_dsc_policy { 49799a5f74SWenjing Liu bool use_min_slices_h; 50799a5f74SWenjing Liu int max_slices_h; // Maximum available if 0 51799a5f74SWenjing Liu int min_slice_height; // Must not be less than 8 52799a5f74SWenjing Liu uint32_t max_target_bpp; 53799a5f74SWenjing Liu uint32_t min_target_bpp; 54bcc6aa61SEryk Brol bool enable_dsc_when_not_needed; 55799a5f74SWenjing Liu }; 56799a5f74SWenjing Liu 57de534c1cSMike Hsieh struct dc_dsc_config_options { 58de534c1cSMike Hsieh uint32_t dsc_min_slice_height_override; 59de534c1cSMike Hsieh uint32_t max_target_bpp_limit_override_x16; 60ab487ea8SMike Hsieh uint32_t slice_height_granularity; 616bfe9a23SNasir Osman uint32_t dsc_force_odm_hslice_override; 62de534c1cSMike Hsieh }; 63de534c1cSMike Hsieh 642af0f378SNikola Cornij bool dc_dsc_parse_dsc_dpcd(const struct dc *dc, 652af0f378SNikola Cornij const uint8_t *dpcd_dsc_basic_data, 66f446489aSNikola Cornij const uint8_t *dpcd_dsc_ext_data, 6797bda032SHarry Wentland struct dsc_dec_dpcd_caps *dsc_sink_caps); 6897bda032SHarry Wentland 6997bda032SHarry Wentland bool dc_dsc_compute_bandwidth_range( 700417df16SBayan Zabihiyan const struct display_stream_compressor *dsc, 719abdf392SNikola Cornij uint32_t dsc_min_slice_height_override, 728c2f14c3SDillon Varone uint32_t min_bpp_x16, 738c2f14c3SDillon Varone uint32_t max_bpp_x16, 7497bda032SHarry Wentland const struct dsc_dec_dpcd_caps *dsc_sink_caps, 7597bda032SHarry Wentland const struct dc_crtc_timing *timing, 7663c0bf99SGeorge Shen const enum dc_link_encoding_format link_encoding, 7797bda032SHarry Wentland struct dc_dsc_bw_range *range); 789c0ab2ddSNikola Cornij 7997bda032SHarry Wentland bool dc_dsc_compute_config( 800417df16SBayan Zabihiyan const struct display_stream_compressor *dsc, 8197bda032SHarry Wentland const struct dsc_dec_dpcd_caps *dsc_sink_caps, 82de534c1cSMike Hsieh const struct dc_dsc_config_options *options, 839c0ab2ddSNikola Cornij uint32_t target_bandwidth_kbps, 8497bda032SHarry Wentland const struct dc_crtc_timing *timing, 8563c0bf99SGeorge Shen const enum dc_link_encoding_format link_encoding, 8697bda032SHarry Wentland struct dc_dsc_config *dsc_cfg); 87dcd65857SWenjing Liu 88642d3a2bSWenjing Liu uint32_t dc_dsc_stream_bandwidth_in_kbps(const struct dc_crtc_timing *timing, 89df0a271cSWenjing Liu uint32_t bpp_x16, uint32_t num_slices_h, bool is_dp); 908c2f14c3SDillon Varone 91b25715a0SWenjing Liu uint32_t dc_dsc_stream_bandwidth_overhead_in_kbps( 92b25715a0SWenjing Liu const struct dc_crtc_timing *timing, 93b25715a0SWenjing Liu const int num_slices_h, 94b25715a0SWenjing Liu const bool is_dp); 95b25715a0SWenjing Liu 96e0d09634SWenjing Liu /* TODO - Hardware/specs limitation should be owned by dc dsc and returned to DM, 97e0d09634SWenjing Liu * and DM can choose to OVERRIDE the limitation on CASE BY CASE basis. 98e0d09634SWenjing Liu * Hardware/specs limitation should not be writable by DM. 99e0d09634SWenjing Liu * It should be decoupled from DM specific policy and named differently. 100e0d09634SWenjing Liu */ 101799a5f74SWenjing Liu void dc_dsc_get_policy_for_timing(const struct dc_crtc_timing *timing, 1028c2f14c3SDillon Varone uint32_t max_target_bpp_limit_override_x16, 103*55fcbe5fSLeo Ma struct dc_dsc_policy *policy, 104*55fcbe5fSLeo Ma const enum dc_link_encoding_format link_encoding); 105799a5f74SWenjing Liu 1066026be69SJoshua Aberback void dc_dsc_policy_set_max_target_bpp_limit(uint32_t limit); 1076026be69SJoshua Aberback 108bcc6aa61SEryk Brol void dc_dsc_policy_set_enable_dsc_when_not_needed(bool enable); 109bcc6aa61SEryk Brol 110df0a271cSWenjing Liu void dc_dsc_policy_set_disable_dsc_stream_overhead(bool disable); 111df0a271cSWenjing Liu 112de534c1cSMike Hsieh void dc_dsc_get_default_config_option(const struct dc *dc, struct dc_dsc_config_options *options); 113de534c1cSMike Hsieh 11497bda032SHarry Wentland #endif 115