1d38ceaf9SAlex Deucher /* 2d38ceaf9SAlex Deucher * Copyright 2014 Advanced Micro Devices, Inc. 3d38ceaf9SAlex Deucher * 4d38ceaf9SAlex Deucher * Permission is hereby granted, free of charge, to any person obtaining a 5d38ceaf9SAlex Deucher * copy of this software and associated documentation files (the "Software"), 6d38ceaf9SAlex Deucher * to deal in the Software without restriction, including without limitation 7d38ceaf9SAlex Deucher * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8d38ceaf9SAlex Deucher * and/or sell copies of the Software, and to permit persons to whom the 9d38ceaf9SAlex Deucher * Software is furnished to do so, subject to the following conditions: 10d38ceaf9SAlex Deucher * 11d38ceaf9SAlex Deucher * The above copyright notice and this permission notice shall be included in 12d38ceaf9SAlex Deucher * all copies or substantial portions of the Software. 13d38ceaf9SAlex Deucher * 14d38ceaf9SAlex Deucher * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15d38ceaf9SAlex Deucher * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16d38ceaf9SAlex Deucher * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17d38ceaf9SAlex Deucher * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18d38ceaf9SAlex Deucher * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19d38ceaf9SAlex Deucher * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20d38ceaf9SAlex Deucher * OTHER DEALINGS IN THE SOFTWARE. 21d38ceaf9SAlex Deucher * 22d38ceaf9SAlex Deucher */ 23d38ceaf9SAlex Deucher 24d38ceaf9SAlex Deucher #ifndef __ATOMBIOS_CRTC_H__ 25d38ceaf9SAlex Deucher #define __ATOMBIOS_CRTC_H__ 26d38ceaf9SAlex Deucher 27d38ceaf9SAlex Deucher void amdgpu_atombios_crtc_overscan_setup(struct drm_crtc *crtc, 28d38ceaf9SAlex Deucher struct drm_display_mode *mode, 29d38ceaf9SAlex Deucher struct drm_display_mode *adjusted_mode); 30d38ceaf9SAlex Deucher void amdgpu_atombios_crtc_scaler_setup(struct drm_crtc *crtc); 31d38ceaf9SAlex Deucher void amdgpu_atombios_crtc_lock(struct drm_crtc *crtc, int lock); 32d38ceaf9SAlex Deucher void amdgpu_atombios_crtc_enable(struct drm_crtc *crtc, int state); 33d38ceaf9SAlex Deucher void amdgpu_atombios_crtc_blank(struct drm_crtc *crtc, int state); 34d38ceaf9SAlex Deucher void amdgpu_atombios_crtc_powergate(struct drm_crtc *crtc, int state); 35d38ceaf9SAlex Deucher void amdgpu_atombios_crtc_powergate_init(struct amdgpu_device *adev); 36d38ceaf9SAlex Deucher void amdgpu_atombios_crtc_set_dtd_timing(struct drm_crtc *crtc, 37d38ceaf9SAlex Deucher struct drm_display_mode *mode); 38d38ceaf9SAlex Deucher void amdgpu_atombios_crtc_set_disp_eng_pll(struct amdgpu_device *adev, 39d38ceaf9SAlex Deucher u32 dispclk); 40*541cd555SAlex Deucher u32 amdgpu_atombios_crtc_set_dce_clock(struct amdgpu_device *adev, 41*541cd555SAlex Deucher u32 freq, u8 clk_type, u8 clk_src); 42d38ceaf9SAlex Deucher void amdgpu_atombios_crtc_program_pll(struct drm_crtc *crtc, 43d38ceaf9SAlex Deucher u32 crtc_id, 44d38ceaf9SAlex Deucher int pll_id, 45d38ceaf9SAlex Deucher u32 encoder_mode, 46d38ceaf9SAlex Deucher u32 encoder_id, 47d38ceaf9SAlex Deucher u32 clock, 48d38ceaf9SAlex Deucher u32 ref_div, 49d38ceaf9SAlex Deucher u32 fb_div, 50d38ceaf9SAlex Deucher u32 frac_fb_div, 51d38ceaf9SAlex Deucher u32 post_div, 52d38ceaf9SAlex Deucher int bpc, 53d38ceaf9SAlex Deucher bool ss_enabled, 54d38ceaf9SAlex Deucher struct amdgpu_atom_ss *ss); 55d38ceaf9SAlex Deucher int amdgpu_atombios_crtc_prepare_pll(struct drm_crtc *crtc, 56d38ceaf9SAlex Deucher struct drm_display_mode *mode); 57d38ceaf9SAlex Deucher void amdgpu_atombios_crtc_set_pll(struct drm_crtc *crtc, 58d38ceaf9SAlex Deucher struct drm_display_mode *mode); 59d38ceaf9SAlex Deucher 60d38ceaf9SAlex Deucher #endif 61