xref: /openbmc/linux/drivers/gpu/drm/amd/amdgpu/amdgpu_csa.c (revision c900529f3d9161bfde5cca0754f83b4d3c3e0220)
17946340fSRex Zhu /*
27946340fSRex Zhu  * Copyright 2016 Advanced Micro Devices, Inc.
37946340fSRex Zhu  *
47946340fSRex Zhu  * Permission is hereby granted, free of charge, to any person obtaining a
57946340fSRex Zhu  * copy of this software and associated documentation files (the "Software"),
67946340fSRex Zhu  * to deal in the Software without restriction, including without limitation
77946340fSRex Zhu  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
87946340fSRex Zhu  * and/or sell copies of the Software, and to permit persons to whom the
97946340fSRex Zhu  * Software is furnished to do so, subject to the following conditions:
107946340fSRex Zhu  *
117946340fSRex Zhu  * The above copyright notice and this permission notice shall be included in
127946340fSRex Zhu  * all copies or substantial portions of the Software.
137946340fSRex Zhu  *
147946340fSRex Zhu  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
157946340fSRex Zhu  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
167946340fSRex Zhu  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
177946340fSRex Zhu  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
187946340fSRex Zhu  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
197946340fSRex Zhu  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
207946340fSRex Zhu  * OTHER DEALINGS IN THE SOFTWARE.
217946340fSRex Zhu 
227946340fSRex Zhu  * * Author: Monk.liu@amd.com
237946340fSRex Zhu  */
247946340fSRex Zhu 
25*8a206685SChristian König #include <drm/drm_exec.h>
26*8a206685SChristian König 
277946340fSRex Zhu #include "amdgpu.h"
287946340fSRex Zhu 
amdgpu_csa_vaddr(struct amdgpu_device * adev)297946340fSRex Zhu uint64_t amdgpu_csa_vaddr(struct amdgpu_device *adev)
307946340fSRex Zhu {
317946340fSRex Zhu 	uint64_t addr = adev->vm_manager.max_pfn << AMDGPU_GPU_PAGE_SHIFT;
327946340fSRex Zhu 
337946340fSRex Zhu 	addr -= AMDGPU_VA_RESERVED_SIZE;
347946340fSRex Zhu 	addr = amdgpu_gmc_sign_extend(addr);
357946340fSRex Zhu 
367946340fSRex Zhu 	return addr;
377946340fSRex Zhu }
387946340fSRex Zhu 
amdgpu_allocate_static_csa(struct amdgpu_device * adev,struct amdgpu_bo ** bo,u32 domain,uint32_t size)397946340fSRex Zhu int amdgpu_allocate_static_csa(struct amdgpu_device *adev, struct amdgpu_bo **bo,
407946340fSRex Zhu 				u32 domain, uint32_t size)
417946340fSRex Zhu {
427946340fSRex Zhu 	void *ptr;
437946340fSRex Zhu 
4429d6a163SLee Jones 	amdgpu_bo_create_kernel(adev, size, PAGE_SIZE,
457946340fSRex Zhu 				domain, bo,
467946340fSRex Zhu 				NULL, &ptr);
4751f1f6f5SRex Zhu 	if (!*bo)
487946340fSRex Zhu 		return -ENOMEM;
497946340fSRex Zhu 
507946340fSRex Zhu 	memset(ptr, 0, size);
5143974dacSJack Xiao 	adev->virt.csa_cpu_addr = ptr;
527946340fSRex Zhu 	return 0;
537946340fSRex Zhu }
547946340fSRex Zhu 
amdgpu_free_static_csa(struct amdgpu_bo ** bo)557946340fSRex Zhu void amdgpu_free_static_csa(struct amdgpu_bo **bo)
567946340fSRex Zhu {
577946340fSRex Zhu 	amdgpu_bo_free_kernel(bo, NULL, NULL);
587946340fSRex Zhu }
597946340fSRex Zhu 
607946340fSRex Zhu /*
617946340fSRex Zhu  * amdgpu_map_static_csa should be called during amdgpu_vm_init
627946340fSRex Zhu  * it maps virtual address amdgpu_csa_vaddr() to this VM, and each command
637946340fSRex Zhu  * submission of GFX should use this virtual address within META_DATA init
647946340fSRex Zhu  * package to support SRIOV gfx preemption.
657946340fSRex Zhu  */
amdgpu_map_static_csa(struct amdgpu_device * adev,struct amdgpu_vm * vm,struct amdgpu_bo * bo,struct amdgpu_bo_va ** bo_va,uint64_t csa_addr,uint32_t size)667946340fSRex Zhu int amdgpu_map_static_csa(struct amdgpu_device *adev, struct amdgpu_vm *vm,
677946340fSRex Zhu 			  struct amdgpu_bo *bo, struct amdgpu_bo_va **bo_va,
687946340fSRex Zhu 			  uint64_t csa_addr, uint32_t size)
697946340fSRex Zhu {
70*8a206685SChristian König 	struct drm_exec exec;
717946340fSRex Zhu 	int r;
727946340fSRex Zhu 
73*8a206685SChristian König 	drm_exec_init(&exec, DRM_EXEC_INTERRUPTIBLE_WAIT);
74*8a206685SChristian König 	drm_exec_until_all_locked(&exec) {
75*8a206685SChristian König 		r = amdgpu_vm_lock_pd(vm, &exec, 0);
76*8a206685SChristian König 		if (likely(!r))
77*8a206685SChristian König 			r = drm_exec_lock_obj(&exec, &bo->tbo.base);
78*8a206685SChristian König 		drm_exec_retry_on_contention(&exec);
79*8a206685SChristian König 		if (unlikely(r)) {
807946340fSRex Zhu 			DRM_ERROR("failed to reserve CSA,PD BOs: err=%d\n", r);
81*8a206685SChristian König 			goto error;
82*8a206685SChristian König 		}
837946340fSRex Zhu 	}
847946340fSRex Zhu 
857946340fSRex Zhu 	*bo_va = amdgpu_vm_bo_add(adev, vm, bo);
867946340fSRex Zhu 	if (!*bo_va) {
87*8a206685SChristian König 		r = -ENOMEM;
88*8a206685SChristian König 		goto error;
897946340fSRex Zhu 	}
907946340fSRex Zhu 
917946340fSRex Zhu 	r = amdgpu_vm_bo_map(adev, *bo_va, csa_addr, 0, size,
927946340fSRex Zhu 			     AMDGPU_PTE_READABLE | AMDGPU_PTE_WRITEABLE |
937946340fSRex Zhu 			     AMDGPU_PTE_EXECUTABLE);
947946340fSRex Zhu 
957946340fSRex Zhu 	if (r) {
967946340fSRex Zhu 		DRM_ERROR("failed to do bo_map on static CSA, err=%d\n", r);
97e56694f7SChristian König 		amdgpu_vm_bo_del(adev, *bo_va);
98*8a206685SChristian König 		goto error;
997946340fSRex Zhu 	}
1007946340fSRex Zhu 
101*8a206685SChristian König error:
102*8a206685SChristian König 	drm_exec_fini(&exec);
103*8a206685SChristian König 	return r;
1047946340fSRex Zhu }
1055daff15cSLang Yu 
amdgpu_unmap_static_csa(struct amdgpu_device * adev,struct amdgpu_vm * vm,struct amdgpu_bo * bo,struct amdgpu_bo_va * bo_va,uint64_t csa_addr)1065daff15cSLang Yu int amdgpu_unmap_static_csa(struct amdgpu_device *adev, struct amdgpu_vm *vm,
1075daff15cSLang Yu 			    struct amdgpu_bo *bo, struct amdgpu_bo_va *bo_va,
1085daff15cSLang Yu 			    uint64_t csa_addr)
1095daff15cSLang Yu {
110*8a206685SChristian König 	struct drm_exec exec;
1115daff15cSLang Yu 	int r;
1125daff15cSLang Yu 
113*8a206685SChristian König 	drm_exec_init(&exec, DRM_EXEC_INTERRUPTIBLE_WAIT);
114*8a206685SChristian König 	drm_exec_until_all_locked(&exec) {
115*8a206685SChristian König 		r = amdgpu_vm_lock_pd(vm, &exec, 0);
116*8a206685SChristian König 		if (likely(!r))
117*8a206685SChristian König 			r = drm_exec_lock_obj(&exec, &bo->tbo.base);
118*8a206685SChristian König 		drm_exec_retry_on_contention(&exec);
119*8a206685SChristian König 		if (unlikely(r)) {
1205daff15cSLang Yu 			DRM_ERROR("failed to reserve CSA,PD BOs: err=%d\n", r);
121*8a206685SChristian König 			goto error;
122*8a206685SChristian König 		}
1235daff15cSLang Yu 	}
1245daff15cSLang Yu 
1255daff15cSLang Yu 	r = amdgpu_vm_bo_unmap(adev, bo_va, csa_addr);
1265daff15cSLang Yu 	if (r) {
1275daff15cSLang Yu 		DRM_ERROR("failed to do bo_unmap on static CSA, err=%d\n", r);
128*8a206685SChristian König 		goto error;
1295daff15cSLang Yu 	}
1305daff15cSLang Yu 
1315daff15cSLang Yu 	amdgpu_vm_bo_del(adev, bo_va);
1325daff15cSLang Yu 
133*8a206685SChristian König error:
134*8a206685SChristian König 	drm_exec_fini(&exec);
135*8a206685SChristian König 	return r;
1365daff15cSLang Yu }
137