1c103de24SGrant Likely /* 2c103de24SGrant Likely * Timberdale FPGA GPIO driver 352ad9053SPaul Gortmaker * Author: Mocean Laboratories 4c103de24SGrant Likely * Copyright (c) 2009 Intel Corporation 5c103de24SGrant Likely * 6c103de24SGrant Likely * This program is free software; you can redistribute it and/or modify 7c103de24SGrant Likely * it under the terms of the GNU General Public License version 2 as 8c103de24SGrant Likely * published by the Free Software Foundation. 9c103de24SGrant Likely * 10c103de24SGrant Likely * This program is distributed in the hope that it will be useful, 11c103de24SGrant Likely * but WITHOUT ANY WARRANTY; without even the implied warranty of 12c103de24SGrant Likely * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13c103de24SGrant Likely * GNU General Public License for more details. 14c103de24SGrant Likely * 15c103de24SGrant Likely * You should have received a copy of the GNU General Public License 16c103de24SGrant Likely * along with this program; if not, write to the Free Software 17c103de24SGrant Likely * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 18c103de24SGrant Likely */ 19c103de24SGrant Likely 20c103de24SGrant Likely /* Supports: 21c103de24SGrant Likely * Timberdale FPGA GPIO 22c103de24SGrant Likely */ 23c103de24SGrant Likely 2452ad9053SPaul Gortmaker #include <linux/init.h> 25c103de24SGrant Likely #include <linux/gpio.h> 26c103de24SGrant Likely #include <linux/platform_device.h> 27c103de24SGrant Likely #include <linux/irq.h> 28c103de24SGrant Likely #include <linux/io.h> 29c103de24SGrant Likely #include <linux/timb_gpio.h> 30c103de24SGrant Likely #include <linux/interrupt.h> 31c103de24SGrant Likely #include <linux/slab.h> 32c103de24SGrant Likely 33c103de24SGrant Likely #define DRIVER_NAME "timb-gpio" 34c103de24SGrant Likely 35c103de24SGrant Likely #define TGPIOVAL 0x00 36c103de24SGrant Likely #define TGPIODIR 0x04 37c103de24SGrant Likely #define TGPIO_IER 0x08 38c103de24SGrant Likely #define TGPIO_ISR 0x0c 39c103de24SGrant Likely #define TGPIO_IPR 0x10 40c103de24SGrant Likely #define TGPIO_ICR 0x14 41c103de24SGrant Likely #define TGPIO_FLR 0x18 42c103de24SGrant Likely #define TGPIO_LVR 0x1c 43c103de24SGrant Likely #define TGPIO_VER 0x20 44c103de24SGrant Likely #define TGPIO_BFLR 0x24 45c103de24SGrant Likely 46c103de24SGrant Likely struct timbgpio { 47c103de24SGrant Likely void __iomem *membase; 48c103de24SGrant Likely spinlock_t lock; /* mutual exclusion */ 49c103de24SGrant Likely struct gpio_chip gpio; 50c103de24SGrant Likely int irq_base; 51c103de24SGrant Likely unsigned long last_ier; 52c103de24SGrant Likely }; 53c103de24SGrant Likely 54c103de24SGrant Likely static int timbgpio_update_bit(struct gpio_chip *gpio, unsigned index, 55c103de24SGrant Likely unsigned offset, bool enabled) 56c103de24SGrant Likely { 5792a41e2fSLinus Walleij struct timbgpio *tgpio = gpiochip_get_data(gpio); 58c103de24SGrant Likely u32 reg; 59c103de24SGrant Likely 60c103de24SGrant Likely spin_lock(&tgpio->lock); 61c103de24SGrant Likely reg = ioread32(tgpio->membase + offset); 62c103de24SGrant Likely 63c103de24SGrant Likely if (enabled) 64c103de24SGrant Likely reg |= (1 << index); 65c103de24SGrant Likely else 66c103de24SGrant Likely reg &= ~(1 << index); 67c103de24SGrant Likely 68c103de24SGrant Likely iowrite32(reg, tgpio->membase + offset); 69c103de24SGrant Likely spin_unlock(&tgpio->lock); 70c103de24SGrant Likely 71c103de24SGrant Likely return 0; 72c103de24SGrant Likely } 73c103de24SGrant Likely 74c103de24SGrant Likely static int timbgpio_gpio_direction_input(struct gpio_chip *gpio, unsigned nr) 75c103de24SGrant Likely { 76c103de24SGrant Likely return timbgpio_update_bit(gpio, nr, TGPIODIR, true); 77c103de24SGrant Likely } 78c103de24SGrant Likely 79c103de24SGrant Likely static int timbgpio_gpio_get(struct gpio_chip *gpio, unsigned nr) 80c103de24SGrant Likely { 8192a41e2fSLinus Walleij struct timbgpio *tgpio = gpiochip_get_data(gpio); 82c103de24SGrant Likely u32 value; 83c103de24SGrant Likely 84c103de24SGrant Likely value = ioread32(tgpio->membase + TGPIOVAL); 85c103de24SGrant Likely return (value & (1 << nr)) ? 1 : 0; 86c103de24SGrant Likely } 87c103de24SGrant Likely 88c103de24SGrant Likely static int timbgpio_gpio_direction_output(struct gpio_chip *gpio, 89c103de24SGrant Likely unsigned nr, int val) 90c103de24SGrant Likely { 91c103de24SGrant Likely return timbgpio_update_bit(gpio, nr, TGPIODIR, false); 92c103de24SGrant Likely } 93c103de24SGrant Likely 94c103de24SGrant Likely static void timbgpio_gpio_set(struct gpio_chip *gpio, 95c103de24SGrant Likely unsigned nr, int val) 96c103de24SGrant Likely { 97c103de24SGrant Likely timbgpio_update_bit(gpio, nr, TGPIOVAL, val != 0); 98c103de24SGrant Likely } 99c103de24SGrant Likely 100c103de24SGrant Likely static int timbgpio_to_irq(struct gpio_chip *gpio, unsigned offset) 101c103de24SGrant Likely { 10292a41e2fSLinus Walleij struct timbgpio *tgpio = gpiochip_get_data(gpio); 103c103de24SGrant Likely 104c103de24SGrant Likely if (tgpio->irq_base <= 0) 105c103de24SGrant Likely return -EINVAL; 106c103de24SGrant Likely 107c103de24SGrant Likely return tgpio->irq_base + offset; 108c103de24SGrant Likely } 109c103de24SGrant Likely 110c103de24SGrant Likely /* 111c103de24SGrant Likely * GPIO IRQ 112c103de24SGrant Likely */ 113c103de24SGrant Likely static void timbgpio_irq_disable(struct irq_data *d) 114c103de24SGrant Likely { 115c103de24SGrant Likely struct timbgpio *tgpio = irq_data_get_irq_chip_data(d); 116c103de24SGrant Likely int offset = d->irq - tgpio->irq_base; 117c103de24SGrant Likely unsigned long flags; 118c103de24SGrant Likely 119c103de24SGrant Likely spin_lock_irqsave(&tgpio->lock, flags); 120d79550a7SDan Carpenter tgpio->last_ier &= ~(1UL << offset); 121c103de24SGrant Likely iowrite32(tgpio->last_ier, tgpio->membase + TGPIO_IER); 122c103de24SGrant Likely spin_unlock_irqrestore(&tgpio->lock, flags); 123c103de24SGrant Likely } 124c103de24SGrant Likely 125c103de24SGrant Likely static void timbgpio_irq_enable(struct irq_data *d) 126c103de24SGrant Likely { 127c103de24SGrant Likely struct timbgpio *tgpio = irq_data_get_irq_chip_data(d); 128c103de24SGrant Likely int offset = d->irq - tgpio->irq_base; 129c103de24SGrant Likely unsigned long flags; 130c103de24SGrant Likely 131c103de24SGrant Likely spin_lock_irqsave(&tgpio->lock, flags); 132d79550a7SDan Carpenter tgpio->last_ier |= 1UL << offset; 133c103de24SGrant Likely iowrite32(tgpio->last_ier, tgpio->membase + TGPIO_IER); 134c103de24SGrant Likely spin_unlock_irqrestore(&tgpio->lock, flags); 135c103de24SGrant Likely } 136c103de24SGrant Likely 137c103de24SGrant Likely static int timbgpio_irq_type(struct irq_data *d, unsigned trigger) 138c103de24SGrant Likely { 139c103de24SGrant Likely struct timbgpio *tgpio = irq_data_get_irq_chip_data(d); 140c103de24SGrant Likely int offset = d->irq - tgpio->irq_base; 141c103de24SGrant Likely unsigned long flags; 142c103de24SGrant Likely u32 lvr, flr, bflr = 0; 143c103de24SGrant Likely u32 ver; 144c103de24SGrant Likely int ret = 0; 145c103de24SGrant Likely 146c103de24SGrant Likely if (offset < 0 || offset > tgpio->gpio.ngpio) 147c103de24SGrant Likely return -EINVAL; 148c103de24SGrant Likely 149c103de24SGrant Likely ver = ioread32(tgpio->membase + TGPIO_VER); 150c103de24SGrant Likely 151c103de24SGrant Likely spin_lock_irqsave(&tgpio->lock, flags); 152c103de24SGrant Likely 153c103de24SGrant Likely lvr = ioread32(tgpio->membase + TGPIO_LVR); 154c103de24SGrant Likely flr = ioread32(tgpio->membase + TGPIO_FLR); 155c103de24SGrant Likely if (ver > 2) 156c103de24SGrant Likely bflr = ioread32(tgpio->membase + TGPIO_BFLR); 157c103de24SGrant Likely 158c103de24SGrant Likely if (trigger & (IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW)) { 159c103de24SGrant Likely bflr &= ~(1 << offset); 160c103de24SGrant Likely flr &= ~(1 << offset); 161c103de24SGrant Likely if (trigger & IRQ_TYPE_LEVEL_HIGH) 162c103de24SGrant Likely lvr |= 1 << offset; 163c103de24SGrant Likely else 164c103de24SGrant Likely lvr &= ~(1 << offset); 165c103de24SGrant Likely } 166c103de24SGrant Likely 167c103de24SGrant Likely if ((trigger & IRQ_TYPE_EDGE_BOTH) == IRQ_TYPE_EDGE_BOTH) { 168c103de24SGrant Likely if (ver < 3) { 169c103de24SGrant Likely ret = -EINVAL; 170c103de24SGrant Likely goto out; 1718a29a409SLaurent Navet } else { 172c103de24SGrant Likely flr |= 1 << offset; 173c103de24SGrant Likely bflr |= 1 << offset; 174c103de24SGrant Likely } 175c103de24SGrant Likely } else { 176c103de24SGrant Likely bflr &= ~(1 << offset); 177c103de24SGrant Likely flr |= 1 << offset; 178c103de24SGrant Likely if (trigger & IRQ_TYPE_EDGE_FALLING) 179c103de24SGrant Likely lvr &= ~(1 << offset); 180c103de24SGrant Likely else 181c103de24SGrant Likely lvr |= 1 << offset; 182c103de24SGrant Likely } 183c103de24SGrant Likely 184c103de24SGrant Likely iowrite32(lvr, tgpio->membase + TGPIO_LVR); 185c103de24SGrant Likely iowrite32(flr, tgpio->membase + TGPIO_FLR); 186c103de24SGrant Likely if (ver > 2) 187c103de24SGrant Likely iowrite32(bflr, tgpio->membase + TGPIO_BFLR); 188c103de24SGrant Likely 189c103de24SGrant Likely iowrite32(1 << offset, tgpio->membase + TGPIO_ICR); 190c103de24SGrant Likely 191c103de24SGrant Likely out: 192c103de24SGrant Likely spin_unlock_irqrestore(&tgpio->lock, flags); 193c103de24SGrant Likely return ret; 194c103de24SGrant Likely } 195c103de24SGrant Likely 196bd0b9ac4SThomas Gleixner static void timbgpio_irq(struct irq_desc *desc) 197c103de24SGrant Likely { 198476f8b4cSJiang Liu struct timbgpio *tgpio = irq_desc_get_handler_data(desc); 199476f8b4cSJiang Liu struct irq_data *data = irq_desc_get_irq_data(desc); 200c103de24SGrant Likely unsigned long ipr; 201c103de24SGrant Likely int offset; 202c103de24SGrant Likely 203476f8b4cSJiang Liu data->chip->irq_ack(data); 204c103de24SGrant Likely ipr = ioread32(tgpio->membase + TGPIO_IPR); 205c103de24SGrant Likely iowrite32(ipr, tgpio->membase + TGPIO_ICR); 206c103de24SGrant Likely 207c103de24SGrant Likely /* 208c103de24SGrant Likely * Some versions of the hardware trash the IER register if more than 209c103de24SGrant Likely * one interrupt is received simultaneously. 210c103de24SGrant Likely */ 211c103de24SGrant Likely iowrite32(0, tgpio->membase + TGPIO_IER); 212c103de24SGrant Likely 213c103de24SGrant Likely for_each_set_bit(offset, &ipr, tgpio->gpio.ngpio) 214c103de24SGrant Likely generic_handle_irq(timbgpio_to_irq(&tgpio->gpio, offset)); 215c103de24SGrant Likely 216c103de24SGrant Likely iowrite32(tgpio->last_ier, tgpio->membase + TGPIO_IER); 217c103de24SGrant Likely } 218c103de24SGrant Likely 219c103de24SGrant Likely static struct irq_chip timbgpio_irqchip = { 220c103de24SGrant Likely .name = "GPIO", 221c103de24SGrant Likely .irq_enable = timbgpio_irq_enable, 222c103de24SGrant Likely .irq_disable = timbgpio_irq_disable, 223c103de24SGrant Likely .irq_set_type = timbgpio_irq_type, 224c103de24SGrant Likely }; 225c103de24SGrant Likely 2263836309dSBill Pemberton static int timbgpio_probe(struct platform_device *pdev) 227c103de24SGrant Likely { 228c103de24SGrant Likely int err, i; 2290ed3398eSabdoulaye berthe struct device *dev = &pdev->dev; 230c103de24SGrant Likely struct gpio_chip *gc; 231c103de24SGrant Likely struct timbgpio *tgpio; 232c103de24SGrant Likely struct resource *iomem; 233e56aee18SJingoo Han struct timbgpio_platform_data *pdata = dev_get_platdata(&pdev->dev); 234c103de24SGrant Likely int irq = platform_get_irq(pdev, 0); 235c103de24SGrant Likely 236c103de24SGrant Likely if (!pdata || pdata->nr_pins > 32) { 2370ed3398eSabdoulaye berthe dev_err(dev, "Invalid platform data\n"); 2380ed3398eSabdoulaye berthe return -EINVAL; 239c103de24SGrant Likely } 240c103de24SGrant Likely 2410ed3398eSabdoulaye berthe tgpio = devm_kzalloc(dev, sizeof(struct timbgpio), GFP_KERNEL); 242*587ca5edSMarkus Elfring if (!tgpio) 2430ed3398eSabdoulaye berthe return -EINVAL; 244*587ca5edSMarkus Elfring 245c103de24SGrant Likely tgpio->irq_base = pdata->irq_base; 246c103de24SGrant Likely 247c103de24SGrant Likely spin_lock_init(&tgpio->lock); 248c103de24SGrant Likely 249fa283db7SAmitoj Kaur Chawla iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0); 250fa283db7SAmitoj Kaur Chawla tgpio->membase = devm_ioremap_resource(dev, iomem); 251fa283db7SAmitoj Kaur Chawla if (IS_ERR(tgpio->membase)) 252fa283db7SAmitoj Kaur Chawla return PTR_ERR(tgpio->membase); 253c103de24SGrant Likely 254c103de24SGrant Likely gc = &tgpio->gpio; 255c103de24SGrant Likely 256c103de24SGrant Likely gc->label = dev_name(&pdev->dev); 257c103de24SGrant Likely gc->owner = THIS_MODULE; 25858383c78SLinus Walleij gc->parent = &pdev->dev; 259c103de24SGrant Likely gc->direction_input = timbgpio_gpio_direction_input; 260c103de24SGrant Likely gc->get = timbgpio_gpio_get; 261c103de24SGrant Likely gc->direction_output = timbgpio_gpio_direction_output; 262c103de24SGrant Likely gc->set = timbgpio_gpio_set; 263c103de24SGrant Likely gc->to_irq = (irq >= 0 && tgpio->irq_base > 0) ? timbgpio_to_irq : NULL; 264c103de24SGrant Likely gc->dbg_show = NULL; 265c103de24SGrant Likely gc->base = pdata->gpio_base; 266c103de24SGrant Likely gc->ngpio = pdata->nr_pins; 2679fb1f39eSLinus Walleij gc->can_sleep = false; 268c103de24SGrant Likely 26943fad832SLaxman Dewangan err = devm_gpiochip_add_data(&pdev->dev, gc, tgpio); 270c103de24SGrant Likely if (err) 2710ed3398eSabdoulaye berthe return err; 272c103de24SGrant Likely 273c103de24SGrant Likely platform_set_drvdata(pdev, tgpio); 274c103de24SGrant Likely 275c103de24SGrant Likely /* make sure to disable interrupts */ 276c103de24SGrant Likely iowrite32(0x0, tgpio->membase + TGPIO_IER); 277c103de24SGrant Likely 278c103de24SGrant Likely if (irq < 0 || tgpio->irq_base <= 0) 279c103de24SGrant Likely return 0; 280c103de24SGrant Likely 281c103de24SGrant Likely for (i = 0; i < pdata->nr_pins; i++) { 282e5428a68SLinus Walleij irq_set_chip_and_handler(tgpio->irq_base + i, 283e5428a68SLinus Walleij &timbgpio_irqchip, handle_simple_irq); 284c103de24SGrant Likely irq_set_chip_data(tgpio->irq_base + i, tgpio); 28523393d49SRob Herring irq_clear_status_flags(tgpio->irq_base + i, IRQ_NOREQUEST | IRQ_NOPROBE); 286c103de24SGrant Likely } 287c103de24SGrant Likely 2888a52211aSThomas Gleixner irq_set_chained_handler_and_data(irq, timbgpio_irq, tgpio); 289c103de24SGrant Likely 290c103de24SGrant Likely return 0; 291c103de24SGrant Likely } 292c103de24SGrant Likely 293c103de24SGrant Likely static struct platform_driver timbgpio_platform_driver = { 294c103de24SGrant Likely .driver = { 295c103de24SGrant Likely .name = DRIVER_NAME, 29652ad9053SPaul Gortmaker .suppress_bind_attrs = true, 297c103de24SGrant Likely }, 298c103de24SGrant Likely .probe = timbgpio_probe, 299c103de24SGrant Likely }; 300c103de24SGrant Likely 301c103de24SGrant Likely /*--------------------------------------------------------------------------*/ 302c103de24SGrant Likely 30352ad9053SPaul Gortmaker builtin_platform_driver(timbgpio_platform_driver); 304