1c103de24SGrant Likely /* 2c103de24SGrant Likely * Copyright (C) ST-Ericsson SA 2010 3c103de24SGrant Likely * 4c103de24SGrant Likely * License Terms: GNU General Public License, version 2 5c103de24SGrant Likely * Author: Rabin Vincent <rabin.vincent@stericsson.com> for ST-Ericsson 6c103de24SGrant Likely */ 7c103de24SGrant Likely 8c103de24SGrant Likely #include <linux/module.h> 9c103de24SGrant Likely #include <linux/init.h> 10c103de24SGrant Likely #include <linux/platform_device.h> 11c103de24SGrant Likely #include <linux/slab.h> 12c103de24SGrant Likely #include <linux/gpio.h> 13c103de24SGrant Likely #include <linux/interrupt.h> 1486605cfeSVipul Kumar Samar #include <linux/of.h> 15c103de24SGrant Likely #include <linux/mfd/stmpe.h> 16c103de24SGrant Likely 17c103de24SGrant Likely /* 18c103de24SGrant Likely * These registers are modified under the irq bus lock and cached to avoid 19c103de24SGrant Likely * unnecessary writes in bus_sync_unlock. 20c103de24SGrant Likely */ 21c103de24SGrant Likely enum { REG_RE, REG_FE, REG_IE }; 22c103de24SGrant Likely 23c103de24SGrant Likely #define CACHE_NR_REGS 3 249e9dc7d9SLinus Walleij /* No variant has more than 24 GPIOs */ 259e9dc7d9SLinus Walleij #define CACHE_NR_BANKS (24 / 8) 26c103de24SGrant Likely 27c103de24SGrant Likely struct stmpe_gpio { 28c103de24SGrant Likely struct gpio_chip chip; 29c103de24SGrant Likely struct stmpe *stmpe; 30c103de24SGrant Likely struct device *dev; 31c103de24SGrant Likely struct mutex irq_lock; 32c103de24SGrant Likely unsigned norequest_mask; 33c103de24SGrant Likely /* Caches of interrupt control registers for bus_lock */ 34c103de24SGrant Likely u8 regs[CACHE_NR_REGS][CACHE_NR_BANKS]; 35c103de24SGrant Likely u8 oldregs[CACHE_NR_REGS][CACHE_NR_BANKS]; 36c103de24SGrant Likely }; 37c103de24SGrant Likely 38c103de24SGrant Likely static inline struct stmpe_gpio *to_stmpe_gpio(struct gpio_chip *chip) 39c103de24SGrant Likely { 40c103de24SGrant Likely return container_of(chip, struct stmpe_gpio, chip); 41c103de24SGrant Likely } 42c103de24SGrant Likely 43c103de24SGrant Likely static int stmpe_gpio_get(struct gpio_chip *chip, unsigned offset) 44c103de24SGrant Likely { 45c103de24SGrant Likely struct stmpe_gpio *stmpe_gpio = to_stmpe_gpio(chip); 46c103de24SGrant Likely struct stmpe *stmpe = stmpe_gpio->stmpe; 47c103de24SGrant Likely u8 reg = stmpe->regs[STMPE_IDX_GPMR_LSB] - (offset / 8); 48c103de24SGrant Likely u8 mask = 1 << (offset % 8); 49c103de24SGrant Likely int ret; 50c103de24SGrant Likely 51c103de24SGrant Likely ret = stmpe_reg_read(stmpe, reg); 52c103de24SGrant Likely if (ret < 0) 53c103de24SGrant Likely return ret; 54c103de24SGrant Likely 557535b8beSBhupesh Sharma return !!(ret & mask); 56c103de24SGrant Likely } 57c103de24SGrant Likely 58c103de24SGrant Likely static void stmpe_gpio_set(struct gpio_chip *chip, unsigned offset, int val) 59c103de24SGrant Likely { 60c103de24SGrant Likely struct stmpe_gpio *stmpe_gpio = to_stmpe_gpio(chip); 61c103de24SGrant Likely struct stmpe *stmpe = stmpe_gpio->stmpe; 62c103de24SGrant Likely int which = val ? STMPE_IDX_GPSR_LSB : STMPE_IDX_GPCR_LSB; 63c103de24SGrant Likely u8 reg = stmpe->regs[which] - (offset / 8); 64c103de24SGrant Likely u8 mask = 1 << (offset % 8); 65c103de24SGrant Likely 66cccdceb9SViresh Kumar /* 67cccdceb9SViresh Kumar * Some variants have single register for gpio set/clear functionality. 68cccdceb9SViresh Kumar * For them we need to write 0 to clear and 1 to set. 69cccdceb9SViresh Kumar */ 70cccdceb9SViresh Kumar if (stmpe->regs[STMPE_IDX_GPSR_LSB] == stmpe->regs[STMPE_IDX_GPCR_LSB]) 71cccdceb9SViresh Kumar stmpe_set_bits(stmpe, reg, mask, val ? mask : 0); 72cccdceb9SViresh Kumar else 73c103de24SGrant Likely stmpe_reg_write(stmpe, reg, mask); 74c103de24SGrant Likely } 75c103de24SGrant Likely 76c103de24SGrant Likely static int stmpe_gpio_direction_output(struct gpio_chip *chip, 77c103de24SGrant Likely unsigned offset, int val) 78c103de24SGrant Likely { 79c103de24SGrant Likely struct stmpe_gpio *stmpe_gpio = to_stmpe_gpio(chip); 80c103de24SGrant Likely struct stmpe *stmpe = stmpe_gpio->stmpe; 81c103de24SGrant Likely u8 reg = stmpe->regs[STMPE_IDX_GPDR_LSB] - (offset / 8); 82c103de24SGrant Likely u8 mask = 1 << (offset % 8); 83c103de24SGrant Likely 84c103de24SGrant Likely stmpe_gpio_set(chip, offset, val); 85c103de24SGrant Likely 86c103de24SGrant Likely return stmpe_set_bits(stmpe, reg, mask, mask); 87c103de24SGrant Likely } 88c103de24SGrant Likely 89c103de24SGrant Likely static int stmpe_gpio_direction_input(struct gpio_chip *chip, 90c103de24SGrant Likely unsigned offset) 91c103de24SGrant Likely { 92c103de24SGrant Likely struct stmpe_gpio *stmpe_gpio = to_stmpe_gpio(chip); 93c103de24SGrant Likely struct stmpe *stmpe = stmpe_gpio->stmpe; 94c103de24SGrant Likely u8 reg = stmpe->regs[STMPE_IDX_GPDR_LSB] - (offset / 8); 95c103de24SGrant Likely u8 mask = 1 << (offset % 8); 96c103de24SGrant Likely 97c103de24SGrant Likely return stmpe_set_bits(stmpe, reg, mask, 0); 98c103de24SGrant Likely } 99c103de24SGrant Likely 100c103de24SGrant Likely static int stmpe_gpio_request(struct gpio_chip *chip, unsigned offset) 101c103de24SGrant Likely { 102c103de24SGrant Likely struct stmpe_gpio *stmpe_gpio = to_stmpe_gpio(chip); 103c103de24SGrant Likely struct stmpe *stmpe = stmpe_gpio->stmpe; 104c103de24SGrant Likely 105c103de24SGrant Likely if (stmpe_gpio->norequest_mask & (1 << offset)) 106c103de24SGrant Likely return -EINVAL; 107c103de24SGrant Likely 108c103de24SGrant Likely return stmpe_set_altfunc(stmpe, 1 << offset, STMPE_BLOCK_GPIO); 109c103de24SGrant Likely } 110c103de24SGrant Likely 111c103de24SGrant Likely static struct gpio_chip template_chip = { 112c103de24SGrant Likely .label = "stmpe", 113c103de24SGrant Likely .owner = THIS_MODULE, 114c103de24SGrant Likely .direction_input = stmpe_gpio_direction_input, 115c103de24SGrant Likely .get = stmpe_gpio_get, 116c103de24SGrant Likely .direction_output = stmpe_gpio_direction_output, 117c103de24SGrant Likely .set = stmpe_gpio_set, 118c103de24SGrant Likely .request = stmpe_gpio_request, 1199fb1f39eSLinus Walleij .can_sleep = true, 120c103de24SGrant Likely }; 121c103de24SGrant Likely 122c103de24SGrant Likely static int stmpe_gpio_irq_set_type(struct irq_data *d, unsigned int type) 123c103de24SGrant Likely { 124*fe44e70dSLinus Walleij struct gpio_chip *gc = irq_data_get_irq_chip_data(d); 125*fe44e70dSLinus Walleij struct stmpe_gpio *stmpe_gpio = to_stmpe_gpio(gc); 126fc13d5a5SLee Jones int offset = d->hwirq; 127c103de24SGrant Likely int regoffset = offset / 8; 128c103de24SGrant Likely int mask = 1 << (offset % 8); 129c103de24SGrant Likely 130c103de24SGrant Likely if (type == IRQ_TYPE_LEVEL_LOW || type == IRQ_TYPE_LEVEL_HIGH) 131c103de24SGrant Likely return -EINVAL; 132c103de24SGrant Likely 133cccdceb9SViresh Kumar /* STMPE801 doesn't have RE and FE registers */ 134cccdceb9SViresh Kumar if (stmpe_gpio->stmpe->partnum == STMPE801) 135cccdceb9SViresh Kumar return 0; 136cccdceb9SViresh Kumar 137c103de24SGrant Likely if (type == IRQ_TYPE_EDGE_RISING) 138c103de24SGrant Likely stmpe_gpio->regs[REG_RE][regoffset] |= mask; 139c103de24SGrant Likely else 140c103de24SGrant Likely stmpe_gpio->regs[REG_RE][regoffset] &= ~mask; 141c103de24SGrant Likely 142c103de24SGrant Likely if (type == IRQ_TYPE_EDGE_FALLING) 143c103de24SGrant Likely stmpe_gpio->regs[REG_FE][regoffset] |= mask; 144c103de24SGrant Likely else 145c103de24SGrant Likely stmpe_gpio->regs[REG_FE][regoffset] &= ~mask; 146c103de24SGrant Likely 147c103de24SGrant Likely return 0; 148c103de24SGrant Likely } 149c103de24SGrant Likely 150c103de24SGrant Likely static void stmpe_gpio_irq_lock(struct irq_data *d) 151c103de24SGrant Likely { 152*fe44e70dSLinus Walleij struct gpio_chip *gc = irq_data_get_irq_chip_data(d); 153*fe44e70dSLinus Walleij struct stmpe_gpio *stmpe_gpio = to_stmpe_gpio(gc); 154c103de24SGrant Likely 155c103de24SGrant Likely mutex_lock(&stmpe_gpio->irq_lock); 156c103de24SGrant Likely } 157c103de24SGrant Likely 158c103de24SGrant Likely static void stmpe_gpio_irq_sync_unlock(struct irq_data *d) 159c103de24SGrant Likely { 160*fe44e70dSLinus Walleij struct gpio_chip *gc = irq_data_get_irq_chip_data(d); 161*fe44e70dSLinus Walleij struct stmpe_gpio *stmpe_gpio = to_stmpe_gpio(gc); 162c103de24SGrant Likely struct stmpe *stmpe = stmpe_gpio->stmpe; 163c103de24SGrant Likely int num_banks = DIV_ROUND_UP(stmpe->num_gpios, 8); 164c103de24SGrant Likely static const u8 regmap[] = { 165c103de24SGrant Likely [REG_RE] = STMPE_IDX_GPRER_LSB, 166c103de24SGrant Likely [REG_FE] = STMPE_IDX_GPFER_LSB, 167c103de24SGrant Likely [REG_IE] = STMPE_IDX_IEGPIOR_LSB, 168c103de24SGrant Likely }; 169c103de24SGrant Likely int i, j; 170c103de24SGrant Likely 171c103de24SGrant Likely for (i = 0; i < CACHE_NR_REGS; i++) { 172cccdceb9SViresh Kumar /* STMPE801 doesn't have RE and FE registers */ 173cccdceb9SViresh Kumar if ((stmpe->partnum == STMPE801) && 174cccdceb9SViresh Kumar (i != REG_IE)) 175cccdceb9SViresh Kumar continue; 176cccdceb9SViresh Kumar 177c103de24SGrant Likely for (j = 0; j < num_banks; j++) { 178c103de24SGrant Likely u8 old = stmpe_gpio->oldregs[i][j]; 179c103de24SGrant Likely u8 new = stmpe_gpio->regs[i][j]; 180c103de24SGrant Likely 181c103de24SGrant Likely if (new == old) 182c103de24SGrant Likely continue; 183c103de24SGrant Likely 184c103de24SGrant Likely stmpe_gpio->oldregs[i][j] = new; 185c103de24SGrant Likely stmpe_reg_write(stmpe, stmpe->regs[regmap[i]] - j, new); 186c103de24SGrant Likely } 187c103de24SGrant Likely } 188c103de24SGrant Likely 189c103de24SGrant Likely mutex_unlock(&stmpe_gpio->irq_lock); 190c103de24SGrant Likely } 191c103de24SGrant Likely 192c103de24SGrant Likely static void stmpe_gpio_irq_mask(struct irq_data *d) 193c103de24SGrant Likely { 194*fe44e70dSLinus Walleij struct gpio_chip *gc = irq_data_get_irq_chip_data(d); 195*fe44e70dSLinus Walleij struct stmpe_gpio *stmpe_gpio = to_stmpe_gpio(gc); 196fc13d5a5SLee Jones int offset = d->hwirq; 197c103de24SGrant Likely int regoffset = offset / 8; 198c103de24SGrant Likely int mask = 1 << (offset % 8); 199c103de24SGrant Likely 200c103de24SGrant Likely stmpe_gpio->regs[REG_IE][regoffset] &= ~mask; 201c103de24SGrant Likely } 202c103de24SGrant Likely 203c103de24SGrant Likely static void stmpe_gpio_irq_unmask(struct irq_data *d) 204c103de24SGrant Likely { 205*fe44e70dSLinus Walleij struct gpio_chip *gc = irq_data_get_irq_chip_data(d); 206*fe44e70dSLinus Walleij struct stmpe_gpio *stmpe_gpio = to_stmpe_gpio(gc); 207fc13d5a5SLee Jones int offset = d->hwirq; 208c103de24SGrant Likely int regoffset = offset / 8; 209c103de24SGrant Likely int mask = 1 << (offset % 8); 210c103de24SGrant Likely 211c103de24SGrant Likely stmpe_gpio->regs[REG_IE][regoffset] |= mask; 212c103de24SGrant Likely } 213c103de24SGrant Likely 214c103de24SGrant Likely static struct irq_chip stmpe_gpio_irq_chip = { 215c103de24SGrant Likely .name = "stmpe-gpio", 216c103de24SGrant Likely .irq_bus_lock = stmpe_gpio_irq_lock, 217c103de24SGrant Likely .irq_bus_sync_unlock = stmpe_gpio_irq_sync_unlock, 218c103de24SGrant Likely .irq_mask = stmpe_gpio_irq_mask, 219c103de24SGrant Likely .irq_unmask = stmpe_gpio_irq_unmask, 220c103de24SGrant Likely .irq_set_type = stmpe_gpio_irq_set_type, 221c103de24SGrant Likely }; 222c103de24SGrant Likely 223c103de24SGrant Likely static irqreturn_t stmpe_gpio_irq(int irq, void *dev) 224c103de24SGrant Likely { 225c103de24SGrant Likely struct stmpe_gpio *stmpe_gpio = dev; 226c103de24SGrant Likely struct stmpe *stmpe = stmpe_gpio->stmpe; 227c103de24SGrant Likely u8 statmsbreg = stmpe->regs[STMPE_IDX_ISGPIOR_MSB]; 228c103de24SGrant Likely int num_banks = DIV_ROUND_UP(stmpe->num_gpios, 8); 229c103de24SGrant Likely u8 status[num_banks]; 230c103de24SGrant Likely int ret; 231c103de24SGrant Likely int i; 232c103de24SGrant Likely 233c103de24SGrant Likely ret = stmpe_block_read(stmpe, statmsbreg, num_banks, status); 234c103de24SGrant Likely if (ret < 0) 235c103de24SGrant Likely return IRQ_NONE; 236c103de24SGrant Likely 237c103de24SGrant Likely for (i = 0; i < num_banks; i++) { 238c103de24SGrant Likely int bank = num_banks - i - 1; 239c103de24SGrant Likely unsigned int enabled = stmpe_gpio->regs[REG_IE][bank]; 240c103de24SGrant Likely unsigned int stat = status[i]; 241c103de24SGrant Likely 242c103de24SGrant Likely stat &= enabled; 243c103de24SGrant Likely if (!stat) 244c103de24SGrant Likely continue; 245c103de24SGrant Likely 246c103de24SGrant Likely while (stat) { 247c103de24SGrant Likely int bit = __ffs(stat); 248c103de24SGrant Likely int line = bank * 8 + bit; 249*fe44e70dSLinus Walleij int child_irq = irq_find_mapping(stmpe_gpio->chip.irqdomain, 250ed05e204SLinus Walleij line); 251c103de24SGrant Likely 252ed05e204SLinus Walleij handle_nested_irq(child_irq); 253c103de24SGrant Likely stat &= ~(1 << bit); 254c103de24SGrant Likely } 255c103de24SGrant Likely 256c103de24SGrant Likely stmpe_reg_write(stmpe, statmsbreg + i, status[i]); 257cccdceb9SViresh Kumar 258cccdceb9SViresh Kumar /* Edge detect register is not present on 801 */ 259cccdceb9SViresh Kumar if (stmpe->partnum != STMPE801) 260cccdceb9SViresh Kumar stmpe_reg_write(stmpe, stmpe->regs[STMPE_IDX_GPEDR_MSB] 261cccdceb9SViresh Kumar + i, status[i]); 262c103de24SGrant Likely } 263c103de24SGrant Likely 264c103de24SGrant Likely return IRQ_HANDLED; 265c103de24SGrant Likely } 266c103de24SGrant Likely 2673836309dSBill Pemberton static int stmpe_gpio_probe(struct platform_device *pdev) 268c103de24SGrant Likely { 269c103de24SGrant Likely struct stmpe *stmpe = dev_get_drvdata(pdev->dev.parent); 27086605cfeSVipul Kumar Samar struct device_node *np = pdev->dev.of_node; 271c103de24SGrant Likely struct stmpe_gpio_platform_data *pdata; 272c103de24SGrant Likely struct stmpe_gpio *stmpe_gpio; 273c103de24SGrant Likely int ret; 27438040c85SChris Blair int irq = 0; 275c103de24SGrant Likely 276c103de24SGrant Likely pdata = stmpe->pdata->gpio; 277c103de24SGrant Likely 278c103de24SGrant Likely irq = platform_get_irq(pdev, 0); 279c103de24SGrant Likely 280c103de24SGrant Likely stmpe_gpio = kzalloc(sizeof(struct stmpe_gpio), GFP_KERNEL); 281c103de24SGrant Likely if (!stmpe_gpio) 282c103de24SGrant Likely return -ENOMEM; 283c103de24SGrant Likely 284c103de24SGrant Likely mutex_init(&stmpe_gpio->irq_lock); 285c103de24SGrant Likely 286c103de24SGrant Likely stmpe_gpio->dev = &pdev->dev; 287c103de24SGrant Likely stmpe_gpio->stmpe = stmpe; 288c103de24SGrant Likely stmpe_gpio->chip = template_chip; 289c103de24SGrant Likely stmpe_gpio->chip.ngpio = stmpe->num_gpios; 290c103de24SGrant Likely stmpe_gpio->chip.dev = &pdev->dev; 2919afd9b70SGabriel Fernandez #ifdef CONFIG_OF 2929afd9b70SGabriel Fernandez stmpe_gpio->chip.of_node = np; 2939afd9b70SGabriel Fernandez #endif 2949e9dc7d9SLinus Walleij stmpe_gpio->chip.base = -1; 295c103de24SGrant Likely 29686605cfeSVipul Kumar Samar if (pdata) 29786605cfeSVipul Kumar Samar stmpe_gpio->norequest_mask = pdata->norequest_mask; 29886605cfeSVipul Kumar Samar else if (np) 29986605cfeSVipul Kumar Samar of_property_read_u32(np, "st,norequest-mask", 30086605cfeSVipul Kumar Samar &stmpe_gpio->norequest_mask); 30186605cfeSVipul Kumar Samar 3029e9dc7d9SLinus Walleij if (irq < 0) 30338040c85SChris Blair dev_info(&pdev->dev, 304*fe44e70dSLinus Walleij "device configured in no-irq mode: " 30538040c85SChris Blair "irqs are not available\n"); 306c103de24SGrant Likely 307c103de24SGrant Likely ret = stmpe_enable(stmpe, STMPE_BLOCK_GPIO); 308c103de24SGrant Likely if (ret) 309c103de24SGrant Likely goto out_free; 310c103de24SGrant Likely 311*fe44e70dSLinus Walleij if (irq > 0) { 312*fe44e70dSLinus Walleij ret = devm_request_threaded_irq(&pdev->dev, irq, NULL, 313*fe44e70dSLinus Walleij stmpe_gpio_irq, IRQF_ONESHOT, 314*fe44e70dSLinus Walleij "stmpe-gpio", stmpe_gpio); 315c103de24SGrant Likely if (ret) { 316c103de24SGrant Likely dev_err(&pdev->dev, "unable to get irq: %d\n", ret); 317fc13d5a5SLee Jones goto out_disable; 318c103de24SGrant Likely } 319*fe44e70dSLinus Walleij ret = gpiochip_irqchip_add(&stmpe_gpio->chip, 320*fe44e70dSLinus Walleij &stmpe_gpio_irq_chip, 321*fe44e70dSLinus Walleij 0, 322*fe44e70dSLinus Walleij handle_simple_irq, 323*fe44e70dSLinus Walleij IRQ_TYPE_NONE); 324*fe44e70dSLinus Walleij if (ret) { 325*fe44e70dSLinus Walleij dev_err(&pdev->dev, 326*fe44e70dSLinus Walleij "could not connect irqchip to gpiochip\n"); 327*fe44e70dSLinus Walleij return ret; 328*fe44e70dSLinus Walleij } 32938040c85SChris Blair } 330c103de24SGrant Likely 331c103de24SGrant Likely ret = gpiochip_add(&stmpe_gpio->chip); 332c103de24SGrant Likely if (ret) { 333c103de24SGrant Likely dev_err(&pdev->dev, "unable to add gpiochip: %d\n", ret); 334*fe44e70dSLinus Walleij goto out_disable; 335c103de24SGrant Likely } 336c103de24SGrant Likely 337c103de24SGrant Likely if (pdata && pdata->setup) 338c103de24SGrant Likely pdata->setup(stmpe, stmpe_gpio->chip.base); 339c103de24SGrant Likely 340c103de24SGrant Likely platform_set_drvdata(pdev, stmpe_gpio); 341c103de24SGrant Likely 342c103de24SGrant Likely return 0; 343c103de24SGrant Likely 344c103de24SGrant Likely out_disable: 345c103de24SGrant Likely stmpe_disable(stmpe, STMPE_BLOCK_GPIO); 346c103de24SGrant Likely out_free: 347c103de24SGrant Likely kfree(stmpe_gpio); 348c103de24SGrant Likely return ret; 349c103de24SGrant Likely } 350c103de24SGrant Likely 351206210ceSBill Pemberton static int stmpe_gpio_remove(struct platform_device *pdev) 352c103de24SGrant Likely { 353c103de24SGrant Likely struct stmpe_gpio *stmpe_gpio = platform_get_drvdata(pdev); 354c103de24SGrant Likely struct stmpe *stmpe = stmpe_gpio->stmpe; 355c103de24SGrant Likely struct stmpe_gpio_platform_data *pdata = stmpe->pdata->gpio; 356c103de24SGrant Likely int ret; 357c103de24SGrant Likely 358c103de24SGrant Likely if (pdata && pdata->remove) 359c103de24SGrant Likely pdata->remove(stmpe, stmpe_gpio->chip.base); 360c103de24SGrant Likely 361c103de24SGrant Likely ret = gpiochip_remove(&stmpe_gpio->chip); 362c103de24SGrant Likely if (ret < 0) { 363c103de24SGrant Likely dev_err(stmpe_gpio->dev, 364c103de24SGrant Likely "unable to remove gpiochip: %d\n", ret); 365c103de24SGrant Likely return ret; 366c103de24SGrant Likely } 367c103de24SGrant Likely 368c103de24SGrant Likely stmpe_disable(stmpe, STMPE_BLOCK_GPIO); 369c103de24SGrant Likely 370c103de24SGrant Likely kfree(stmpe_gpio); 371c103de24SGrant Likely 372c103de24SGrant Likely return 0; 373c103de24SGrant Likely } 374c103de24SGrant Likely 375c103de24SGrant Likely static struct platform_driver stmpe_gpio_driver = { 376c103de24SGrant Likely .driver.name = "stmpe-gpio", 377c103de24SGrant Likely .driver.owner = THIS_MODULE, 378c103de24SGrant Likely .probe = stmpe_gpio_probe, 3798283c4ffSBill Pemberton .remove = stmpe_gpio_remove, 380c103de24SGrant Likely }; 381c103de24SGrant Likely 382c103de24SGrant Likely static int __init stmpe_gpio_init(void) 383c103de24SGrant Likely { 384c103de24SGrant Likely return platform_driver_register(&stmpe_gpio_driver); 385c103de24SGrant Likely } 386c103de24SGrant Likely subsys_initcall(stmpe_gpio_init); 387c103de24SGrant Likely 388c103de24SGrant Likely static void __exit stmpe_gpio_exit(void) 389c103de24SGrant Likely { 390c103de24SGrant Likely platform_driver_unregister(&stmpe_gpio_driver); 391c103de24SGrant Likely } 392c103de24SGrant Likely module_exit(stmpe_gpio_exit); 393c103de24SGrant Likely 394c103de24SGrant Likely MODULE_LICENSE("GPL v2"); 395c103de24SGrant Likely MODULE_DESCRIPTION("STMPExxxx GPIO driver"); 396c103de24SGrant Likely MODULE_AUTHOR("Rabin Vincent <rabin.vincent@stericsson.com>"); 397