1c103de24SGrant Likely /* 2c103de24SGrant Likely * Copyright (C) ST-Ericsson SA 2010 3c103de24SGrant Likely * 4c103de24SGrant Likely * License Terms: GNU General Public License, version 2 5c103de24SGrant Likely * Author: Rabin Vincent <rabin.vincent@stericsson.com> for ST-Ericsson 6c103de24SGrant Likely */ 7c103de24SGrant Likely 8c103de24SGrant Likely #include <linux/module.h> 9c103de24SGrant Likely #include <linux/init.h> 10c103de24SGrant Likely #include <linux/platform_device.h> 11c103de24SGrant Likely #include <linux/slab.h> 12c103de24SGrant Likely #include <linux/gpio.h> 13c103de24SGrant Likely #include <linux/irq.h> 14c103de24SGrant Likely #include <linux/interrupt.h> 15*86605cfeSVipul Kumar Samar #include <linux/of.h> 16c103de24SGrant Likely #include <linux/mfd/stmpe.h> 17c103de24SGrant Likely 18c103de24SGrant Likely /* 19c103de24SGrant Likely * These registers are modified under the irq bus lock and cached to avoid 20c103de24SGrant Likely * unnecessary writes in bus_sync_unlock. 21c103de24SGrant Likely */ 22c103de24SGrant Likely enum { REG_RE, REG_FE, REG_IE }; 23c103de24SGrant Likely 24c103de24SGrant Likely #define CACHE_NR_REGS 3 25c103de24SGrant Likely #define CACHE_NR_BANKS (STMPE_NR_GPIOS / 8) 26c103de24SGrant Likely 27c103de24SGrant Likely struct stmpe_gpio { 28c103de24SGrant Likely struct gpio_chip chip; 29c103de24SGrant Likely struct stmpe *stmpe; 30c103de24SGrant Likely struct device *dev; 31c103de24SGrant Likely struct mutex irq_lock; 32c103de24SGrant Likely 33c103de24SGrant Likely int irq_base; 34c103de24SGrant Likely unsigned norequest_mask; 35c103de24SGrant Likely 36c103de24SGrant Likely /* Caches of interrupt control registers for bus_lock */ 37c103de24SGrant Likely u8 regs[CACHE_NR_REGS][CACHE_NR_BANKS]; 38c103de24SGrant Likely u8 oldregs[CACHE_NR_REGS][CACHE_NR_BANKS]; 39c103de24SGrant Likely }; 40c103de24SGrant Likely 41c103de24SGrant Likely static inline struct stmpe_gpio *to_stmpe_gpio(struct gpio_chip *chip) 42c103de24SGrant Likely { 43c103de24SGrant Likely return container_of(chip, struct stmpe_gpio, chip); 44c103de24SGrant Likely } 45c103de24SGrant Likely 46c103de24SGrant Likely static int stmpe_gpio_get(struct gpio_chip *chip, unsigned offset) 47c103de24SGrant Likely { 48c103de24SGrant Likely struct stmpe_gpio *stmpe_gpio = to_stmpe_gpio(chip); 49c103de24SGrant Likely struct stmpe *stmpe = stmpe_gpio->stmpe; 50c103de24SGrant Likely u8 reg = stmpe->regs[STMPE_IDX_GPMR_LSB] - (offset / 8); 51c103de24SGrant Likely u8 mask = 1 << (offset % 8); 52c103de24SGrant Likely int ret; 53c103de24SGrant Likely 54c103de24SGrant Likely ret = stmpe_reg_read(stmpe, reg); 55c103de24SGrant Likely if (ret < 0) 56c103de24SGrant Likely return ret; 57c103de24SGrant Likely 587535b8beSBhupesh Sharma return !!(ret & mask); 59c103de24SGrant Likely } 60c103de24SGrant Likely 61c103de24SGrant Likely static void stmpe_gpio_set(struct gpio_chip *chip, unsigned offset, int val) 62c103de24SGrant Likely { 63c103de24SGrant Likely struct stmpe_gpio *stmpe_gpio = to_stmpe_gpio(chip); 64c103de24SGrant Likely struct stmpe *stmpe = stmpe_gpio->stmpe; 65c103de24SGrant Likely int which = val ? STMPE_IDX_GPSR_LSB : STMPE_IDX_GPCR_LSB; 66c103de24SGrant Likely u8 reg = stmpe->regs[which] - (offset / 8); 67c103de24SGrant Likely u8 mask = 1 << (offset % 8); 68c103de24SGrant Likely 69cccdceb9SViresh Kumar /* 70cccdceb9SViresh Kumar * Some variants have single register for gpio set/clear functionality. 71cccdceb9SViresh Kumar * For them we need to write 0 to clear and 1 to set. 72cccdceb9SViresh Kumar */ 73cccdceb9SViresh Kumar if (stmpe->regs[STMPE_IDX_GPSR_LSB] == stmpe->regs[STMPE_IDX_GPCR_LSB]) 74cccdceb9SViresh Kumar stmpe_set_bits(stmpe, reg, mask, val ? mask : 0); 75cccdceb9SViresh Kumar else 76c103de24SGrant Likely stmpe_reg_write(stmpe, reg, mask); 77c103de24SGrant Likely } 78c103de24SGrant Likely 79c103de24SGrant Likely static int stmpe_gpio_direction_output(struct gpio_chip *chip, 80c103de24SGrant Likely unsigned offset, int val) 81c103de24SGrant Likely { 82c103de24SGrant Likely struct stmpe_gpio *stmpe_gpio = to_stmpe_gpio(chip); 83c103de24SGrant Likely struct stmpe *stmpe = stmpe_gpio->stmpe; 84c103de24SGrant Likely u8 reg = stmpe->regs[STMPE_IDX_GPDR_LSB] - (offset / 8); 85c103de24SGrant Likely u8 mask = 1 << (offset % 8); 86c103de24SGrant Likely 87c103de24SGrant Likely stmpe_gpio_set(chip, offset, val); 88c103de24SGrant Likely 89c103de24SGrant Likely return stmpe_set_bits(stmpe, reg, mask, mask); 90c103de24SGrant Likely } 91c103de24SGrant Likely 92c103de24SGrant Likely static int stmpe_gpio_direction_input(struct gpio_chip *chip, 93c103de24SGrant Likely unsigned offset) 94c103de24SGrant Likely { 95c103de24SGrant Likely struct stmpe_gpio *stmpe_gpio = to_stmpe_gpio(chip); 96c103de24SGrant Likely struct stmpe *stmpe = stmpe_gpio->stmpe; 97c103de24SGrant Likely u8 reg = stmpe->regs[STMPE_IDX_GPDR_LSB] - (offset / 8); 98c103de24SGrant Likely u8 mask = 1 << (offset % 8); 99c103de24SGrant Likely 100c103de24SGrant Likely return stmpe_set_bits(stmpe, reg, mask, 0); 101c103de24SGrant Likely } 102c103de24SGrant Likely 103c103de24SGrant Likely static int stmpe_gpio_to_irq(struct gpio_chip *chip, unsigned offset) 104c103de24SGrant Likely { 105c103de24SGrant Likely struct stmpe_gpio *stmpe_gpio = to_stmpe_gpio(chip); 106c103de24SGrant Likely 107c103de24SGrant Likely return stmpe_gpio->irq_base + offset; 108c103de24SGrant Likely } 109c103de24SGrant Likely 110c103de24SGrant Likely static int stmpe_gpio_request(struct gpio_chip *chip, unsigned offset) 111c103de24SGrant Likely { 112c103de24SGrant Likely struct stmpe_gpio *stmpe_gpio = to_stmpe_gpio(chip); 113c103de24SGrant Likely struct stmpe *stmpe = stmpe_gpio->stmpe; 114c103de24SGrant Likely 115c103de24SGrant Likely if (stmpe_gpio->norequest_mask & (1 << offset)) 116c103de24SGrant Likely return -EINVAL; 117c103de24SGrant Likely 118c103de24SGrant Likely return stmpe_set_altfunc(stmpe, 1 << offset, STMPE_BLOCK_GPIO); 119c103de24SGrant Likely } 120c103de24SGrant Likely 121c103de24SGrant Likely static struct gpio_chip template_chip = { 122c103de24SGrant Likely .label = "stmpe", 123c103de24SGrant Likely .owner = THIS_MODULE, 124c103de24SGrant Likely .direction_input = stmpe_gpio_direction_input, 125c103de24SGrant Likely .get = stmpe_gpio_get, 126c103de24SGrant Likely .direction_output = stmpe_gpio_direction_output, 127c103de24SGrant Likely .set = stmpe_gpio_set, 128c103de24SGrant Likely .to_irq = stmpe_gpio_to_irq, 129c103de24SGrant Likely .request = stmpe_gpio_request, 130c103de24SGrant Likely .can_sleep = 1, 131c103de24SGrant Likely }; 132c103de24SGrant Likely 133c103de24SGrant Likely static int stmpe_gpio_irq_set_type(struct irq_data *d, unsigned int type) 134c103de24SGrant Likely { 135c103de24SGrant Likely struct stmpe_gpio *stmpe_gpio = irq_data_get_irq_chip_data(d); 136c103de24SGrant Likely int offset = d->irq - stmpe_gpio->irq_base; 137c103de24SGrant Likely int regoffset = offset / 8; 138c103de24SGrant Likely int mask = 1 << (offset % 8); 139c103de24SGrant Likely 140c103de24SGrant Likely if (type == IRQ_TYPE_LEVEL_LOW || type == IRQ_TYPE_LEVEL_HIGH) 141c103de24SGrant Likely return -EINVAL; 142c103de24SGrant Likely 143cccdceb9SViresh Kumar /* STMPE801 doesn't have RE and FE registers */ 144cccdceb9SViresh Kumar if (stmpe_gpio->stmpe->partnum == STMPE801) 145cccdceb9SViresh Kumar return 0; 146cccdceb9SViresh Kumar 147c103de24SGrant Likely if (type == IRQ_TYPE_EDGE_RISING) 148c103de24SGrant Likely stmpe_gpio->regs[REG_RE][regoffset] |= mask; 149c103de24SGrant Likely else 150c103de24SGrant Likely stmpe_gpio->regs[REG_RE][regoffset] &= ~mask; 151c103de24SGrant Likely 152c103de24SGrant Likely if (type == IRQ_TYPE_EDGE_FALLING) 153c103de24SGrant Likely stmpe_gpio->regs[REG_FE][regoffset] |= mask; 154c103de24SGrant Likely else 155c103de24SGrant Likely stmpe_gpio->regs[REG_FE][regoffset] &= ~mask; 156c103de24SGrant Likely 157c103de24SGrant Likely return 0; 158c103de24SGrant Likely } 159c103de24SGrant Likely 160c103de24SGrant Likely static void stmpe_gpio_irq_lock(struct irq_data *d) 161c103de24SGrant Likely { 162c103de24SGrant Likely struct stmpe_gpio *stmpe_gpio = irq_data_get_irq_chip_data(d); 163c103de24SGrant Likely 164c103de24SGrant Likely mutex_lock(&stmpe_gpio->irq_lock); 165c103de24SGrant Likely } 166c103de24SGrant Likely 167c103de24SGrant Likely static void stmpe_gpio_irq_sync_unlock(struct irq_data *d) 168c103de24SGrant Likely { 169c103de24SGrant Likely struct stmpe_gpio *stmpe_gpio = irq_data_get_irq_chip_data(d); 170c103de24SGrant Likely struct stmpe *stmpe = stmpe_gpio->stmpe; 171c103de24SGrant Likely int num_banks = DIV_ROUND_UP(stmpe->num_gpios, 8); 172c103de24SGrant Likely static const u8 regmap[] = { 173c103de24SGrant Likely [REG_RE] = STMPE_IDX_GPRER_LSB, 174c103de24SGrant Likely [REG_FE] = STMPE_IDX_GPFER_LSB, 175c103de24SGrant Likely [REG_IE] = STMPE_IDX_IEGPIOR_LSB, 176c103de24SGrant Likely }; 177c103de24SGrant Likely int i, j; 178c103de24SGrant Likely 179c103de24SGrant Likely for (i = 0; i < CACHE_NR_REGS; i++) { 180cccdceb9SViresh Kumar /* STMPE801 doesn't have RE and FE registers */ 181cccdceb9SViresh Kumar if ((stmpe->partnum == STMPE801) && 182cccdceb9SViresh Kumar (i != REG_IE)) 183cccdceb9SViresh Kumar continue; 184cccdceb9SViresh Kumar 185c103de24SGrant Likely for (j = 0; j < num_banks; j++) { 186c103de24SGrant Likely u8 old = stmpe_gpio->oldregs[i][j]; 187c103de24SGrant Likely u8 new = stmpe_gpio->regs[i][j]; 188c103de24SGrant Likely 189c103de24SGrant Likely if (new == old) 190c103de24SGrant Likely continue; 191c103de24SGrant Likely 192c103de24SGrant Likely stmpe_gpio->oldregs[i][j] = new; 193c103de24SGrant Likely stmpe_reg_write(stmpe, stmpe->regs[regmap[i]] - j, new); 194c103de24SGrant Likely } 195c103de24SGrant Likely } 196c103de24SGrant Likely 197c103de24SGrant Likely mutex_unlock(&stmpe_gpio->irq_lock); 198c103de24SGrant Likely } 199c103de24SGrant Likely 200c103de24SGrant Likely static void stmpe_gpio_irq_mask(struct irq_data *d) 201c103de24SGrant Likely { 202c103de24SGrant Likely struct stmpe_gpio *stmpe_gpio = irq_data_get_irq_chip_data(d); 203c103de24SGrant Likely int offset = d->irq - stmpe_gpio->irq_base; 204c103de24SGrant Likely int regoffset = offset / 8; 205c103de24SGrant Likely int mask = 1 << (offset % 8); 206c103de24SGrant Likely 207c103de24SGrant Likely stmpe_gpio->regs[REG_IE][regoffset] &= ~mask; 208c103de24SGrant Likely } 209c103de24SGrant Likely 210c103de24SGrant Likely static void stmpe_gpio_irq_unmask(struct irq_data *d) 211c103de24SGrant Likely { 212c103de24SGrant Likely struct stmpe_gpio *stmpe_gpio = irq_data_get_irq_chip_data(d); 213c103de24SGrant Likely int offset = d->irq - stmpe_gpio->irq_base; 214c103de24SGrant Likely int regoffset = offset / 8; 215c103de24SGrant Likely int mask = 1 << (offset % 8); 216c103de24SGrant Likely 217c103de24SGrant Likely stmpe_gpio->regs[REG_IE][regoffset] |= mask; 218c103de24SGrant Likely } 219c103de24SGrant Likely 220c103de24SGrant Likely static struct irq_chip stmpe_gpio_irq_chip = { 221c103de24SGrant Likely .name = "stmpe-gpio", 222c103de24SGrant Likely .irq_bus_lock = stmpe_gpio_irq_lock, 223c103de24SGrant Likely .irq_bus_sync_unlock = stmpe_gpio_irq_sync_unlock, 224c103de24SGrant Likely .irq_mask = stmpe_gpio_irq_mask, 225c103de24SGrant Likely .irq_unmask = stmpe_gpio_irq_unmask, 226c103de24SGrant Likely .irq_set_type = stmpe_gpio_irq_set_type, 227c103de24SGrant Likely }; 228c103de24SGrant Likely 229c103de24SGrant Likely static irqreturn_t stmpe_gpio_irq(int irq, void *dev) 230c103de24SGrant Likely { 231c103de24SGrant Likely struct stmpe_gpio *stmpe_gpio = dev; 232c103de24SGrant Likely struct stmpe *stmpe = stmpe_gpio->stmpe; 233c103de24SGrant Likely u8 statmsbreg = stmpe->regs[STMPE_IDX_ISGPIOR_MSB]; 234c103de24SGrant Likely int num_banks = DIV_ROUND_UP(stmpe->num_gpios, 8); 235c103de24SGrant Likely u8 status[num_banks]; 236c103de24SGrant Likely int ret; 237c103de24SGrant Likely int i; 238c103de24SGrant Likely 239c103de24SGrant Likely ret = stmpe_block_read(stmpe, statmsbreg, num_banks, status); 240c103de24SGrant Likely if (ret < 0) 241c103de24SGrant Likely return IRQ_NONE; 242c103de24SGrant Likely 243c103de24SGrant Likely for (i = 0; i < num_banks; i++) { 244c103de24SGrant Likely int bank = num_banks - i - 1; 245c103de24SGrant Likely unsigned int enabled = stmpe_gpio->regs[REG_IE][bank]; 246c103de24SGrant Likely unsigned int stat = status[i]; 247c103de24SGrant Likely 248c103de24SGrant Likely stat &= enabled; 249c103de24SGrant Likely if (!stat) 250c103de24SGrant Likely continue; 251c103de24SGrant Likely 252c103de24SGrant Likely while (stat) { 253c103de24SGrant Likely int bit = __ffs(stat); 254c103de24SGrant Likely int line = bank * 8 + bit; 255c103de24SGrant Likely 256c103de24SGrant Likely handle_nested_irq(stmpe_gpio->irq_base + line); 257c103de24SGrant Likely stat &= ~(1 << bit); 258c103de24SGrant Likely } 259c103de24SGrant Likely 260c103de24SGrant Likely stmpe_reg_write(stmpe, statmsbreg + i, status[i]); 261cccdceb9SViresh Kumar 262cccdceb9SViresh Kumar /* Edge detect register is not present on 801 */ 263cccdceb9SViresh Kumar if (stmpe->partnum != STMPE801) 264cccdceb9SViresh Kumar stmpe_reg_write(stmpe, stmpe->regs[STMPE_IDX_GPEDR_MSB] 265cccdceb9SViresh Kumar + i, status[i]); 266c103de24SGrant Likely } 267c103de24SGrant Likely 268c103de24SGrant Likely return IRQ_HANDLED; 269c103de24SGrant Likely } 270c103de24SGrant Likely 271c103de24SGrant Likely static int __devinit stmpe_gpio_irq_init(struct stmpe_gpio *stmpe_gpio) 272c103de24SGrant Likely { 273c103de24SGrant Likely int base = stmpe_gpio->irq_base; 274c103de24SGrant Likely int irq; 275c103de24SGrant Likely 276c103de24SGrant Likely for (irq = base; irq < base + stmpe_gpio->chip.ngpio; irq++) { 277c103de24SGrant Likely irq_set_chip_data(irq, stmpe_gpio); 278c103de24SGrant Likely irq_set_chip_and_handler(irq, &stmpe_gpio_irq_chip, 279c103de24SGrant Likely handle_simple_irq); 280c103de24SGrant Likely irq_set_nested_thread(irq, 1); 281c103de24SGrant Likely #ifdef CONFIG_ARM 282c103de24SGrant Likely set_irq_flags(irq, IRQF_VALID); 283c103de24SGrant Likely #else 284c103de24SGrant Likely irq_set_noprobe(irq); 285c103de24SGrant Likely #endif 286c103de24SGrant Likely } 287c103de24SGrant Likely 288c103de24SGrant Likely return 0; 289c103de24SGrant Likely } 290c103de24SGrant Likely 291c103de24SGrant Likely static void stmpe_gpio_irq_remove(struct stmpe_gpio *stmpe_gpio) 292c103de24SGrant Likely { 293c103de24SGrant Likely int base = stmpe_gpio->irq_base; 294c103de24SGrant Likely int irq; 295c103de24SGrant Likely 296c103de24SGrant Likely for (irq = base; irq < base + stmpe_gpio->chip.ngpio; irq++) { 297c103de24SGrant Likely #ifdef CONFIG_ARM 298c103de24SGrant Likely set_irq_flags(irq, 0); 299c103de24SGrant Likely #endif 300c103de24SGrant Likely irq_set_chip_and_handler(irq, NULL, NULL); 301c103de24SGrant Likely irq_set_chip_data(irq, NULL); 302c103de24SGrant Likely } 303c103de24SGrant Likely } 304c103de24SGrant Likely 305c103de24SGrant Likely static int __devinit stmpe_gpio_probe(struct platform_device *pdev) 306c103de24SGrant Likely { 307c103de24SGrant Likely struct stmpe *stmpe = dev_get_drvdata(pdev->dev.parent); 308*86605cfeSVipul Kumar Samar struct device_node *np = pdev->dev.of_node; 309c103de24SGrant Likely struct stmpe_gpio_platform_data *pdata; 310c103de24SGrant Likely struct stmpe_gpio *stmpe_gpio; 311c103de24SGrant Likely int ret; 31238040c85SChris Blair int irq = 0; 313c103de24SGrant Likely 314c103de24SGrant Likely pdata = stmpe->pdata->gpio; 315c103de24SGrant Likely 316c103de24SGrant Likely irq = platform_get_irq(pdev, 0); 317c103de24SGrant Likely 318c103de24SGrant Likely stmpe_gpio = kzalloc(sizeof(struct stmpe_gpio), GFP_KERNEL); 319c103de24SGrant Likely if (!stmpe_gpio) 320c103de24SGrant Likely return -ENOMEM; 321c103de24SGrant Likely 322c103de24SGrant Likely mutex_init(&stmpe_gpio->irq_lock); 323c103de24SGrant Likely 324c103de24SGrant Likely stmpe_gpio->dev = &pdev->dev; 325c103de24SGrant Likely stmpe_gpio->stmpe = stmpe; 326c103de24SGrant Likely stmpe_gpio->chip = template_chip; 327c103de24SGrant Likely stmpe_gpio->chip.ngpio = stmpe->num_gpios; 328c103de24SGrant Likely stmpe_gpio->chip.dev = &pdev->dev; 329c103de24SGrant Likely stmpe_gpio->chip.base = pdata ? pdata->gpio_base : -1; 330c103de24SGrant Likely 331*86605cfeSVipul Kumar Samar if (pdata) 332*86605cfeSVipul Kumar Samar stmpe_gpio->norequest_mask = pdata->norequest_mask; 333*86605cfeSVipul Kumar Samar else if (np) 334*86605cfeSVipul Kumar Samar of_property_read_u32(np, "st,norequest-mask", 335*86605cfeSVipul Kumar Samar &stmpe_gpio->norequest_mask); 336*86605cfeSVipul Kumar Samar 33738040c85SChris Blair if (irq >= 0) 338c103de24SGrant Likely stmpe_gpio->irq_base = stmpe->irq_base + STMPE_INT_GPIO(0); 33938040c85SChris Blair else 34038040c85SChris Blair dev_info(&pdev->dev, 34138040c85SChris Blair "device configured in no-irq mode; " 34238040c85SChris Blair "irqs are not available\n"); 343c103de24SGrant Likely 344c103de24SGrant Likely ret = stmpe_enable(stmpe, STMPE_BLOCK_GPIO); 345c103de24SGrant Likely if (ret) 346c103de24SGrant Likely goto out_free; 347c103de24SGrant Likely 34838040c85SChris Blair if (irq >= 0) { 349c103de24SGrant Likely ret = stmpe_gpio_irq_init(stmpe_gpio); 350c103de24SGrant Likely if (ret) 351c103de24SGrant Likely goto out_disable; 352c103de24SGrant Likely 35338040c85SChris Blair ret = request_threaded_irq(irq, NULL, stmpe_gpio_irq, 35438040c85SChris Blair IRQF_ONESHOT, "stmpe-gpio", stmpe_gpio); 355c103de24SGrant Likely if (ret) { 356c103de24SGrant Likely dev_err(&pdev->dev, "unable to get irq: %d\n", ret); 357c103de24SGrant Likely goto out_removeirq; 358c103de24SGrant Likely } 35938040c85SChris Blair } 360c103de24SGrant Likely 361c103de24SGrant Likely ret = gpiochip_add(&stmpe_gpio->chip); 362c103de24SGrant Likely if (ret) { 363c103de24SGrant Likely dev_err(&pdev->dev, "unable to add gpiochip: %d\n", ret); 364c103de24SGrant Likely goto out_freeirq; 365c103de24SGrant Likely } 366c103de24SGrant Likely 367c103de24SGrant Likely if (pdata && pdata->setup) 368c103de24SGrant Likely pdata->setup(stmpe, stmpe_gpio->chip.base); 369c103de24SGrant Likely 370c103de24SGrant Likely platform_set_drvdata(pdev, stmpe_gpio); 371c103de24SGrant Likely 372c103de24SGrant Likely return 0; 373c103de24SGrant Likely 374c103de24SGrant Likely out_freeirq: 37538040c85SChris Blair if (irq >= 0) 376c103de24SGrant Likely free_irq(irq, stmpe_gpio); 377c103de24SGrant Likely out_removeirq: 37838040c85SChris Blair if (irq >= 0) 379c103de24SGrant Likely stmpe_gpio_irq_remove(stmpe_gpio); 380c103de24SGrant Likely out_disable: 381c103de24SGrant Likely stmpe_disable(stmpe, STMPE_BLOCK_GPIO); 382c103de24SGrant Likely out_free: 383c103de24SGrant Likely kfree(stmpe_gpio); 384c103de24SGrant Likely return ret; 385c103de24SGrant Likely } 386c103de24SGrant Likely 387c103de24SGrant Likely static int __devexit stmpe_gpio_remove(struct platform_device *pdev) 388c103de24SGrant Likely { 389c103de24SGrant Likely struct stmpe_gpio *stmpe_gpio = platform_get_drvdata(pdev); 390c103de24SGrant Likely struct stmpe *stmpe = stmpe_gpio->stmpe; 391c103de24SGrant Likely struct stmpe_gpio_platform_data *pdata = stmpe->pdata->gpio; 392c103de24SGrant Likely int irq = platform_get_irq(pdev, 0); 393c103de24SGrant Likely int ret; 394c103de24SGrant Likely 395c103de24SGrant Likely if (pdata && pdata->remove) 396c103de24SGrant Likely pdata->remove(stmpe, stmpe_gpio->chip.base); 397c103de24SGrant Likely 398c103de24SGrant Likely ret = gpiochip_remove(&stmpe_gpio->chip); 399c103de24SGrant Likely if (ret < 0) { 400c103de24SGrant Likely dev_err(stmpe_gpio->dev, 401c103de24SGrant Likely "unable to remove gpiochip: %d\n", ret); 402c103de24SGrant Likely return ret; 403c103de24SGrant Likely } 404c103de24SGrant Likely 405c103de24SGrant Likely stmpe_disable(stmpe, STMPE_BLOCK_GPIO); 406c103de24SGrant Likely 40738040c85SChris Blair if (irq >= 0) { 408c103de24SGrant Likely free_irq(irq, stmpe_gpio); 409c103de24SGrant Likely stmpe_gpio_irq_remove(stmpe_gpio); 41038040c85SChris Blair } 411c103de24SGrant Likely platform_set_drvdata(pdev, NULL); 412c103de24SGrant Likely kfree(stmpe_gpio); 413c103de24SGrant Likely 414c103de24SGrant Likely return 0; 415c103de24SGrant Likely } 416c103de24SGrant Likely 417c103de24SGrant Likely static struct platform_driver stmpe_gpio_driver = { 418c103de24SGrant Likely .driver.name = "stmpe-gpio", 419c103de24SGrant Likely .driver.owner = THIS_MODULE, 420c103de24SGrant Likely .probe = stmpe_gpio_probe, 421c103de24SGrant Likely .remove = __devexit_p(stmpe_gpio_remove), 422c103de24SGrant Likely }; 423c103de24SGrant Likely 424c103de24SGrant Likely static int __init stmpe_gpio_init(void) 425c103de24SGrant Likely { 426c103de24SGrant Likely return platform_driver_register(&stmpe_gpio_driver); 427c103de24SGrant Likely } 428c103de24SGrant Likely subsys_initcall(stmpe_gpio_init); 429c103de24SGrant Likely 430c103de24SGrant Likely static void __exit stmpe_gpio_exit(void) 431c103de24SGrant Likely { 432c103de24SGrant Likely platform_driver_unregister(&stmpe_gpio_driver); 433c103de24SGrant Likely } 434c103de24SGrant Likely module_exit(stmpe_gpio_exit); 435c103de24SGrant Likely 436c103de24SGrant Likely MODULE_LICENSE("GPL v2"); 437c103de24SGrant Likely MODULE_DESCRIPTION("STMPExxxx GPIO driver"); 438c103de24SGrant Likely MODULE_AUTHOR("Rabin Vincent <rabin.vincent@stericsson.com>"); 439