1c103de24SGrant Likely /* 2c103de24SGrant Likely * Copyright (C) 2010 OKI SEMICONDUCTOR Co., LTD. 3c103de24SGrant Likely * 4c103de24SGrant Likely * This program is free software; you can redistribute it and/or modify 5c103de24SGrant Likely * it under the terms of the GNU General Public License as published by 6c103de24SGrant Likely * the Free Software Foundation; version 2 of the License. 7c103de24SGrant Likely * 8c103de24SGrant Likely * This program is distributed in the hope that it will be useful, 9c103de24SGrant Likely * but WITHOUT ANY WARRANTY; without even the implied warranty of 10c103de24SGrant Likely * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 11c103de24SGrant Likely * GNU General Public License for more details. 12c103de24SGrant Likely * 13c103de24SGrant Likely * You should have received a copy of the GNU General Public License 14c103de24SGrant Likely * along with this program; if not, write to the Free Software 15c103de24SGrant Likely * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA. 16c103de24SGrant Likely */ 17c103de24SGrant Likely #include <linux/kernel.h> 18c103de24SGrant Likely #include <linux/slab.h> 19c103de24SGrant Likely #include <linux/pci.h> 20c103de24SGrant Likely #include <linux/gpio.h> 21c103de24SGrant Likely 22c103de24SGrant Likely #define PCI_VENDOR_ID_ROHM 0x10DB 23c103de24SGrant Likely 24c103de24SGrant Likely struct ioh_reg_comn { 25c103de24SGrant Likely u32 ien; 26c103de24SGrant Likely u32 istatus; 27c103de24SGrant Likely u32 idisp; 28c103de24SGrant Likely u32 iclr; 29c103de24SGrant Likely u32 imask; 30c103de24SGrant Likely u32 imaskclr; 31c103de24SGrant Likely u32 po; 32c103de24SGrant Likely u32 pi; 33c103de24SGrant Likely u32 pm; 34c103de24SGrant Likely u32 im_0; 35c103de24SGrant Likely u32 im_1; 36c103de24SGrant Likely u32 reserved; 37c103de24SGrant Likely }; 38c103de24SGrant Likely 39c103de24SGrant Likely struct ioh_regs { 40c103de24SGrant Likely struct ioh_reg_comn regs[8]; 41c103de24SGrant Likely u32 reserve1[16]; 42c103de24SGrant Likely u32 ioh_sel_reg[4]; 43c103de24SGrant Likely u32 reserve2[11]; 44c103de24SGrant Likely u32 srst; 45c103de24SGrant Likely }; 46c103de24SGrant Likely 47c103de24SGrant Likely /** 48c103de24SGrant Likely * struct ioh_gpio_reg_data - The register store data. 49c103de24SGrant Likely * @po_reg: To store contents of PO register. 50c103de24SGrant Likely * @pm_reg: To store contents of PM register. 51c103de24SGrant Likely */ 52c103de24SGrant Likely struct ioh_gpio_reg_data { 53c103de24SGrant Likely u32 po_reg; 54c103de24SGrant Likely u32 pm_reg; 55c103de24SGrant Likely }; 56c103de24SGrant Likely 57c103de24SGrant Likely /** 58c103de24SGrant Likely * struct ioh_gpio - GPIO private data structure. 59c103de24SGrant Likely * @base: PCI base address of Memory mapped I/O register. 60c103de24SGrant Likely * @reg: Memory mapped IOH GPIO register list. 61c103de24SGrant Likely * @dev: Pointer to device structure. 62c103de24SGrant Likely * @gpio: Data for GPIO infrastructure. 63c103de24SGrant Likely * @ioh_gpio_reg: Memory mapped Register data is saved here 64c103de24SGrant Likely * when suspend. 65c103de24SGrant Likely * @ch: Indicate GPIO channel 66c103de24SGrant Likely */ 67c103de24SGrant Likely struct ioh_gpio { 68c103de24SGrant Likely void __iomem *base; 69c103de24SGrant Likely struct ioh_regs __iomem *reg; 70c103de24SGrant Likely struct device *dev; 71c103de24SGrant Likely struct gpio_chip gpio; 72c103de24SGrant Likely struct ioh_gpio_reg_data ioh_gpio_reg; 73c103de24SGrant Likely struct mutex lock; 74c103de24SGrant Likely int ch; 75c103de24SGrant Likely }; 76c103de24SGrant Likely 77c103de24SGrant Likely static const int num_ports[] = {6, 12, 16, 16, 15, 16, 16, 12}; 78c103de24SGrant Likely 79c103de24SGrant Likely static void ioh_gpio_set(struct gpio_chip *gpio, unsigned nr, int val) 80c103de24SGrant Likely { 81c103de24SGrant Likely u32 reg_val; 82c103de24SGrant Likely struct ioh_gpio *chip = container_of(gpio, struct ioh_gpio, gpio); 83c103de24SGrant Likely 84c103de24SGrant Likely mutex_lock(&chip->lock); 85c103de24SGrant Likely reg_val = ioread32(&chip->reg->regs[chip->ch].po); 86c103de24SGrant Likely if (val) 87c103de24SGrant Likely reg_val |= (1 << nr); 88c103de24SGrant Likely else 89c103de24SGrant Likely reg_val &= ~(1 << nr); 90c103de24SGrant Likely 91c103de24SGrant Likely iowrite32(reg_val, &chip->reg->regs[chip->ch].po); 92c103de24SGrant Likely mutex_unlock(&chip->lock); 93c103de24SGrant Likely } 94c103de24SGrant Likely 95c103de24SGrant Likely static int ioh_gpio_get(struct gpio_chip *gpio, unsigned nr) 96c103de24SGrant Likely { 97c103de24SGrant Likely struct ioh_gpio *chip = container_of(gpio, struct ioh_gpio, gpio); 98c103de24SGrant Likely 99c103de24SGrant Likely return ioread32(&chip->reg->regs[chip->ch].pi) & (1 << nr); 100c103de24SGrant Likely } 101c103de24SGrant Likely 102c103de24SGrant Likely static int ioh_gpio_direction_output(struct gpio_chip *gpio, unsigned nr, 103c103de24SGrant Likely int val) 104c103de24SGrant Likely { 105c103de24SGrant Likely struct ioh_gpio *chip = container_of(gpio, struct ioh_gpio, gpio); 106c103de24SGrant Likely u32 pm; 107c103de24SGrant Likely u32 reg_val; 108c103de24SGrant Likely 109c103de24SGrant Likely mutex_lock(&chip->lock); 110c103de24SGrant Likely pm = ioread32(&chip->reg->regs[chip->ch].pm) & 111c103de24SGrant Likely ((1 << num_ports[chip->ch]) - 1); 112c103de24SGrant Likely pm |= (1 << nr); 113c103de24SGrant Likely iowrite32(pm, &chip->reg->regs[chip->ch].pm); 114c103de24SGrant Likely 115c103de24SGrant Likely reg_val = ioread32(&chip->reg->regs[chip->ch].po); 116c103de24SGrant Likely if (val) 117c103de24SGrant Likely reg_val |= (1 << nr); 118c103de24SGrant Likely else 119c103de24SGrant Likely reg_val &= ~(1 << nr); 120c103de24SGrant Likely iowrite32(reg_val, &chip->reg->regs[chip->ch].po); 121c103de24SGrant Likely 122c103de24SGrant Likely mutex_unlock(&chip->lock); 123c103de24SGrant Likely 124c103de24SGrant Likely return 0; 125c103de24SGrant Likely } 126c103de24SGrant Likely 127c103de24SGrant Likely static int ioh_gpio_direction_input(struct gpio_chip *gpio, unsigned nr) 128c103de24SGrant Likely { 129c103de24SGrant Likely struct ioh_gpio *chip = container_of(gpio, struct ioh_gpio, gpio); 130c103de24SGrant Likely u32 pm; 131c103de24SGrant Likely 132c103de24SGrant Likely mutex_lock(&chip->lock); 133c103de24SGrant Likely pm = ioread32(&chip->reg->regs[chip->ch].pm) & 134c103de24SGrant Likely ((1 << num_ports[chip->ch]) - 1); 135c103de24SGrant Likely pm &= ~(1 << nr); 136c103de24SGrant Likely iowrite32(pm, &chip->reg->regs[chip->ch].pm); 137c103de24SGrant Likely mutex_unlock(&chip->lock); 138c103de24SGrant Likely 139c103de24SGrant Likely return 0; 140c103de24SGrant Likely } 141c103de24SGrant Likely 142c103de24SGrant Likely #ifdef CONFIG_PM 143c103de24SGrant Likely /* 144c103de24SGrant Likely * Save register configuration and disable interrupts. 145c103de24SGrant Likely */ 146c103de24SGrant Likely static void ioh_gpio_save_reg_conf(struct ioh_gpio *chip) 147c103de24SGrant Likely { 148c103de24SGrant Likely chip->ioh_gpio_reg.po_reg = ioread32(&chip->reg->regs[chip->ch].po); 149c103de24SGrant Likely chip->ioh_gpio_reg.pm_reg = ioread32(&chip->reg->regs[chip->ch].pm); 150c103de24SGrant Likely } 151c103de24SGrant Likely 152c103de24SGrant Likely /* 153c103de24SGrant Likely * This function restores the register configuration of the GPIO device. 154c103de24SGrant Likely */ 155c103de24SGrant Likely static void ioh_gpio_restore_reg_conf(struct ioh_gpio *chip) 156c103de24SGrant Likely { 157c103de24SGrant Likely /* to store contents of PO register */ 158c103de24SGrant Likely iowrite32(chip->ioh_gpio_reg.po_reg, &chip->reg->regs[chip->ch].po); 159c103de24SGrant Likely /* to store contents of PM register */ 160c103de24SGrant Likely iowrite32(chip->ioh_gpio_reg.pm_reg, &chip->reg->regs[chip->ch].pm); 161c103de24SGrant Likely } 162c103de24SGrant Likely #endif 163c103de24SGrant Likely 164c103de24SGrant Likely static void ioh_gpio_setup(struct ioh_gpio *chip, int num_port) 165c103de24SGrant Likely { 166c103de24SGrant Likely struct gpio_chip *gpio = &chip->gpio; 167c103de24SGrant Likely 168c103de24SGrant Likely gpio->label = dev_name(chip->dev); 169c103de24SGrant Likely gpio->owner = THIS_MODULE; 170c103de24SGrant Likely gpio->direction_input = ioh_gpio_direction_input; 171c103de24SGrant Likely gpio->get = ioh_gpio_get; 172c103de24SGrant Likely gpio->direction_output = ioh_gpio_direction_output; 173c103de24SGrant Likely gpio->set = ioh_gpio_set; 174c103de24SGrant Likely gpio->dbg_show = NULL; 175c103de24SGrant Likely gpio->base = -1; 176c103de24SGrant Likely gpio->ngpio = num_port; 177c103de24SGrant Likely gpio->can_sleep = 0; 178c103de24SGrant Likely } 179c103de24SGrant Likely 180c103de24SGrant Likely static int __devinit ioh_gpio_probe(struct pci_dev *pdev, 181c103de24SGrant Likely const struct pci_device_id *id) 182c103de24SGrant Likely { 183c103de24SGrant Likely int ret; 184c103de24SGrant Likely int i; 185c103de24SGrant Likely struct ioh_gpio *chip; 186c103de24SGrant Likely void __iomem *base; 187c103de24SGrant Likely void __iomem *chip_save; 188c103de24SGrant Likely 189c103de24SGrant Likely ret = pci_enable_device(pdev); 190c103de24SGrant Likely if (ret) { 191c103de24SGrant Likely dev_err(&pdev->dev, "%s : pci_enable_device failed", __func__); 192c103de24SGrant Likely goto err_pci_enable; 193c103de24SGrant Likely } 194c103de24SGrant Likely 195c103de24SGrant Likely ret = pci_request_regions(pdev, KBUILD_MODNAME); 196c103de24SGrant Likely if (ret) { 197c103de24SGrant Likely dev_err(&pdev->dev, "pci_request_regions failed-%d", ret); 198c103de24SGrant Likely goto err_request_regions; 199c103de24SGrant Likely } 200c103de24SGrant Likely 201c103de24SGrant Likely base = pci_iomap(pdev, 1, 0); 202c103de24SGrant Likely if (base == 0) { 203c103de24SGrant Likely dev_err(&pdev->dev, "%s : pci_iomap failed", __func__); 204c103de24SGrant Likely ret = -ENOMEM; 205c103de24SGrant Likely goto err_iomap; 206c103de24SGrant Likely } 207c103de24SGrant Likely 208c103de24SGrant Likely chip_save = kzalloc(sizeof(*chip) * 8, GFP_KERNEL); 209c103de24SGrant Likely if (chip_save == NULL) { 210c103de24SGrant Likely dev_err(&pdev->dev, "%s : kzalloc failed", __func__); 211c103de24SGrant Likely ret = -ENOMEM; 212c103de24SGrant Likely goto err_kzalloc; 213c103de24SGrant Likely } 214c103de24SGrant Likely 215c103de24SGrant Likely chip = chip_save; 216c103de24SGrant Likely for (i = 0; i < 8; i++, chip++) { 217c103de24SGrant Likely chip->dev = &pdev->dev; 218c103de24SGrant Likely chip->base = base; 219c103de24SGrant Likely chip->reg = chip->base; 220c103de24SGrant Likely chip->ch = i; 221c103de24SGrant Likely mutex_init(&chip->lock); 222c103de24SGrant Likely ioh_gpio_setup(chip, num_ports[i]); 223c103de24SGrant Likely ret = gpiochip_add(&chip->gpio); 224c103de24SGrant Likely if (ret) { 225c103de24SGrant Likely dev_err(&pdev->dev, "IOH gpio: Failed to register GPIO\n"); 226c103de24SGrant Likely goto err_gpiochip_add; 227c103de24SGrant Likely } 228c103de24SGrant Likely } 229c103de24SGrant Likely 230c103de24SGrant Likely chip = chip_save; 231c103de24SGrant Likely pci_set_drvdata(pdev, chip); 232c103de24SGrant Likely 233c103de24SGrant Likely return 0; 234c103de24SGrant Likely 235c103de24SGrant Likely err_gpiochip_add: 236*33300571SAxel Lin while (--i >= 0) { 237c103de24SGrant Likely chip--; 238c103de24SGrant Likely ret = gpiochip_remove(&chip->gpio); 239c103de24SGrant Likely if (ret) 240c103de24SGrant Likely dev_err(&pdev->dev, "Failed gpiochip_remove(%d)\n", i); 241c103de24SGrant Likely } 242c103de24SGrant Likely kfree(chip_save); 243c103de24SGrant Likely 244c103de24SGrant Likely err_kzalloc: 245c103de24SGrant Likely pci_iounmap(pdev, base); 246c103de24SGrant Likely 247c103de24SGrant Likely err_iomap: 248c103de24SGrant Likely pci_release_regions(pdev); 249c103de24SGrant Likely 250c103de24SGrant Likely err_request_regions: 251c103de24SGrant Likely pci_disable_device(pdev); 252c103de24SGrant Likely 253c103de24SGrant Likely err_pci_enable: 254c103de24SGrant Likely 255c103de24SGrant Likely dev_err(&pdev->dev, "%s Failed returns %d\n", __func__, ret); 256c103de24SGrant Likely return ret; 257c103de24SGrant Likely } 258c103de24SGrant Likely 259c103de24SGrant Likely static void __devexit ioh_gpio_remove(struct pci_dev *pdev) 260c103de24SGrant Likely { 261c103de24SGrant Likely int err; 262c103de24SGrant Likely int i; 263c103de24SGrant Likely struct ioh_gpio *chip = pci_get_drvdata(pdev); 264c103de24SGrant Likely void __iomem *chip_save; 265c103de24SGrant Likely 266c103de24SGrant Likely chip_save = chip; 267c103de24SGrant Likely for (i = 0; i < 8; i++, chip++) { 268c103de24SGrant Likely err = gpiochip_remove(&chip->gpio); 269c103de24SGrant Likely if (err) 270c103de24SGrant Likely dev_err(&pdev->dev, "Failed gpiochip_remove\n"); 271c103de24SGrant Likely } 272c103de24SGrant Likely 273c103de24SGrant Likely chip = chip_save; 274c103de24SGrant Likely pci_iounmap(pdev, chip->base); 275c103de24SGrant Likely pci_release_regions(pdev); 276c103de24SGrant Likely pci_disable_device(pdev); 277c103de24SGrant Likely kfree(chip); 278c103de24SGrant Likely } 279c103de24SGrant Likely 280c103de24SGrant Likely #ifdef CONFIG_PM 281c103de24SGrant Likely static int ioh_gpio_suspend(struct pci_dev *pdev, pm_message_t state) 282c103de24SGrant Likely { 283c103de24SGrant Likely s32 ret; 284c103de24SGrant Likely struct ioh_gpio *chip = pci_get_drvdata(pdev); 285c103de24SGrant Likely 286c103de24SGrant Likely ioh_gpio_save_reg_conf(chip); 287c103de24SGrant Likely ioh_gpio_restore_reg_conf(chip); 288c103de24SGrant Likely 289c103de24SGrant Likely ret = pci_save_state(pdev); 290c103de24SGrant Likely if (ret) { 291c103de24SGrant Likely dev_err(&pdev->dev, "pci_save_state Failed-%d\n", ret); 292c103de24SGrant Likely return ret; 293c103de24SGrant Likely } 294c103de24SGrant Likely pci_disable_device(pdev); 295c103de24SGrant Likely pci_set_power_state(pdev, PCI_D0); 296c103de24SGrant Likely ret = pci_enable_wake(pdev, PCI_D0, 1); 297c103de24SGrant Likely if (ret) 298c103de24SGrant Likely dev_err(&pdev->dev, "pci_enable_wake Failed -%d\n", ret); 299c103de24SGrant Likely 300c103de24SGrant Likely return 0; 301c103de24SGrant Likely } 302c103de24SGrant Likely 303c103de24SGrant Likely static int ioh_gpio_resume(struct pci_dev *pdev) 304c103de24SGrant Likely { 305c103de24SGrant Likely s32 ret; 306c103de24SGrant Likely struct ioh_gpio *chip = pci_get_drvdata(pdev); 307c103de24SGrant Likely 308c103de24SGrant Likely ret = pci_enable_wake(pdev, PCI_D0, 0); 309c103de24SGrant Likely 310c103de24SGrant Likely pci_set_power_state(pdev, PCI_D0); 311c103de24SGrant Likely ret = pci_enable_device(pdev); 312c103de24SGrant Likely if (ret) { 313c103de24SGrant Likely dev_err(&pdev->dev, "pci_enable_device Failed-%d ", ret); 314c103de24SGrant Likely return ret; 315c103de24SGrant Likely } 316c103de24SGrant Likely pci_restore_state(pdev); 317c103de24SGrant Likely 318c103de24SGrant Likely iowrite32(0x01, &chip->reg->srst); 319c103de24SGrant Likely iowrite32(0x00, &chip->reg->srst); 320c103de24SGrant Likely ioh_gpio_restore_reg_conf(chip); 321c103de24SGrant Likely 322c103de24SGrant Likely return 0; 323c103de24SGrant Likely } 324c103de24SGrant Likely #else 325c103de24SGrant Likely #define ioh_gpio_suspend NULL 326c103de24SGrant Likely #define ioh_gpio_resume NULL 327c103de24SGrant Likely #endif 328c103de24SGrant Likely 329c103de24SGrant Likely static DEFINE_PCI_DEVICE_TABLE(ioh_gpio_pcidev_id) = { 330c103de24SGrant Likely { PCI_DEVICE(PCI_VENDOR_ID_ROHM, 0x802E) }, 331c103de24SGrant Likely { 0, } 332c103de24SGrant Likely }; 333c103de24SGrant Likely MODULE_DEVICE_TABLE(pci, ioh_gpio_pcidev_id); 334c103de24SGrant Likely 335c103de24SGrant Likely static struct pci_driver ioh_gpio_driver = { 336c103de24SGrant Likely .name = "ml_ioh_gpio", 337c103de24SGrant Likely .id_table = ioh_gpio_pcidev_id, 338c103de24SGrant Likely .probe = ioh_gpio_probe, 339c103de24SGrant Likely .remove = __devexit_p(ioh_gpio_remove), 340c103de24SGrant Likely .suspend = ioh_gpio_suspend, 341c103de24SGrant Likely .resume = ioh_gpio_resume 342c103de24SGrant Likely }; 343c103de24SGrant Likely 344c103de24SGrant Likely static int __init ioh_gpio_pci_init(void) 345c103de24SGrant Likely { 346c103de24SGrant Likely return pci_register_driver(&ioh_gpio_driver); 347c103de24SGrant Likely } 348c103de24SGrant Likely module_init(ioh_gpio_pci_init); 349c103de24SGrant Likely 350c103de24SGrant Likely static void __exit ioh_gpio_pci_exit(void) 351c103de24SGrant Likely { 352c103de24SGrant Likely pci_unregister_driver(&ioh_gpio_driver); 353c103de24SGrant Likely } 354c103de24SGrant Likely module_exit(ioh_gpio_pci_exit); 355c103de24SGrant Likely 356c103de24SGrant Likely MODULE_DESCRIPTION("OKI SEMICONDUCTOR ML-IOH series GPIO Driver"); 357c103de24SGrant Likely MODULE_LICENSE("GPL"); 358