xref: /openbmc/linux/drivers/gpio/gpio-mb86s7x.c (revision f3d705d506a2afa6c21c2c728783967e80863b31)
1 /*
2  *  linux/drivers/gpio/gpio-mb86s7x.c
3  *
4  *  Copyright (C) 2015 Fujitsu Semiconductor Limited
5  *  Copyright (C) 2015 Linaro Ltd.
6  *
7  *  This program is free software: you can redistribute it and/or modify
8  *  it under the terms of the GNU General Public License as published by
9  *  the Free Software Foundation, version 2 of the License.
10  *
11  *  This program is distributed in the hope that it will be useful,
12  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
13  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14  *  GNU General Public License for more details.
15  */
16 
17 #include <linux/acpi.h>
18 #include <linux/io.h>
19 #include <linux/init.h>
20 #include <linux/clk.h>
21 #include <linux/module.h>
22 #include <linux/err.h>
23 #include <linux/errno.h>
24 #include <linux/ioport.h>
25 #include <linux/of_device.h>
26 #include <linux/gpio/driver.h>
27 #include <linux/platform_device.h>
28 #include <linux/spinlock.h>
29 #include <linux/slab.h>
30 
31 #include "gpiolib.h"
32 
33 /*
34  * Only first 8bits of a register correspond to each pin,
35  * so there are 4 registers for 32 pins.
36  */
37 #define PDR(x)	(0x0 + x / 8 * 4)
38 #define DDR(x)	(0x10 + x / 8 * 4)
39 #define PFR(x)	(0x20 + x / 8 * 4)
40 
41 #define OFFSET(x)	BIT((x) % 8)
42 
43 struct mb86s70_gpio_chip {
44 	struct gpio_chip gc;
45 	void __iomem *base;
46 	struct clk *clk;
47 	spinlock_t lock;
48 };
49 
50 static int mb86s70_gpio_request(struct gpio_chip *gc, unsigned gpio)
51 {
52 	struct mb86s70_gpio_chip *gchip = gpiochip_get_data(gc);
53 	unsigned long flags;
54 	u32 val;
55 
56 	spin_lock_irqsave(&gchip->lock, flags);
57 
58 	val = readl(gchip->base + PFR(gpio));
59 	val &= ~OFFSET(gpio);
60 	writel(val, gchip->base + PFR(gpio));
61 
62 	spin_unlock_irqrestore(&gchip->lock, flags);
63 
64 	return 0;
65 }
66 
67 static void mb86s70_gpio_free(struct gpio_chip *gc, unsigned gpio)
68 {
69 	struct mb86s70_gpio_chip *gchip = gpiochip_get_data(gc);
70 	unsigned long flags;
71 	u32 val;
72 
73 	spin_lock_irqsave(&gchip->lock, flags);
74 
75 	val = readl(gchip->base + PFR(gpio));
76 	val |= OFFSET(gpio);
77 	writel(val, gchip->base + PFR(gpio));
78 
79 	spin_unlock_irqrestore(&gchip->lock, flags);
80 }
81 
82 static int mb86s70_gpio_direction_input(struct gpio_chip *gc, unsigned gpio)
83 {
84 	struct mb86s70_gpio_chip *gchip = gpiochip_get_data(gc);
85 	unsigned long flags;
86 	unsigned char val;
87 
88 	spin_lock_irqsave(&gchip->lock, flags);
89 
90 	val = readl(gchip->base + DDR(gpio));
91 	val &= ~OFFSET(gpio);
92 	writel(val, gchip->base + DDR(gpio));
93 
94 	spin_unlock_irqrestore(&gchip->lock, flags);
95 
96 	return 0;
97 }
98 
99 static int mb86s70_gpio_direction_output(struct gpio_chip *gc,
100 					 unsigned gpio, int value)
101 {
102 	struct mb86s70_gpio_chip *gchip = gpiochip_get_data(gc);
103 	unsigned long flags;
104 	unsigned char val;
105 
106 	spin_lock_irqsave(&gchip->lock, flags);
107 
108 	val = readl(gchip->base + PDR(gpio));
109 	if (value)
110 		val |= OFFSET(gpio);
111 	else
112 		val &= ~OFFSET(gpio);
113 	writel(val, gchip->base + PDR(gpio));
114 
115 	val = readl(gchip->base + DDR(gpio));
116 	val |= OFFSET(gpio);
117 	writel(val, gchip->base + DDR(gpio));
118 
119 	spin_unlock_irqrestore(&gchip->lock, flags);
120 
121 	return 0;
122 }
123 
124 static int mb86s70_gpio_get(struct gpio_chip *gc, unsigned gpio)
125 {
126 	struct mb86s70_gpio_chip *gchip = gpiochip_get_data(gc);
127 
128 	return !!(readl(gchip->base + PDR(gpio)) & OFFSET(gpio));
129 }
130 
131 static void mb86s70_gpio_set(struct gpio_chip *gc, unsigned gpio, int value)
132 {
133 	struct mb86s70_gpio_chip *gchip = gpiochip_get_data(gc);
134 	unsigned long flags;
135 	unsigned char val;
136 
137 	spin_lock_irqsave(&gchip->lock, flags);
138 
139 	val = readl(gchip->base + PDR(gpio));
140 	if (value)
141 		val |= OFFSET(gpio);
142 	else
143 		val &= ~OFFSET(gpio);
144 	writel(val, gchip->base + PDR(gpio));
145 
146 	spin_unlock_irqrestore(&gchip->lock, flags);
147 }
148 
149 static int mb86s70_gpio_to_irq(struct gpio_chip *gc, unsigned int offset)
150 {
151 	int irq, index;
152 
153 	for (index = 0;; index++) {
154 		irq = platform_get_irq(to_platform_device(gc->parent), index);
155 		if (irq <= 0)
156 			break;
157 		if (irq_get_irq_data(irq)->hwirq == offset)
158 			return irq;
159 	}
160 	return -EINVAL;
161 }
162 
163 static int mb86s70_gpio_probe(struct platform_device *pdev)
164 {
165 	struct mb86s70_gpio_chip *gchip;
166 	int ret;
167 
168 	gchip = devm_kzalloc(&pdev->dev, sizeof(*gchip), GFP_KERNEL);
169 	if (gchip == NULL)
170 		return -ENOMEM;
171 
172 	platform_set_drvdata(pdev, gchip);
173 
174 	gchip->base = devm_platform_ioremap_resource(pdev, 0);
175 	if (IS_ERR(gchip->base))
176 		return PTR_ERR(gchip->base);
177 
178 	if (!has_acpi_companion(&pdev->dev)) {
179 		gchip->clk = devm_clk_get(&pdev->dev, NULL);
180 		if (IS_ERR(gchip->clk))
181 			return PTR_ERR(gchip->clk);
182 
183 		ret = clk_prepare_enable(gchip->clk);
184 		if (ret)
185 			return ret;
186 	}
187 
188 	spin_lock_init(&gchip->lock);
189 
190 	gchip->gc.direction_output = mb86s70_gpio_direction_output;
191 	gchip->gc.direction_input = mb86s70_gpio_direction_input;
192 	gchip->gc.request = mb86s70_gpio_request;
193 	gchip->gc.free = mb86s70_gpio_free;
194 	gchip->gc.get = mb86s70_gpio_get;
195 	gchip->gc.set = mb86s70_gpio_set;
196 	gchip->gc.label = dev_name(&pdev->dev);
197 	gchip->gc.ngpio = 32;
198 	gchip->gc.owner = THIS_MODULE;
199 	gchip->gc.parent = &pdev->dev;
200 	gchip->gc.base = -1;
201 
202 	if (has_acpi_companion(&pdev->dev))
203 		gchip->gc.to_irq = mb86s70_gpio_to_irq;
204 
205 	ret = gpiochip_add_data(&gchip->gc, gchip);
206 	if (ret) {
207 		dev_err(&pdev->dev, "couldn't register gpio driver\n");
208 		clk_disable_unprepare(gchip->clk);
209 		return ret;
210 	}
211 
212 	if (has_acpi_companion(&pdev->dev))
213 		acpi_gpiochip_request_interrupts(&gchip->gc);
214 
215 	return 0;
216 }
217 
218 static int mb86s70_gpio_remove(struct platform_device *pdev)
219 {
220 	struct mb86s70_gpio_chip *gchip = platform_get_drvdata(pdev);
221 
222 	if (has_acpi_companion(&pdev->dev))
223 		acpi_gpiochip_free_interrupts(&gchip->gc);
224 	gpiochip_remove(&gchip->gc);
225 	clk_disable_unprepare(gchip->clk);
226 
227 	return 0;
228 }
229 
230 static const struct of_device_id mb86s70_gpio_dt_ids[] = {
231 	{ .compatible = "fujitsu,mb86s70-gpio" },
232 	{ /* sentinel */ }
233 };
234 MODULE_DEVICE_TABLE(of, mb86s70_gpio_dt_ids);
235 
236 #ifdef CONFIG_ACPI
237 static const struct acpi_device_id mb86s70_gpio_acpi_ids[] = {
238 	{ "SCX0007" },
239 	{ /* sentinel */ }
240 };
241 MODULE_DEVICE_TABLE(acpi, mb86s70_gpio_acpi_ids);
242 #endif
243 
244 static struct platform_driver mb86s70_gpio_driver = {
245 	.driver = {
246 		.name = "mb86s70-gpio",
247 		.of_match_table = mb86s70_gpio_dt_ids,
248 		.acpi_match_table = ACPI_PTR(mb86s70_gpio_acpi_ids),
249 	},
250 	.probe = mb86s70_gpio_probe,
251 	.remove = mb86s70_gpio_remove,
252 };
253 module_platform_driver(mb86s70_gpio_driver);
254 
255 MODULE_DESCRIPTION("MB86S7x GPIO Driver");
256 MODULE_ALIAS("platform:mb86s70-gpio");
257 MODULE_LICENSE("GPL");
258