132828115SDave Jiang // SPDX-License-Identifier: GPL-2.0-only
232828115SDave Jiang /* Copyright(c) 2022 Intel Corporation. All rights reserved. */
332828115SDave Jiang #include <linux/libnvdimm.h>
432828115SDave Jiang #include <asm/unaligned.h>
532828115SDave Jiang #include <linux/module.h>
632828115SDave Jiang #include <linux/async.h>
732828115SDave Jiang #include <linux/slab.h>
82bb692f7SDave Jiang #include <linux/memregion.h>
932828115SDave Jiang #include "cxlmem.h"
1032828115SDave Jiang #include "cxl.h"
1132828115SDave Jiang
cxl_pmem_get_security_flags(struct nvdimm * nvdimm,enum nvdimm_passphrase_type ptype)1232828115SDave Jiang static unsigned long cxl_pmem_get_security_flags(struct nvdimm *nvdimm,
1332828115SDave Jiang enum nvdimm_passphrase_type ptype)
1432828115SDave Jiang {
1532828115SDave Jiang struct cxl_nvdimm *cxl_nvd = nvdimm_provider_data(nvdimm);
1632828115SDave Jiang struct cxl_memdev *cxlmd = cxl_nvd->cxlmd;
1759f8d151SDan Williams struct cxl_memdev_state *mds = to_cxl_memdev_state(cxlmd->cxlds);
1832828115SDave Jiang unsigned long security_flags = 0;
19f5ee4cc1SDan Williams struct cxl_get_security_output {
20f5ee4cc1SDan Williams __le32 flags;
21f5ee4cc1SDan Williams } out;
225331cdf4SDan Williams struct cxl_mbox_cmd mbox_cmd;
2332828115SDave Jiang u32 sec_out;
2432828115SDave Jiang int rc;
2532828115SDave Jiang
265331cdf4SDan Williams mbox_cmd = (struct cxl_mbox_cmd) {
275331cdf4SDan Williams .opcode = CXL_MBOX_OP_GET_SECURITY_STATE,
285331cdf4SDan Williams .size_out = sizeof(out),
295331cdf4SDan Williams .payload_out = &out,
305331cdf4SDan Williams };
315331cdf4SDan Williams
3259f8d151SDan Williams rc = cxl_internal_send_cmd(mds, &mbox_cmd);
3332828115SDave Jiang if (rc < 0)
3432828115SDave Jiang return 0;
3532828115SDave Jiang
36f5ee4cc1SDan Williams sec_out = le32_to_cpu(out.flags);
379968c9ddSDavidlohr Bueso /* cache security state */
38*aeaefabcSDan Williams mds->security.state = sec_out;
399968c9ddSDavidlohr Bueso
4032828115SDave Jiang if (ptype == NVDIMM_MASTER) {
4132828115SDave Jiang if (sec_out & CXL_PMEM_SEC_STATE_MASTER_PASS_SET)
4232828115SDave Jiang set_bit(NVDIMM_SECURITY_UNLOCKED, &security_flags);
4332828115SDave Jiang else
4432828115SDave Jiang set_bit(NVDIMM_SECURITY_DISABLED, &security_flags);
4532828115SDave Jiang if (sec_out & CXL_PMEM_SEC_STATE_MASTER_PLIMIT)
4632828115SDave Jiang set_bit(NVDIMM_SECURITY_FROZEN, &security_flags);
4732828115SDave Jiang return security_flags;
4832828115SDave Jiang }
4932828115SDave Jiang
5032828115SDave Jiang if (sec_out & CXL_PMEM_SEC_STATE_USER_PASS_SET) {
5132828115SDave Jiang if (sec_out & CXL_PMEM_SEC_STATE_FROZEN ||
5232828115SDave Jiang sec_out & CXL_PMEM_SEC_STATE_USER_PLIMIT)
5332828115SDave Jiang set_bit(NVDIMM_SECURITY_FROZEN, &security_flags);
5432828115SDave Jiang
5532828115SDave Jiang if (sec_out & CXL_PMEM_SEC_STATE_LOCKED)
5632828115SDave Jiang set_bit(NVDIMM_SECURITY_LOCKED, &security_flags);
5732828115SDave Jiang else
5832828115SDave Jiang set_bit(NVDIMM_SECURITY_UNLOCKED, &security_flags);
5932828115SDave Jiang } else {
6032828115SDave Jiang set_bit(NVDIMM_SECURITY_DISABLED, &security_flags);
6132828115SDave Jiang }
6232828115SDave Jiang
6332828115SDave Jiang return security_flags;
6432828115SDave Jiang }
6532828115SDave Jiang
cxl_pmem_security_change_key(struct nvdimm * nvdimm,const struct nvdimm_key_data * old_data,const struct nvdimm_key_data * new_data,enum nvdimm_passphrase_type ptype)6699746940SDave Jiang static int cxl_pmem_security_change_key(struct nvdimm *nvdimm,
6799746940SDave Jiang const struct nvdimm_key_data *old_data,
6899746940SDave Jiang const struct nvdimm_key_data *new_data,
6999746940SDave Jiang enum nvdimm_passphrase_type ptype)
7099746940SDave Jiang {
7199746940SDave Jiang struct cxl_nvdimm *cxl_nvd = nvdimm_provider_data(nvdimm);
7299746940SDave Jiang struct cxl_memdev *cxlmd = cxl_nvd->cxlmd;
7359f8d151SDan Williams struct cxl_memdev_state *mds = to_cxl_memdev_state(cxlmd->cxlds);
745331cdf4SDan Williams struct cxl_mbox_cmd mbox_cmd;
7599746940SDave Jiang struct cxl_set_pass set_pass;
7699746940SDave Jiang
775331cdf4SDan Williams set_pass = (struct cxl_set_pass) {
785331cdf4SDan Williams .type = ptype == NVDIMM_MASTER ? CXL_PMEM_SEC_PASS_MASTER :
795331cdf4SDan Williams CXL_PMEM_SEC_PASS_USER,
805331cdf4SDan Williams };
8199746940SDave Jiang memcpy(set_pass.old_pass, old_data->data, NVDIMM_PASSPHRASE_LEN);
8299746940SDave Jiang memcpy(set_pass.new_pass, new_data->data, NVDIMM_PASSPHRASE_LEN);
8399746940SDave Jiang
845331cdf4SDan Williams mbox_cmd = (struct cxl_mbox_cmd) {
855331cdf4SDan Williams .opcode = CXL_MBOX_OP_SET_PASSPHRASE,
865331cdf4SDan Williams .size_in = sizeof(set_pass),
875331cdf4SDan Williams .payload_in = &set_pass,
885331cdf4SDan Williams };
895331cdf4SDan Williams
9059f8d151SDan Williams return cxl_internal_send_cmd(mds, &mbox_cmd);
9199746940SDave Jiang }
9299746940SDave Jiang
__cxl_pmem_security_disable(struct nvdimm * nvdimm,const struct nvdimm_key_data * key_data,enum nvdimm_passphrase_type ptype)93dcedadfaSDave Jiang static int __cxl_pmem_security_disable(struct nvdimm *nvdimm,
94dcedadfaSDave Jiang const struct nvdimm_key_data *key_data,
95dcedadfaSDave Jiang enum nvdimm_passphrase_type ptype)
96c4ef680dSDave Jiang {
97c4ef680dSDave Jiang struct cxl_nvdimm *cxl_nvd = nvdimm_provider_data(nvdimm);
98c4ef680dSDave Jiang struct cxl_memdev *cxlmd = cxl_nvd->cxlmd;
9959f8d151SDan Williams struct cxl_memdev_state *mds = to_cxl_memdev_state(cxlmd->cxlds);
100c4ef680dSDave Jiang struct cxl_disable_pass dis_pass;
1015331cdf4SDan Williams struct cxl_mbox_cmd mbox_cmd;
102c4ef680dSDave Jiang
1035331cdf4SDan Williams dis_pass = (struct cxl_disable_pass) {
1045331cdf4SDan Williams .type = ptype == NVDIMM_MASTER ? CXL_PMEM_SEC_PASS_MASTER :
1055331cdf4SDan Williams CXL_PMEM_SEC_PASS_USER,
1065331cdf4SDan Williams };
107c4ef680dSDave Jiang memcpy(dis_pass.pass, key_data->data, NVDIMM_PASSPHRASE_LEN);
108c4ef680dSDave Jiang
1095331cdf4SDan Williams mbox_cmd = (struct cxl_mbox_cmd) {
1105331cdf4SDan Williams .opcode = CXL_MBOX_OP_DISABLE_PASSPHRASE,
1115331cdf4SDan Williams .size_in = sizeof(dis_pass),
1125331cdf4SDan Williams .payload_in = &dis_pass,
1135331cdf4SDan Williams };
1145331cdf4SDan Williams
11559f8d151SDan Williams return cxl_internal_send_cmd(mds, &mbox_cmd);
116c4ef680dSDave Jiang }
117c4ef680dSDave Jiang
cxl_pmem_security_disable(struct nvdimm * nvdimm,const struct nvdimm_key_data * key_data)118dcedadfaSDave Jiang static int cxl_pmem_security_disable(struct nvdimm *nvdimm,
119dcedadfaSDave Jiang const struct nvdimm_key_data *key_data)
120dcedadfaSDave Jiang {
121dcedadfaSDave Jiang return __cxl_pmem_security_disable(nvdimm, key_data, NVDIMM_USER);
122dcedadfaSDave Jiang }
123dcedadfaSDave Jiang
cxl_pmem_security_disable_master(struct nvdimm * nvdimm,const struct nvdimm_key_data * key_data)124dcedadfaSDave Jiang static int cxl_pmem_security_disable_master(struct nvdimm *nvdimm,
125dcedadfaSDave Jiang const struct nvdimm_key_data *key_data)
126dcedadfaSDave Jiang {
127dcedadfaSDave Jiang return __cxl_pmem_security_disable(nvdimm, key_data, NVDIMM_MASTER);
128dcedadfaSDave Jiang }
129dcedadfaSDave Jiang
cxl_pmem_security_freeze(struct nvdimm * nvdimm)130a072f7b7SDave Jiang static int cxl_pmem_security_freeze(struct nvdimm *nvdimm)
131a072f7b7SDave Jiang {
132a072f7b7SDave Jiang struct cxl_nvdimm *cxl_nvd = nvdimm_provider_data(nvdimm);
133a072f7b7SDave Jiang struct cxl_memdev *cxlmd = cxl_nvd->cxlmd;
13459f8d151SDan Williams struct cxl_memdev_state *mds = to_cxl_memdev_state(cxlmd->cxlds);
1355331cdf4SDan Williams struct cxl_mbox_cmd mbox_cmd = {
1365331cdf4SDan Williams .opcode = CXL_MBOX_OP_FREEZE_SECURITY,
1375331cdf4SDan Williams };
138a072f7b7SDave Jiang
13959f8d151SDan Williams return cxl_internal_send_cmd(mds, &mbox_cmd);
140a072f7b7SDave Jiang }
141a072f7b7SDave Jiang
cxl_pmem_security_unlock(struct nvdimm * nvdimm,const struct nvdimm_key_data * key_data)1422bb692f7SDave Jiang static int cxl_pmem_security_unlock(struct nvdimm *nvdimm,
1432bb692f7SDave Jiang const struct nvdimm_key_data *key_data)
1442bb692f7SDave Jiang {
1452bb692f7SDave Jiang struct cxl_nvdimm *cxl_nvd = nvdimm_provider_data(nvdimm);
1462bb692f7SDave Jiang struct cxl_memdev *cxlmd = cxl_nvd->cxlmd;
14759f8d151SDan Williams struct cxl_memdev_state *mds = to_cxl_memdev_state(cxlmd->cxlds);
1482bb692f7SDave Jiang u8 pass[NVDIMM_PASSPHRASE_LEN];
1495331cdf4SDan Williams struct cxl_mbox_cmd mbox_cmd;
1502bb692f7SDave Jiang int rc;
1512bb692f7SDave Jiang
1522bb692f7SDave Jiang memcpy(pass, key_data->data, NVDIMM_PASSPHRASE_LEN);
1535331cdf4SDan Williams mbox_cmd = (struct cxl_mbox_cmd) {
1545331cdf4SDan Williams .opcode = CXL_MBOX_OP_UNLOCK,
1555331cdf4SDan Williams .size_in = NVDIMM_PASSPHRASE_LEN,
1565331cdf4SDan Williams .payload_in = pass,
1575331cdf4SDan Williams };
1585331cdf4SDan Williams
15959f8d151SDan Williams rc = cxl_internal_send_cmd(mds, &mbox_cmd);
1602bb692f7SDave Jiang if (rc < 0)
1612bb692f7SDave Jiang return rc;
1622bb692f7SDave Jiang
1632bb692f7SDave Jiang return 0;
1642bb692f7SDave Jiang }
1652bb692f7SDave Jiang
cxl_pmem_security_passphrase_erase(struct nvdimm * nvdimm,const struct nvdimm_key_data * key,enum nvdimm_passphrase_type ptype)1663b502e88SDave Jiang static int cxl_pmem_security_passphrase_erase(struct nvdimm *nvdimm,
1673b502e88SDave Jiang const struct nvdimm_key_data *key,
1683b502e88SDave Jiang enum nvdimm_passphrase_type ptype)
1693b502e88SDave Jiang {
1703b502e88SDave Jiang struct cxl_nvdimm *cxl_nvd = nvdimm_provider_data(nvdimm);
1713b502e88SDave Jiang struct cxl_memdev *cxlmd = cxl_nvd->cxlmd;
17259f8d151SDan Williams struct cxl_memdev_state *mds = to_cxl_memdev_state(cxlmd->cxlds);
1735331cdf4SDan Williams struct cxl_mbox_cmd mbox_cmd;
1743b502e88SDave Jiang struct cxl_pass_erase erase;
1753b502e88SDave Jiang int rc;
1763b502e88SDave Jiang
1775331cdf4SDan Williams erase = (struct cxl_pass_erase) {
1785331cdf4SDan Williams .type = ptype == NVDIMM_MASTER ? CXL_PMEM_SEC_PASS_MASTER :
1795331cdf4SDan Williams CXL_PMEM_SEC_PASS_USER,
1805331cdf4SDan Williams };
1813b502e88SDave Jiang memcpy(erase.pass, key->data, NVDIMM_PASSPHRASE_LEN);
1825331cdf4SDan Williams mbox_cmd = (struct cxl_mbox_cmd) {
1835331cdf4SDan Williams .opcode = CXL_MBOX_OP_PASSPHRASE_SECURE_ERASE,
1845331cdf4SDan Williams .size_in = sizeof(erase),
1855331cdf4SDan Williams .payload_in = &erase,
1865331cdf4SDan Williams };
1875331cdf4SDan Williams
18859f8d151SDan Williams rc = cxl_internal_send_cmd(mds, &mbox_cmd);
1893b502e88SDave Jiang if (rc < 0)
1903b502e88SDave Jiang return rc;
1913b502e88SDave Jiang
1923b502e88SDave Jiang return 0;
1933b502e88SDave Jiang }
1943b502e88SDave Jiang
19532828115SDave Jiang static const struct nvdimm_security_ops __cxl_security_ops = {
19632828115SDave Jiang .get_flags = cxl_pmem_get_security_flags,
19799746940SDave Jiang .change_key = cxl_pmem_security_change_key,
198c4ef680dSDave Jiang .disable = cxl_pmem_security_disable,
199a072f7b7SDave Jiang .freeze = cxl_pmem_security_freeze,
2002bb692f7SDave Jiang .unlock = cxl_pmem_security_unlock,
2013b502e88SDave Jiang .erase = cxl_pmem_security_passphrase_erase,
202dcedadfaSDave Jiang .disable_master = cxl_pmem_security_disable_master,
20332828115SDave Jiang };
20432828115SDave Jiang
20532828115SDave Jiang const struct nvdimm_security_ops *cxl_security_ops = &__cxl_security_ops;
206