1 // SPDX-License-Identifier: GPL-2.0-only 2 /* Copyright(c) 2020 Intel Corporation. All rights reserved. */ 3 #include <linux/security.h> 4 #include <linux/debugfs.h> 5 #include <linux/ktime.h> 6 #include <linux/mutex.h> 7 #include <asm/unaligned.h> 8 #include <cxlpci.h> 9 #include <cxlmem.h> 10 #include <cxl.h> 11 12 #include "core.h" 13 #include "trace.h" 14 15 static bool cxl_raw_allow_all; 16 17 /** 18 * DOC: cxl mbox 19 * 20 * Core implementation of the CXL 2.0 Type-3 Memory Device Mailbox. The 21 * implementation is used by the cxl_pci driver to initialize the device 22 * and implement the cxl_mem.h IOCTL UAPI. It also implements the 23 * backend of the cxl_pmem_ctl() transport for LIBNVDIMM. 24 */ 25 26 #define cxl_for_each_cmd(cmd) \ 27 for ((cmd) = &cxl_mem_commands[0]; \ 28 ((cmd) - cxl_mem_commands) < ARRAY_SIZE(cxl_mem_commands); (cmd)++) 29 30 #define CXL_CMD(_id, sin, sout, _flags) \ 31 [CXL_MEM_COMMAND_ID_##_id] = { \ 32 .info = { \ 33 .id = CXL_MEM_COMMAND_ID_##_id, \ 34 .size_in = sin, \ 35 .size_out = sout, \ 36 }, \ 37 .opcode = CXL_MBOX_OP_##_id, \ 38 .flags = _flags, \ 39 } 40 41 #define CXL_VARIABLE_PAYLOAD ~0U 42 /* 43 * This table defines the supported mailbox commands for the driver. This table 44 * is made up of a UAPI structure. Non-negative values as parameters in the 45 * table will be validated against the user's input. For example, if size_in is 46 * 0, and the user passed in 1, it is an error. 47 */ 48 static struct cxl_mem_command cxl_mem_commands[CXL_MEM_COMMAND_ID_MAX] = { 49 CXL_CMD(IDENTIFY, 0, 0x43, CXL_CMD_FLAG_FORCE_ENABLE), 50 #ifdef CONFIG_CXL_MEM_RAW_COMMANDS 51 CXL_CMD(RAW, CXL_VARIABLE_PAYLOAD, CXL_VARIABLE_PAYLOAD, 0), 52 #endif 53 CXL_CMD(GET_SUPPORTED_LOGS, 0, CXL_VARIABLE_PAYLOAD, CXL_CMD_FLAG_FORCE_ENABLE), 54 CXL_CMD(GET_FW_INFO, 0, 0x50, 0), 55 CXL_CMD(GET_PARTITION_INFO, 0, 0x20, 0), 56 CXL_CMD(GET_LSA, 0x8, CXL_VARIABLE_PAYLOAD, 0), 57 CXL_CMD(GET_HEALTH_INFO, 0, 0x12, 0), 58 CXL_CMD(GET_LOG, 0x18, CXL_VARIABLE_PAYLOAD, CXL_CMD_FLAG_FORCE_ENABLE), 59 CXL_CMD(SET_PARTITION_INFO, 0x0a, 0, 0), 60 CXL_CMD(SET_LSA, CXL_VARIABLE_PAYLOAD, 0, 0), 61 CXL_CMD(GET_ALERT_CONFIG, 0, 0x10, 0), 62 CXL_CMD(SET_ALERT_CONFIG, 0xc, 0, 0), 63 CXL_CMD(GET_SHUTDOWN_STATE, 0, 0x1, 0), 64 CXL_CMD(SET_SHUTDOWN_STATE, 0x1, 0, 0), 65 CXL_CMD(GET_SCAN_MEDIA_CAPS, 0x10, 0x4, 0), 66 }; 67 68 /* 69 * Commands that RAW doesn't permit. The rationale for each: 70 * 71 * CXL_MBOX_OP_ACTIVATE_FW: Firmware activation requires adjustment / 72 * coordination of transaction timeout values at the root bridge level. 73 * 74 * CXL_MBOX_OP_SET_PARTITION_INFO: The device memory map may change live 75 * and needs to be coordinated with HDM updates. 76 * 77 * CXL_MBOX_OP_SET_LSA: The label storage area may be cached by the 78 * driver and any writes from userspace invalidates those contents. 79 * 80 * CXL_MBOX_OP_SET_SHUTDOWN_STATE: Set shutdown state assumes no writes 81 * to the device after it is marked clean, userspace can not make that 82 * assertion. 83 * 84 * CXL_MBOX_OP_[GET_]SCAN_MEDIA: The kernel provides a native error list that 85 * is kept up to date with patrol notifications and error management. 86 * 87 * CXL_MBOX_OP_[GET_,INJECT_,CLEAR_]POISON: These commands require kernel 88 * driver orchestration for safety. 89 */ 90 static u16 cxl_disabled_raw_commands[] = { 91 CXL_MBOX_OP_ACTIVATE_FW, 92 CXL_MBOX_OP_SET_PARTITION_INFO, 93 CXL_MBOX_OP_SET_LSA, 94 CXL_MBOX_OP_SET_SHUTDOWN_STATE, 95 CXL_MBOX_OP_SCAN_MEDIA, 96 CXL_MBOX_OP_GET_SCAN_MEDIA, 97 CXL_MBOX_OP_GET_POISON, 98 CXL_MBOX_OP_INJECT_POISON, 99 CXL_MBOX_OP_CLEAR_POISON, 100 }; 101 102 /* 103 * Command sets that RAW doesn't permit. All opcodes in this set are 104 * disabled because they pass plain text security payloads over the 105 * user/kernel boundary. This functionality is intended to be wrapped 106 * behind the keys ABI which allows for encrypted payloads in the UAPI 107 */ 108 static u8 security_command_sets[] = { 109 0x44, /* Sanitize */ 110 0x45, /* Persistent Memory Data-at-rest Security */ 111 0x46, /* Security Passthrough */ 112 }; 113 114 static bool cxl_is_security_command(u16 opcode) 115 { 116 int i; 117 118 for (i = 0; i < ARRAY_SIZE(security_command_sets); i++) 119 if (security_command_sets[i] == (opcode >> 8)) 120 return true; 121 return false; 122 } 123 124 static bool cxl_is_poison_command(u16 opcode) 125 { 126 #define CXL_MBOX_OP_POISON_CMDS 0x43 127 128 if ((opcode >> 8) == CXL_MBOX_OP_POISON_CMDS) 129 return true; 130 131 return false; 132 } 133 134 static void cxl_set_poison_cmd_enabled(struct cxl_poison_state *poison, 135 u16 opcode) 136 { 137 switch (opcode) { 138 case CXL_MBOX_OP_GET_POISON: 139 set_bit(CXL_POISON_ENABLED_LIST, poison->enabled_cmds); 140 break; 141 case CXL_MBOX_OP_INJECT_POISON: 142 set_bit(CXL_POISON_ENABLED_INJECT, poison->enabled_cmds); 143 break; 144 case CXL_MBOX_OP_CLEAR_POISON: 145 set_bit(CXL_POISON_ENABLED_CLEAR, poison->enabled_cmds); 146 break; 147 case CXL_MBOX_OP_GET_SCAN_MEDIA_CAPS: 148 set_bit(CXL_POISON_ENABLED_SCAN_CAPS, poison->enabled_cmds); 149 break; 150 case CXL_MBOX_OP_SCAN_MEDIA: 151 set_bit(CXL_POISON_ENABLED_SCAN_MEDIA, poison->enabled_cmds); 152 break; 153 case CXL_MBOX_OP_GET_SCAN_MEDIA: 154 set_bit(CXL_POISON_ENABLED_SCAN_RESULTS, poison->enabled_cmds); 155 break; 156 default: 157 break; 158 } 159 } 160 161 static struct cxl_mem_command *cxl_mem_find_command(u16 opcode) 162 { 163 struct cxl_mem_command *c; 164 165 cxl_for_each_cmd(c) 166 if (c->opcode == opcode) 167 return c; 168 169 return NULL; 170 } 171 172 static const char *cxl_mem_opcode_to_name(u16 opcode) 173 { 174 struct cxl_mem_command *c; 175 176 c = cxl_mem_find_command(opcode); 177 if (!c) 178 return NULL; 179 180 return cxl_command_names[c->info.id].name; 181 } 182 183 /** 184 * cxl_internal_send_cmd() - Kernel internal interface to send a mailbox command 185 * @cxlds: The device data for the operation 186 * @mbox_cmd: initialized command to execute 187 * 188 * Context: Any context. 189 * Return: 190 * * %>=0 - Number of bytes returned in @out. 191 * * %-E2BIG - Payload is too large for hardware. 192 * * %-EBUSY - Couldn't acquire exclusive mailbox access. 193 * * %-EFAULT - Hardware error occurred. 194 * * %-ENXIO - Command completed, but device reported an error. 195 * * %-EIO - Unexpected output size. 196 * 197 * Mailbox commands may execute successfully yet the device itself reported an 198 * error. While this distinction can be useful for commands from userspace, the 199 * kernel will only be able to use results when both are successful. 200 */ 201 int cxl_internal_send_cmd(struct cxl_dev_state *cxlds, 202 struct cxl_mbox_cmd *mbox_cmd) 203 { 204 size_t out_size, min_out; 205 int rc; 206 207 if (mbox_cmd->size_in > cxlds->payload_size || 208 mbox_cmd->size_out > cxlds->payload_size) 209 return -E2BIG; 210 211 out_size = mbox_cmd->size_out; 212 min_out = mbox_cmd->min_out; 213 rc = cxlds->mbox_send(cxlds, mbox_cmd); 214 /* 215 * EIO is reserved for a payload size mismatch and mbox_send() 216 * may not return this error. 217 */ 218 if (WARN_ONCE(rc == -EIO, "Bad return code: -EIO")) 219 return -ENXIO; 220 if (rc) 221 return rc; 222 223 if (mbox_cmd->return_code != CXL_MBOX_CMD_RC_SUCCESS && 224 mbox_cmd->return_code != CXL_MBOX_CMD_RC_BACKGROUND) 225 return cxl_mbox_cmd_rc2errno(mbox_cmd); 226 227 if (!out_size) 228 return 0; 229 230 /* 231 * Variable sized output needs to at least satisfy the caller's 232 * minimum if not the fully requested size. 233 */ 234 if (min_out == 0) 235 min_out = out_size; 236 237 if (mbox_cmd->size_out < min_out) 238 return -EIO; 239 return 0; 240 } 241 EXPORT_SYMBOL_NS_GPL(cxl_internal_send_cmd, CXL); 242 243 static bool cxl_mem_raw_command_allowed(u16 opcode) 244 { 245 int i; 246 247 if (!IS_ENABLED(CONFIG_CXL_MEM_RAW_COMMANDS)) 248 return false; 249 250 if (security_locked_down(LOCKDOWN_PCI_ACCESS)) 251 return false; 252 253 if (cxl_raw_allow_all) 254 return true; 255 256 if (cxl_is_security_command(opcode)) 257 return false; 258 259 for (i = 0; i < ARRAY_SIZE(cxl_disabled_raw_commands); i++) 260 if (cxl_disabled_raw_commands[i] == opcode) 261 return false; 262 263 return true; 264 } 265 266 /** 267 * cxl_payload_from_user_allowed() - Check contents of in_payload. 268 * @opcode: The mailbox command opcode. 269 * @payload_in: Pointer to the input payload passed in from user space. 270 * 271 * Return: 272 * * true - payload_in passes check for @opcode. 273 * * false - payload_in contains invalid or unsupported values. 274 * 275 * The driver may inspect payload contents before sending a mailbox 276 * command from user space to the device. The intent is to reject 277 * commands with input payloads that are known to be unsafe. This 278 * check is not intended to replace the users careful selection of 279 * mailbox command parameters and makes no guarantee that the user 280 * command will succeed, nor that it is appropriate. 281 * 282 * The specific checks are determined by the opcode. 283 */ 284 static bool cxl_payload_from_user_allowed(u16 opcode, void *payload_in) 285 { 286 switch (opcode) { 287 case CXL_MBOX_OP_SET_PARTITION_INFO: { 288 struct cxl_mbox_set_partition_info *pi = payload_in; 289 290 if (pi->flags & CXL_SET_PARTITION_IMMEDIATE_FLAG) 291 return false; 292 break; 293 } 294 default: 295 break; 296 } 297 return true; 298 } 299 300 static int cxl_mbox_cmd_ctor(struct cxl_mbox_cmd *mbox, 301 struct cxl_dev_state *cxlds, u16 opcode, 302 size_t in_size, size_t out_size, u64 in_payload) 303 { 304 *mbox = (struct cxl_mbox_cmd) { 305 .opcode = opcode, 306 .size_in = in_size, 307 }; 308 309 if (in_size) { 310 mbox->payload_in = vmemdup_user(u64_to_user_ptr(in_payload), 311 in_size); 312 if (IS_ERR(mbox->payload_in)) 313 return PTR_ERR(mbox->payload_in); 314 315 if (!cxl_payload_from_user_allowed(opcode, mbox->payload_in)) { 316 dev_dbg(cxlds->dev, "%s: input payload not allowed\n", 317 cxl_mem_opcode_to_name(opcode)); 318 kvfree(mbox->payload_in); 319 return -EBUSY; 320 } 321 } 322 323 /* Prepare to handle a full payload for variable sized output */ 324 if (out_size == CXL_VARIABLE_PAYLOAD) 325 mbox->size_out = cxlds->payload_size; 326 else 327 mbox->size_out = out_size; 328 329 if (mbox->size_out) { 330 mbox->payload_out = kvzalloc(mbox->size_out, GFP_KERNEL); 331 if (!mbox->payload_out) { 332 kvfree(mbox->payload_in); 333 return -ENOMEM; 334 } 335 } 336 return 0; 337 } 338 339 static void cxl_mbox_cmd_dtor(struct cxl_mbox_cmd *mbox) 340 { 341 kvfree(mbox->payload_in); 342 kvfree(mbox->payload_out); 343 } 344 345 static int cxl_to_mem_cmd_raw(struct cxl_mem_command *mem_cmd, 346 const struct cxl_send_command *send_cmd, 347 struct cxl_dev_state *cxlds) 348 { 349 if (send_cmd->raw.rsvd) 350 return -EINVAL; 351 352 /* 353 * Unlike supported commands, the output size of RAW commands 354 * gets passed along without further checking, so it must be 355 * validated here. 356 */ 357 if (send_cmd->out.size > cxlds->payload_size) 358 return -EINVAL; 359 360 if (!cxl_mem_raw_command_allowed(send_cmd->raw.opcode)) 361 return -EPERM; 362 363 dev_WARN_ONCE(cxlds->dev, true, "raw command path used\n"); 364 365 *mem_cmd = (struct cxl_mem_command) { 366 .info = { 367 .id = CXL_MEM_COMMAND_ID_RAW, 368 .size_in = send_cmd->in.size, 369 .size_out = send_cmd->out.size, 370 }, 371 .opcode = send_cmd->raw.opcode 372 }; 373 374 return 0; 375 } 376 377 static int cxl_to_mem_cmd(struct cxl_mem_command *mem_cmd, 378 const struct cxl_send_command *send_cmd, 379 struct cxl_dev_state *cxlds) 380 { 381 struct cxl_mem_command *c = &cxl_mem_commands[send_cmd->id]; 382 const struct cxl_command_info *info = &c->info; 383 384 if (send_cmd->flags & ~CXL_MEM_COMMAND_FLAG_MASK) 385 return -EINVAL; 386 387 if (send_cmd->rsvd) 388 return -EINVAL; 389 390 if (send_cmd->in.rsvd || send_cmd->out.rsvd) 391 return -EINVAL; 392 393 /* Check that the command is enabled for hardware */ 394 if (!test_bit(info->id, cxlds->enabled_cmds)) 395 return -ENOTTY; 396 397 /* Check that the command is not claimed for exclusive kernel use */ 398 if (test_bit(info->id, cxlds->exclusive_cmds)) 399 return -EBUSY; 400 401 /* Check the input buffer is the expected size */ 402 if ((info->size_in != CXL_VARIABLE_PAYLOAD) && 403 (info->size_in != send_cmd->in.size)) 404 return -ENOMEM; 405 406 /* Check the output buffer is at least large enough */ 407 if ((info->size_out != CXL_VARIABLE_PAYLOAD) && 408 (send_cmd->out.size < info->size_out)) 409 return -ENOMEM; 410 411 *mem_cmd = (struct cxl_mem_command) { 412 .info = { 413 .id = info->id, 414 .flags = info->flags, 415 .size_in = send_cmd->in.size, 416 .size_out = send_cmd->out.size, 417 }, 418 .opcode = c->opcode 419 }; 420 421 return 0; 422 } 423 424 /** 425 * cxl_validate_cmd_from_user() - Check fields for CXL_MEM_SEND_COMMAND. 426 * @mbox_cmd: Sanitized and populated &struct cxl_mbox_cmd. 427 * @cxlds: The device data for the operation 428 * @send_cmd: &struct cxl_send_command copied in from userspace. 429 * 430 * Return: 431 * * %0 - @out_cmd is ready to send. 432 * * %-ENOTTY - Invalid command specified. 433 * * %-EINVAL - Reserved fields or invalid values were used. 434 * * %-ENOMEM - Input or output buffer wasn't sized properly. 435 * * %-EPERM - Attempted to use a protected command. 436 * * %-EBUSY - Kernel has claimed exclusive access to this opcode 437 * 438 * The result of this command is a fully validated command in @mbox_cmd that is 439 * safe to send to the hardware. 440 */ 441 static int cxl_validate_cmd_from_user(struct cxl_mbox_cmd *mbox_cmd, 442 struct cxl_dev_state *cxlds, 443 const struct cxl_send_command *send_cmd) 444 { 445 struct cxl_mem_command mem_cmd; 446 int rc; 447 448 if (send_cmd->id == 0 || send_cmd->id >= CXL_MEM_COMMAND_ID_MAX) 449 return -ENOTTY; 450 451 /* 452 * The user can never specify an input payload larger than what hardware 453 * supports, but output can be arbitrarily large (simply write out as 454 * much data as the hardware provides). 455 */ 456 if (send_cmd->in.size > cxlds->payload_size) 457 return -EINVAL; 458 459 /* Sanitize and construct a cxl_mem_command */ 460 if (send_cmd->id == CXL_MEM_COMMAND_ID_RAW) 461 rc = cxl_to_mem_cmd_raw(&mem_cmd, send_cmd, cxlds); 462 else 463 rc = cxl_to_mem_cmd(&mem_cmd, send_cmd, cxlds); 464 465 if (rc) 466 return rc; 467 468 /* Sanitize and construct a cxl_mbox_cmd */ 469 return cxl_mbox_cmd_ctor(mbox_cmd, cxlds, mem_cmd.opcode, 470 mem_cmd.info.size_in, mem_cmd.info.size_out, 471 send_cmd->in.payload); 472 } 473 474 int cxl_query_cmd(struct cxl_memdev *cxlmd, 475 struct cxl_mem_query_commands __user *q) 476 { 477 struct device *dev = &cxlmd->dev; 478 struct cxl_mem_command *cmd; 479 u32 n_commands; 480 int j = 0; 481 482 dev_dbg(dev, "Query IOCTL\n"); 483 484 if (get_user(n_commands, &q->n_commands)) 485 return -EFAULT; 486 487 /* returns the total number if 0 elements are requested. */ 488 if (n_commands == 0) 489 return put_user(ARRAY_SIZE(cxl_mem_commands), &q->n_commands); 490 491 /* 492 * otherwise, return max(n_commands, total commands) cxl_command_info 493 * structures. 494 */ 495 cxl_for_each_cmd(cmd) { 496 struct cxl_command_info info = cmd->info; 497 498 if (test_bit(info.id, cxlmd->cxlds->enabled_cmds)) 499 info.flags |= CXL_MEM_COMMAND_FLAG_ENABLED; 500 if (test_bit(info.id, cxlmd->cxlds->exclusive_cmds)) 501 info.flags |= CXL_MEM_COMMAND_FLAG_EXCLUSIVE; 502 503 if (copy_to_user(&q->commands[j++], &info, sizeof(info))) 504 return -EFAULT; 505 506 if (j == n_commands) 507 break; 508 } 509 510 return 0; 511 } 512 513 /** 514 * handle_mailbox_cmd_from_user() - Dispatch a mailbox command for userspace. 515 * @cxlds: The device data for the operation 516 * @mbox_cmd: The validated mailbox command. 517 * @out_payload: Pointer to userspace's output payload. 518 * @size_out: (Input) Max payload size to copy out. 519 * (Output) Payload size hardware generated. 520 * @retval: Hardware generated return code from the operation. 521 * 522 * Return: 523 * * %0 - Mailbox transaction succeeded. This implies the mailbox 524 * protocol completed successfully not that the operation itself 525 * was successful. 526 * * %-ENOMEM - Couldn't allocate a bounce buffer. 527 * * %-EFAULT - Something happened with copy_to/from_user. 528 * * %-EINTR - Mailbox acquisition interrupted. 529 * * %-EXXX - Transaction level failures. 530 * 531 * Dispatches a mailbox command on behalf of a userspace request. 532 * The output payload is copied to userspace. 533 * 534 * See cxl_send_cmd(). 535 */ 536 static int handle_mailbox_cmd_from_user(struct cxl_dev_state *cxlds, 537 struct cxl_mbox_cmd *mbox_cmd, 538 u64 out_payload, s32 *size_out, 539 u32 *retval) 540 { 541 struct device *dev = cxlds->dev; 542 int rc; 543 544 dev_dbg(dev, 545 "Submitting %s command for user\n" 546 "\topcode: %x\n" 547 "\tsize: %zx\n", 548 cxl_mem_opcode_to_name(mbox_cmd->opcode), 549 mbox_cmd->opcode, mbox_cmd->size_in); 550 551 rc = cxlds->mbox_send(cxlds, mbox_cmd); 552 if (rc) 553 goto out; 554 555 /* 556 * @size_out contains the max size that's allowed to be written back out 557 * to userspace. While the payload may have written more output than 558 * this it will have to be ignored. 559 */ 560 if (mbox_cmd->size_out) { 561 dev_WARN_ONCE(dev, mbox_cmd->size_out > *size_out, 562 "Invalid return size\n"); 563 if (copy_to_user(u64_to_user_ptr(out_payload), 564 mbox_cmd->payload_out, mbox_cmd->size_out)) { 565 rc = -EFAULT; 566 goto out; 567 } 568 } 569 570 *size_out = mbox_cmd->size_out; 571 *retval = mbox_cmd->return_code; 572 573 out: 574 cxl_mbox_cmd_dtor(mbox_cmd); 575 return rc; 576 } 577 578 int cxl_send_cmd(struct cxl_memdev *cxlmd, struct cxl_send_command __user *s) 579 { 580 struct cxl_dev_state *cxlds = cxlmd->cxlds; 581 struct device *dev = &cxlmd->dev; 582 struct cxl_send_command send; 583 struct cxl_mbox_cmd mbox_cmd; 584 int rc; 585 586 dev_dbg(dev, "Send IOCTL\n"); 587 588 if (copy_from_user(&send, s, sizeof(send))) 589 return -EFAULT; 590 591 rc = cxl_validate_cmd_from_user(&mbox_cmd, cxlmd->cxlds, &send); 592 if (rc) 593 return rc; 594 595 rc = handle_mailbox_cmd_from_user(cxlds, &mbox_cmd, send.out.payload, 596 &send.out.size, &send.retval); 597 if (rc) 598 return rc; 599 600 if (copy_to_user(s, &send, sizeof(send))) 601 return -EFAULT; 602 603 return 0; 604 } 605 606 static int cxl_xfer_log(struct cxl_dev_state *cxlds, uuid_t *uuid, u32 *size, u8 *out) 607 { 608 u32 remaining = *size; 609 u32 offset = 0; 610 611 while (remaining) { 612 u32 xfer_size = min_t(u32, remaining, cxlds->payload_size); 613 struct cxl_mbox_cmd mbox_cmd; 614 struct cxl_mbox_get_log log; 615 int rc; 616 617 log = (struct cxl_mbox_get_log) { 618 .uuid = *uuid, 619 .offset = cpu_to_le32(offset), 620 .length = cpu_to_le32(xfer_size), 621 }; 622 623 mbox_cmd = (struct cxl_mbox_cmd) { 624 .opcode = CXL_MBOX_OP_GET_LOG, 625 .size_in = sizeof(log), 626 .payload_in = &log, 627 .size_out = xfer_size, 628 .payload_out = out, 629 }; 630 631 rc = cxl_internal_send_cmd(cxlds, &mbox_cmd); 632 633 /* 634 * The output payload length that indicates the number 635 * of valid bytes can be smaller than the Log buffer 636 * size. 637 */ 638 if (rc == -EIO && mbox_cmd.size_out < xfer_size) { 639 offset += mbox_cmd.size_out; 640 break; 641 } 642 643 if (rc < 0) 644 return rc; 645 646 out += xfer_size; 647 remaining -= xfer_size; 648 offset += xfer_size; 649 } 650 651 *size = offset; 652 653 return 0; 654 } 655 656 /** 657 * cxl_walk_cel() - Walk through the Command Effects Log. 658 * @cxlds: The device data for the operation 659 * @size: Length of the Command Effects Log. 660 * @cel: CEL 661 * 662 * Iterate over each entry in the CEL and determine if the driver supports the 663 * command. If so, the command is enabled for the device and can be used later. 664 */ 665 static void cxl_walk_cel(struct cxl_dev_state *cxlds, size_t size, u8 *cel) 666 { 667 struct cxl_cel_entry *cel_entry; 668 const int cel_entries = size / sizeof(*cel_entry); 669 int i; 670 671 cel_entry = (struct cxl_cel_entry *) cel; 672 673 for (i = 0; i < cel_entries; i++) { 674 u16 opcode = le16_to_cpu(cel_entry[i].opcode); 675 struct cxl_mem_command *cmd = cxl_mem_find_command(opcode); 676 677 if (!cmd && !cxl_is_poison_command(opcode)) { 678 dev_dbg(cxlds->dev, 679 "Opcode 0x%04x unsupported by driver\n", opcode); 680 continue; 681 } 682 683 if (cmd) 684 set_bit(cmd->info.id, cxlds->enabled_cmds); 685 686 if (cxl_is_poison_command(opcode)) 687 cxl_set_poison_cmd_enabled(&cxlds->poison, opcode); 688 689 dev_dbg(cxlds->dev, "Opcode 0x%04x enabled\n", opcode); 690 } 691 } 692 693 static struct cxl_mbox_get_supported_logs *cxl_get_gsl(struct cxl_dev_state *cxlds) 694 { 695 struct cxl_mbox_get_supported_logs *ret; 696 struct cxl_mbox_cmd mbox_cmd; 697 int rc; 698 699 ret = kvmalloc(cxlds->payload_size, GFP_KERNEL); 700 if (!ret) 701 return ERR_PTR(-ENOMEM); 702 703 mbox_cmd = (struct cxl_mbox_cmd) { 704 .opcode = CXL_MBOX_OP_GET_SUPPORTED_LOGS, 705 .size_out = cxlds->payload_size, 706 .payload_out = ret, 707 /* At least the record number field must be valid */ 708 .min_out = 2, 709 }; 710 rc = cxl_internal_send_cmd(cxlds, &mbox_cmd); 711 if (rc < 0) { 712 kvfree(ret); 713 return ERR_PTR(rc); 714 } 715 716 717 return ret; 718 } 719 720 enum { 721 CEL_UUID, 722 VENDOR_DEBUG_UUID, 723 }; 724 725 /* See CXL 2.0 Table 170. Get Log Input Payload */ 726 static const uuid_t log_uuid[] = { 727 [CEL_UUID] = DEFINE_CXL_CEL_UUID, 728 [VENDOR_DEBUG_UUID] = DEFINE_CXL_VENDOR_DEBUG_UUID, 729 }; 730 731 /** 732 * cxl_enumerate_cmds() - Enumerate commands for a device. 733 * @cxlds: The device data for the operation 734 * 735 * Returns 0 if enumerate completed successfully. 736 * 737 * CXL devices have optional support for certain commands. This function will 738 * determine the set of supported commands for the hardware and update the 739 * enabled_cmds bitmap in the @cxlds. 740 */ 741 int cxl_enumerate_cmds(struct cxl_dev_state *cxlds) 742 { 743 struct cxl_mbox_get_supported_logs *gsl; 744 struct device *dev = cxlds->dev; 745 struct cxl_mem_command *cmd; 746 int i, rc; 747 748 gsl = cxl_get_gsl(cxlds); 749 if (IS_ERR(gsl)) 750 return PTR_ERR(gsl); 751 752 rc = -ENOENT; 753 for (i = 0; i < le16_to_cpu(gsl->entries); i++) { 754 u32 size = le32_to_cpu(gsl->entry[i].size); 755 uuid_t uuid = gsl->entry[i].uuid; 756 u8 *log; 757 758 dev_dbg(dev, "Found LOG type %pU of size %d", &uuid, size); 759 760 if (!uuid_equal(&uuid, &log_uuid[CEL_UUID])) 761 continue; 762 763 log = kvmalloc(size, GFP_KERNEL); 764 if (!log) { 765 rc = -ENOMEM; 766 goto out; 767 } 768 769 rc = cxl_xfer_log(cxlds, &uuid, &size, log); 770 if (rc) { 771 kvfree(log); 772 goto out; 773 } 774 775 cxl_walk_cel(cxlds, size, log); 776 kvfree(log); 777 778 /* In case CEL was bogus, enable some default commands. */ 779 cxl_for_each_cmd(cmd) 780 if (cmd->flags & CXL_CMD_FLAG_FORCE_ENABLE) 781 set_bit(cmd->info.id, cxlds->enabled_cmds); 782 783 /* Found the required CEL */ 784 rc = 0; 785 } 786 out: 787 kvfree(gsl); 788 return rc; 789 } 790 EXPORT_SYMBOL_NS_GPL(cxl_enumerate_cmds, CXL); 791 792 /* 793 * General Media Event Record 794 * CXL rev 3.0 Section 8.2.9.2.1.1; Table 8-43 795 */ 796 static const uuid_t gen_media_event_uuid = 797 UUID_INIT(0xfbcd0a77, 0xc260, 0x417f, 798 0x85, 0xa9, 0x08, 0x8b, 0x16, 0x21, 0xeb, 0xa6); 799 800 /* 801 * DRAM Event Record 802 * CXL rev 3.0 section 8.2.9.2.1.2; Table 8-44 803 */ 804 static const uuid_t dram_event_uuid = 805 UUID_INIT(0x601dcbb3, 0x9c06, 0x4eab, 806 0xb8, 0xaf, 0x4e, 0x9b, 0xfb, 0x5c, 0x96, 0x24); 807 808 /* 809 * Memory Module Event Record 810 * CXL rev 3.0 section 8.2.9.2.1.3; Table 8-45 811 */ 812 static const uuid_t mem_mod_event_uuid = 813 UUID_INIT(0xfe927475, 0xdd59, 0x4339, 814 0xa5, 0x86, 0x79, 0xba, 0xb1, 0x13, 0xb7, 0x74); 815 816 static void cxl_event_trace_record(const struct cxl_memdev *cxlmd, 817 enum cxl_event_log_type type, 818 struct cxl_event_record_raw *record) 819 { 820 uuid_t *id = &record->hdr.id; 821 822 if (uuid_equal(id, &gen_media_event_uuid)) { 823 struct cxl_event_gen_media *rec = 824 (struct cxl_event_gen_media *)record; 825 826 trace_cxl_general_media(cxlmd, type, rec); 827 } else if (uuid_equal(id, &dram_event_uuid)) { 828 struct cxl_event_dram *rec = (struct cxl_event_dram *)record; 829 830 trace_cxl_dram(cxlmd, type, rec); 831 } else if (uuid_equal(id, &mem_mod_event_uuid)) { 832 struct cxl_event_mem_module *rec = 833 (struct cxl_event_mem_module *)record; 834 835 trace_cxl_memory_module(cxlmd, type, rec); 836 } else { 837 /* For unknown record types print just the header */ 838 trace_cxl_generic_event(cxlmd, type, record); 839 } 840 } 841 842 static int cxl_clear_event_record(struct cxl_dev_state *cxlds, 843 enum cxl_event_log_type log, 844 struct cxl_get_event_payload *get_pl) 845 { 846 struct cxl_mbox_clear_event_payload *payload; 847 u16 total = le16_to_cpu(get_pl->record_count); 848 u8 max_handles = CXL_CLEAR_EVENT_MAX_HANDLES; 849 size_t pl_size = struct_size(payload, handles, max_handles); 850 struct cxl_mbox_cmd mbox_cmd; 851 u16 cnt; 852 int rc = 0; 853 int i; 854 855 /* Payload size may limit the max handles */ 856 if (pl_size > cxlds->payload_size) { 857 max_handles = (cxlds->payload_size - sizeof(*payload)) / 858 sizeof(__le16); 859 pl_size = struct_size(payload, handles, max_handles); 860 } 861 862 payload = kvzalloc(pl_size, GFP_KERNEL); 863 if (!payload) 864 return -ENOMEM; 865 866 *payload = (struct cxl_mbox_clear_event_payload) { 867 .event_log = log, 868 }; 869 870 mbox_cmd = (struct cxl_mbox_cmd) { 871 .opcode = CXL_MBOX_OP_CLEAR_EVENT_RECORD, 872 .payload_in = payload, 873 .size_in = pl_size, 874 }; 875 876 /* 877 * Clear Event Records uses u8 for the handle cnt while Get Event 878 * Record can return up to 0xffff records. 879 */ 880 i = 0; 881 for (cnt = 0; cnt < total; cnt++) { 882 payload->handles[i++] = get_pl->records[cnt].hdr.handle; 883 dev_dbg(cxlds->dev, "Event log '%d': Clearing %u\n", 884 log, le16_to_cpu(payload->handles[i])); 885 886 if (i == max_handles) { 887 payload->nr_recs = i; 888 rc = cxl_internal_send_cmd(cxlds, &mbox_cmd); 889 if (rc) 890 goto free_pl; 891 i = 0; 892 } 893 } 894 895 /* Clear what is left if any */ 896 if (i) { 897 payload->nr_recs = i; 898 mbox_cmd.size_in = struct_size(payload, handles, i); 899 rc = cxl_internal_send_cmd(cxlds, &mbox_cmd); 900 if (rc) 901 goto free_pl; 902 } 903 904 free_pl: 905 kvfree(payload); 906 return rc; 907 } 908 909 static void cxl_mem_get_records_log(struct cxl_dev_state *cxlds, 910 enum cxl_event_log_type type) 911 { 912 struct cxl_get_event_payload *payload; 913 struct cxl_mbox_cmd mbox_cmd; 914 u8 log_type = type; 915 u16 nr_rec; 916 917 mutex_lock(&cxlds->event.log_lock); 918 payload = cxlds->event.buf; 919 920 mbox_cmd = (struct cxl_mbox_cmd) { 921 .opcode = CXL_MBOX_OP_GET_EVENT_RECORD, 922 .payload_in = &log_type, 923 .size_in = sizeof(log_type), 924 .payload_out = payload, 925 .size_out = cxlds->payload_size, 926 .min_out = struct_size(payload, records, 0), 927 }; 928 929 do { 930 int rc, i; 931 932 rc = cxl_internal_send_cmd(cxlds, &mbox_cmd); 933 if (rc) { 934 dev_err_ratelimited(cxlds->dev, 935 "Event log '%d': Failed to query event records : %d", 936 type, rc); 937 break; 938 } 939 940 nr_rec = le16_to_cpu(payload->record_count); 941 if (!nr_rec) 942 break; 943 944 for (i = 0; i < nr_rec; i++) 945 cxl_event_trace_record(cxlds->cxlmd, type, 946 &payload->records[i]); 947 948 if (payload->flags & CXL_GET_EVENT_FLAG_OVERFLOW) 949 trace_cxl_overflow(cxlds->cxlmd, type, payload); 950 951 rc = cxl_clear_event_record(cxlds, type, payload); 952 if (rc) { 953 dev_err_ratelimited(cxlds->dev, 954 "Event log '%d': Failed to clear events : %d", 955 type, rc); 956 break; 957 } 958 } while (nr_rec); 959 960 mutex_unlock(&cxlds->event.log_lock); 961 } 962 963 /** 964 * cxl_mem_get_event_records - Get Event Records from the device 965 * @cxlds: The device data for the operation 966 * @status: Event Status register value identifying which events are available. 967 * 968 * Retrieve all event records available on the device, report them as trace 969 * events, and clear them. 970 * 971 * See CXL rev 3.0 @8.2.9.2.2 Get Event Records 972 * See CXL rev 3.0 @8.2.9.2.3 Clear Event Records 973 */ 974 void cxl_mem_get_event_records(struct cxl_dev_state *cxlds, u32 status) 975 { 976 dev_dbg(cxlds->dev, "Reading event logs: %x\n", status); 977 978 if (status & CXLDEV_EVENT_STATUS_FATAL) 979 cxl_mem_get_records_log(cxlds, CXL_EVENT_TYPE_FATAL); 980 if (status & CXLDEV_EVENT_STATUS_FAIL) 981 cxl_mem_get_records_log(cxlds, CXL_EVENT_TYPE_FAIL); 982 if (status & CXLDEV_EVENT_STATUS_WARN) 983 cxl_mem_get_records_log(cxlds, CXL_EVENT_TYPE_WARN); 984 if (status & CXLDEV_EVENT_STATUS_INFO) 985 cxl_mem_get_records_log(cxlds, CXL_EVENT_TYPE_INFO); 986 } 987 EXPORT_SYMBOL_NS_GPL(cxl_mem_get_event_records, CXL); 988 989 /** 990 * cxl_mem_get_partition_info - Get partition info 991 * @cxlds: The device data for the operation 992 * 993 * Retrieve the current partition info for the device specified. The active 994 * values are the current capacity in bytes. If not 0, the 'next' values are 995 * the pending values, in bytes, which take affect on next cold reset. 996 * 997 * Return: 0 if no error: or the result of the mailbox command. 998 * 999 * See CXL @8.2.9.5.2.1 Get Partition Info 1000 */ 1001 static int cxl_mem_get_partition_info(struct cxl_dev_state *cxlds) 1002 { 1003 struct cxl_mbox_get_partition_info pi; 1004 struct cxl_mbox_cmd mbox_cmd; 1005 int rc; 1006 1007 mbox_cmd = (struct cxl_mbox_cmd) { 1008 .opcode = CXL_MBOX_OP_GET_PARTITION_INFO, 1009 .size_out = sizeof(pi), 1010 .payload_out = &pi, 1011 }; 1012 rc = cxl_internal_send_cmd(cxlds, &mbox_cmd); 1013 if (rc) 1014 return rc; 1015 1016 cxlds->active_volatile_bytes = 1017 le64_to_cpu(pi.active_volatile_cap) * CXL_CAPACITY_MULTIPLIER; 1018 cxlds->active_persistent_bytes = 1019 le64_to_cpu(pi.active_persistent_cap) * CXL_CAPACITY_MULTIPLIER; 1020 cxlds->next_volatile_bytes = 1021 le64_to_cpu(pi.next_volatile_cap) * CXL_CAPACITY_MULTIPLIER; 1022 cxlds->next_persistent_bytes = 1023 le64_to_cpu(pi.next_volatile_cap) * CXL_CAPACITY_MULTIPLIER; 1024 1025 return 0; 1026 } 1027 1028 /** 1029 * cxl_dev_state_identify() - Send the IDENTIFY command to the device. 1030 * @cxlds: The device data for the operation 1031 * 1032 * Return: 0 if identify was executed successfully or media not ready. 1033 * 1034 * This will dispatch the identify command to the device and on success populate 1035 * structures to be exported to sysfs. 1036 */ 1037 int cxl_dev_state_identify(struct cxl_dev_state *cxlds) 1038 { 1039 /* See CXL 2.0 Table 175 Identify Memory Device Output Payload */ 1040 struct cxl_mbox_identify id; 1041 struct cxl_mbox_cmd mbox_cmd; 1042 u32 val; 1043 int rc; 1044 1045 if (!cxlds->media_ready) 1046 return 0; 1047 1048 mbox_cmd = (struct cxl_mbox_cmd) { 1049 .opcode = CXL_MBOX_OP_IDENTIFY, 1050 .size_out = sizeof(id), 1051 .payload_out = &id, 1052 }; 1053 rc = cxl_internal_send_cmd(cxlds, &mbox_cmd); 1054 if (rc < 0) 1055 return rc; 1056 1057 cxlds->total_bytes = 1058 le64_to_cpu(id.total_capacity) * CXL_CAPACITY_MULTIPLIER; 1059 cxlds->volatile_only_bytes = 1060 le64_to_cpu(id.volatile_capacity) * CXL_CAPACITY_MULTIPLIER; 1061 cxlds->persistent_only_bytes = 1062 le64_to_cpu(id.persistent_capacity) * CXL_CAPACITY_MULTIPLIER; 1063 cxlds->partition_align_bytes = 1064 le64_to_cpu(id.partition_align) * CXL_CAPACITY_MULTIPLIER; 1065 1066 cxlds->lsa_size = le32_to_cpu(id.lsa_size); 1067 memcpy(cxlds->firmware_version, id.fw_revision, sizeof(id.fw_revision)); 1068 1069 if (test_bit(CXL_POISON_ENABLED_LIST, cxlds->poison.enabled_cmds)) { 1070 val = get_unaligned_le24(id.poison_list_max_mer); 1071 cxlds->poison.max_errors = min_t(u32, val, CXL_POISON_LIST_MAX); 1072 } 1073 1074 return 0; 1075 } 1076 EXPORT_SYMBOL_NS_GPL(cxl_dev_state_identify, CXL); 1077 1078 static int add_dpa_res(struct device *dev, struct resource *parent, 1079 struct resource *res, resource_size_t start, 1080 resource_size_t size, const char *type) 1081 { 1082 int rc; 1083 1084 res->name = type; 1085 res->start = start; 1086 res->end = start + size - 1; 1087 res->flags = IORESOURCE_MEM; 1088 if (resource_size(res) == 0) { 1089 dev_dbg(dev, "DPA(%s): no capacity\n", res->name); 1090 return 0; 1091 } 1092 rc = request_resource(parent, res); 1093 if (rc) { 1094 dev_err(dev, "DPA(%s): failed to track %pr (%d)\n", res->name, 1095 res, rc); 1096 return rc; 1097 } 1098 1099 dev_dbg(dev, "DPA(%s): %pr\n", res->name, res); 1100 1101 return 0; 1102 } 1103 1104 int cxl_mem_create_range_info(struct cxl_dev_state *cxlds) 1105 { 1106 struct device *dev = cxlds->dev; 1107 int rc; 1108 1109 cxlds->dpa_res = 1110 (struct resource)DEFINE_RES_MEM(0, cxlds->total_bytes); 1111 1112 if (cxlds->partition_align_bytes == 0) { 1113 rc = add_dpa_res(dev, &cxlds->dpa_res, &cxlds->ram_res, 0, 1114 cxlds->volatile_only_bytes, "ram"); 1115 if (rc) 1116 return rc; 1117 return add_dpa_res(dev, &cxlds->dpa_res, &cxlds->pmem_res, 1118 cxlds->volatile_only_bytes, 1119 cxlds->persistent_only_bytes, "pmem"); 1120 } 1121 1122 if (cxlds->media_ready) { 1123 rc = cxl_mem_get_partition_info(cxlds); 1124 if (rc) { 1125 dev_err(dev, "Failed to query partition information\n"); 1126 return rc; 1127 } 1128 } 1129 1130 rc = add_dpa_res(dev, &cxlds->dpa_res, &cxlds->ram_res, 0, 1131 cxlds->active_volatile_bytes, "ram"); 1132 if (rc) 1133 return rc; 1134 return add_dpa_res(dev, &cxlds->dpa_res, &cxlds->pmem_res, 1135 cxlds->active_volatile_bytes, 1136 cxlds->active_persistent_bytes, "pmem"); 1137 } 1138 EXPORT_SYMBOL_NS_GPL(cxl_mem_create_range_info, CXL); 1139 1140 int cxl_set_timestamp(struct cxl_dev_state *cxlds) 1141 { 1142 struct cxl_mbox_cmd mbox_cmd; 1143 struct cxl_mbox_set_timestamp_in pi; 1144 int rc; 1145 1146 pi.timestamp = cpu_to_le64(ktime_get_real_ns()); 1147 mbox_cmd = (struct cxl_mbox_cmd) { 1148 .opcode = CXL_MBOX_OP_SET_TIMESTAMP, 1149 .size_in = sizeof(pi), 1150 .payload_in = &pi, 1151 }; 1152 1153 rc = cxl_internal_send_cmd(cxlds, &mbox_cmd); 1154 /* 1155 * Command is optional. Devices may have another way of providing 1156 * a timestamp, or may return all 0s in timestamp fields. 1157 * Don't report an error if this command isn't supported 1158 */ 1159 if (rc && (mbox_cmd.return_code != CXL_MBOX_CMD_RC_UNSUPPORTED)) 1160 return rc; 1161 1162 return 0; 1163 } 1164 EXPORT_SYMBOL_NS_GPL(cxl_set_timestamp, CXL); 1165 1166 int cxl_mem_get_poison(struct cxl_memdev *cxlmd, u64 offset, u64 len, 1167 struct cxl_region *cxlr) 1168 { 1169 struct cxl_dev_state *cxlds = cxlmd->cxlds; 1170 struct cxl_mbox_poison_out *po; 1171 struct cxl_mbox_poison_in pi; 1172 struct cxl_mbox_cmd mbox_cmd; 1173 int nr_records = 0; 1174 int rc; 1175 1176 rc = mutex_lock_interruptible(&cxlds->poison.lock); 1177 if (rc) 1178 return rc; 1179 1180 po = cxlds->poison.list_out; 1181 pi.offset = cpu_to_le64(offset); 1182 pi.length = cpu_to_le64(len / CXL_POISON_LEN_MULT); 1183 1184 mbox_cmd = (struct cxl_mbox_cmd) { 1185 .opcode = CXL_MBOX_OP_GET_POISON, 1186 .size_in = sizeof(pi), 1187 .payload_in = &pi, 1188 .size_out = cxlds->payload_size, 1189 .payload_out = po, 1190 .min_out = struct_size(po, record, 0), 1191 }; 1192 1193 do { 1194 rc = cxl_internal_send_cmd(cxlds, &mbox_cmd); 1195 if (rc) 1196 break; 1197 1198 for (int i = 0; i < le16_to_cpu(po->count); i++) 1199 trace_cxl_poison(cxlmd, cxlr, &po->record[i], 1200 po->flags, po->overflow_ts, 1201 CXL_POISON_TRACE_LIST); 1202 1203 /* Protect against an uncleared _FLAG_MORE */ 1204 nr_records = nr_records + le16_to_cpu(po->count); 1205 if (nr_records >= cxlds->poison.max_errors) { 1206 dev_dbg(&cxlmd->dev, "Max Error Records reached: %d\n", 1207 nr_records); 1208 break; 1209 } 1210 } while (po->flags & CXL_POISON_FLAG_MORE); 1211 1212 mutex_unlock(&cxlds->poison.lock); 1213 return rc; 1214 } 1215 EXPORT_SYMBOL_NS_GPL(cxl_mem_get_poison, CXL); 1216 1217 static void free_poison_buf(void *buf) 1218 { 1219 kvfree(buf); 1220 } 1221 1222 /* Get Poison List output buffer is protected by cxlds->poison.lock */ 1223 static int cxl_poison_alloc_buf(struct cxl_dev_state *cxlds) 1224 { 1225 cxlds->poison.list_out = kvmalloc(cxlds->payload_size, GFP_KERNEL); 1226 if (!cxlds->poison.list_out) 1227 return -ENOMEM; 1228 1229 return devm_add_action_or_reset(cxlds->dev, free_poison_buf, 1230 cxlds->poison.list_out); 1231 } 1232 1233 int cxl_poison_state_init(struct cxl_dev_state *cxlds) 1234 { 1235 int rc; 1236 1237 if (!test_bit(CXL_POISON_ENABLED_LIST, cxlds->poison.enabled_cmds)) 1238 return 0; 1239 1240 rc = cxl_poison_alloc_buf(cxlds); 1241 if (rc) { 1242 clear_bit(CXL_POISON_ENABLED_LIST, cxlds->poison.enabled_cmds); 1243 return rc; 1244 } 1245 1246 mutex_init(&cxlds->poison.lock); 1247 return 0; 1248 } 1249 EXPORT_SYMBOL_NS_GPL(cxl_poison_state_init, CXL); 1250 1251 struct cxl_dev_state *cxl_dev_state_create(struct device *dev) 1252 { 1253 struct cxl_dev_state *cxlds; 1254 1255 cxlds = devm_kzalloc(dev, sizeof(*cxlds), GFP_KERNEL); 1256 if (!cxlds) { 1257 dev_err(dev, "No memory available\n"); 1258 return ERR_PTR(-ENOMEM); 1259 } 1260 1261 mutex_init(&cxlds->mbox_mutex); 1262 mutex_init(&cxlds->event.log_lock); 1263 cxlds->dev = dev; 1264 1265 return cxlds; 1266 } 1267 EXPORT_SYMBOL_NS_GPL(cxl_dev_state_create, CXL); 1268 1269 void __init cxl_mbox_init(void) 1270 { 1271 struct dentry *mbox_debugfs; 1272 1273 mbox_debugfs = cxl_debugfs_create_dir("mbox"); 1274 debugfs_create_bool("raw_allow_all", 0600, mbox_debugfs, 1275 &cxl_raw_allow_all); 1276 } 1277