1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* Copyright(c) 2020 Intel Corporation. */ 3 4 #ifndef __CXL_CORE_H__ 5 #define __CXL_CORE_H__ 6 7 extern const struct device_type cxl_nvdimm_bridge_type; 8 extern const struct device_type cxl_nvdimm_type; 9 10 extern struct attribute_group cxl_base_attribute_group; 11 12 #ifdef CONFIG_CXL_REGION 13 extern struct device_attribute dev_attr_create_pmem_region; 14 extern struct device_attribute dev_attr_create_ram_region; 15 extern struct device_attribute dev_attr_delete_region; 16 extern struct device_attribute dev_attr_region; 17 extern const struct device_type cxl_pmem_region_type; 18 extern const struct device_type cxl_dax_region_type; 19 extern const struct device_type cxl_region_type; 20 void cxl_decoder_kill_region(struct cxl_endpoint_decoder *cxled); 21 #define CXL_REGION_ATTR(x) (&dev_attr_##x.attr) 22 #define CXL_REGION_TYPE(x) (&cxl_region_type) 23 #define SET_CXL_REGION_ATTR(x) (&dev_attr_##x.attr), 24 #define CXL_PMEM_REGION_TYPE(x) (&cxl_pmem_region_type) 25 #define CXL_DAX_REGION_TYPE(x) (&cxl_dax_region_type) 26 int cxl_region_init(void); 27 void cxl_region_exit(void); 28 int cxl_get_poison_by_endpoint(struct cxl_port *port); 29 #else 30 static inline int cxl_get_poison_by_endpoint(struct cxl_port *port) 31 { 32 return 0; 33 } 34 static inline void cxl_decoder_kill_region(struct cxl_endpoint_decoder *cxled) 35 { 36 } 37 static inline int cxl_region_init(void) 38 { 39 return 0; 40 } 41 static inline void cxl_region_exit(void) 42 { 43 } 44 #define CXL_REGION_ATTR(x) NULL 45 #define CXL_REGION_TYPE(x) NULL 46 #define SET_CXL_REGION_ATTR(x) 47 #define CXL_PMEM_REGION_TYPE(x) NULL 48 #define CXL_DAX_REGION_TYPE(x) NULL 49 #endif 50 51 struct cxl_send_command; 52 struct cxl_mem_query_commands; 53 int cxl_query_cmd(struct cxl_memdev *cxlmd, 54 struct cxl_mem_query_commands __user *q); 55 int cxl_send_cmd(struct cxl_memdev *cxlmd, struct cxl_send_command __user *s); 56 void __iomem *devm_cxl_iomap_block(struct device *dev, resource_size_t addr, 57 resource_size_t length); 58 59 struct dentry *cxl_debugfs_create_dir(const char *dir); 60 int cxl_dpa_set_mode(struct cxl_endpoint_decoder *cxled, 61 enum cxl_decoder_mode mode); 62 int cxl_dpa_alloc(struct cxl_endpoint_decoder *cxled, unsigned long long size); 63 int cxl_dpa_free(struct cxl_endpoint_decoder *cxled); 64 resource_size_t cxl_dpa_size(struct cxl_endpoint_decoder *cxled); 65 resource_size_t cxl_dpa_resource_start(struct cxl_endpoint_decoder *cxled); 66 67 enum cxl_rcrb { 68 CXL_RCRB_DOWNSTREAM, 69 CXL_RCRB_UPSTREAM, 70 }; 71 resource_size_t __rcrb_to_component(struct device *dev, resource_size_t rcrb, 72 enum cxl_rcrb which); 73 74 extern struct rw_semaphore cxl_dpa_rwsem; 75 76 int cxl_memdev_init(void); 77 void cxl_memdev_exit(void); 78 void cxl_mbox_init(void); 79 80 enum cxl_poison_trace_type { 81 CXL_POISON_TRACE_LIST, 82 CXL_POISON_TRACE_INJECT, 83 CXL_POISON_TRACE_CLEAR, 84 }; 85 86 #endif /* __CXL_CORE_H__ */ 87