197fb5e8dSThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-only */ 2ec8f5d8fSStanimir Varbanov /* 3ec8f5d8fSStanimir Varbanov * Copyright (c) 2010-2014, The Linux Foundation. All rights reserved. 4ec8f5d8fSStanimir Varbanov */ 5ec8f5d8fSStanimir Varbanov 6ec8f5d8fSStanimir Varbanov #ifndef _CORE_H_ 7ec8f5d8fSStanimir Varbanov #define _CORE_H_ 8ec8f5d8fSStanimir Varbanov 9ec8f5d8fSStanimir Varbanov #include "dma.h" 10ec8f5d8fSStanimir Varbanov 11ec8f5d8fSStanimir Varbanov /** 12ec8f5d8fSStanimir Varbanov * struct qce_device - crypto engine device structure 13ec8f5d8fSStanimir Varbanov * @queue: crypto request queue 14ec8f5d8fSStanimir Varbanov * @lock: the lock protects queue and req 15ec8f5d8fSStanimir Varbanov * @done_tasklet: done tasklet object 16ec8f5d8fSStanimir Varbanov * @req: current active request 17ec8f5d8fSStanimir Varbanov * @result: result of current transform 18ec8f5d8fSStanimir Varbanov * @base: virtual IO base 19ec8f5d8fSStanimir Varbanov * @dev: pointer to device structure 20ec8f5d8fSStanimir Varbanov * @core: core device clock 21ec8f5d8fSStanimir Varbanov * @iface: interface clock 22ec8f5d8fSStanimir Varbanov * @bus: bus clock 23ec8f5d8fSStanimir Varbanov * @dma: pointer to dma data 24ec8f5d8fSStanimir Varbanov * @burst_size: the crypto burst size 25ec8f5d8fSStanimir Varbanov * @pipe_pair_id: which pipe pair id the device using 26ec8f5d8fSStanimir Varbanov * @async_req_enqueue: invoked by every algorithm to enqueue a request 27ec8f5d8fSStanimir Varbanov * @async_req_done: invoked by every algorithm to finish its request 28ec8f5d8fSStanimir Varbanov */ 29ec8f5d8fSStanimir Varbanov struct qce_device { 30ec8f5d8fSStanimir Varbanov struct crypto_queue queue; 31ec8f5d8fSStanimir Varbanov spinlock_t lock; 32ec8f5d8fSStanimir Varbanov struct tasklet_struct done_tasklet; 33ec8f5d8fSStanimir Varbanov struct crypto_async_request *req; 34ec8f5d8fSStanimir Varbanov int result; 35ec8f5d8fSStanimir Varbanov void __iomem *base; 36ec8f5d8fSStanimir Varbanov struct device *dev; 37ec8f5d8fSStanimir Varbanov struct clk *core, *iface, *bus; 38*694ff00cSThara Gopinath struct icc_path *mem_path; 39ec8f5d8fSStanimir Varbanov struct qce_dma_data dma; 40ec8f5d8fSStanimir Varbanov int burst_size; 41ec8f5d8fSStanimir Varbanov unsigned int pipe_pair_id; 42ec8f5d8fSStanimir Varbanov int (*async_req_enqueue)(struct qce_device *qce, 43ec8f5d8fSStanimir Varbanov struct crypto_async_request *req); 44ec8f5d8fSStanimir Varbanov void (*async_req_done)(struct qce_device *qce, int ret); 45ec8f5d8fSStanimir Varbanov }; 46ec8f5d8fSStanimir Varbanov 47ec8f5d8fSStanimir Varbanov /** 48ec8f5d8fSStanimir Varbanov * struct qce_algo_ops - algorithm operations per crypto type 49ec8f5d8fSStanimir Varbanov * @type: should be CRYPTO_ALG_TYPE_XXX 50ec8f5d8fSStanimir Varbanov * @register_algs: invoked by core to register the algorithms 51ec8f5d8fSStanimir Varbanov * @unregister_algs: invoked by core to unregister the algorithms 52ec8f5d8fSStanimir Varbanov * @async_req_handle: invoked by core to handle enqueued request 53ec8f5d8fSStanimir Varbanov */ 54ec8f5d8fSStanimir Varbanov struct qce_algo_ops { 55ec8f5d8fSStanimir Varbanov u32 type; 56ec8f5d8fSStanimir Varbanov int (*register_algs)(struct qce_device *qce); 57ec8f5d8fSStanimir Varbanov void (*unregister_algs)(struct qce_device *qce); 58ec8f5d8fSStanimir Varbanov int (*async_req_handle)(struct crypto_async_request *async_req); 59ec8f5d8fSStanimir Varbanov }; 60ec8f5d8fSStanimir Varbanov 61ec8f5d8fSStanimir Varbanov #endif /* _CORE_H_ */ 62