1*94476b2bSKai Ye /* SPDX-License-Identifier: GPL-2.0 */ 2*94476b2bSKai Ye /* Copyright (c) 2022 HiSilicon Limited. */ 3*94476b2bSKai Ye #ifndef QM_COMMON_H 4*94476b2bSKai Ye #define QM_COMMON_H 5*94476b2bSKai Ye 6*94476b2bSKai Ye #define QM_DBG_READ_LEN 256 7*94476b2bSKai Ye #define QM_RESETTING 2 8*94476b2bSKai Ye 9*94476b2bSKai Ye struct qm_cqe { 10*94476b2bSKai Ye __le32 rsvd0; 11*94476b2bSKai Ye __le16 cmd_id; 12*94476b2bSKai Ye __le16 rsvd1; 13*94476b2bSKai Ye __le16 sq_head; 14*94476b2bSKai Ye __le16 sq_num; 15*94476b2bSKai Ye __le16 rsvd2; 16*94476b2bSKai Ye __le16 w7; 17*94476b2bSKai Ye }; 18*94476b2bSKai Ye 19*94476b2bSKai Ye struct qm_eqe { 20*94476b2bSKai Ye __le32 dw0; 21*94476b2bSKai Ye }; 22*94476b2bSKai Ye 23*94476b2bSKai Ye struct qm_aeqe { 24*94476b2bSKai Ye __le32 dw0; 25*94476b2bSKai Ye }; 26*94476b2bSKai Ye 27*94476b2bSKai Ye struct qm_sqc { 28*94476b2bSKai Ye __le16 head; 29*94476b2bSKai Ye __le16 tail; 30*94476b2bSKai Ye __le32 base_l; 31*94476b2bSKai Ye __le32 base_h; 32*94476b2bSKai Ye __le32 dw3; 33*94476b2bSKai Ye __le16 w8; 34*94476b2bSKai Ye __le16 rsvd0; 35*94476b2bSKai Ye __le16 pasid; 36*94476b2bSKai Ye __le16 w11; 37*94476b2bSKai Ye __le16 cq_num; 38*94476b2bSKai Ye __le16 w13; 39*94476b2bSKai Ye __le32 rsvd1; 40*94476b2bSKai Ye }; 41*94476b2bSKai Ye 42*94476b2bSKai Ye struct qm_cqc { 43*94476b2bSKai Ye __le16 head; 44*94476b2bSKai Ye __le16 tail; 45*94476b2bSKai Ye __le32 base_l; 46*94476b2bSKai Ye __le32 base_h; 47*94476b2bSKai Ye __le32 dw3; 48*94476b2bSKai Ye __le16 w8; 49*94476b2bSKai Ye __le16 rsvd0; 50*94476b2bSKai Ye __le16 pasid; 51*94476b2bSKai Ye __le16 w11; 52*94476b2bSKai Ye __le32 dw6; 53*94476b2bSKai Ye __le32 rsvd1; 54*94476b2bSKai Ye }; 55*94476b2bSKai Ye 56*94476b2bSKai Ye struct qm_eqc { 57*94476b2bSKai Ye __le16 head; 58*94476b2bSKai Ye __le16 tail; 59*94476b2bSKai Ye __le32 base_l; 60*94476b2bSKai Ye __le32 base_h; 61*94476b2bSKai Ye __le32 dw3; 62*94476b2bSKai Ye __le32 rsvd[2]; 63*94476b2bSKai Ye __le32 dw6; 64*94476b2bSKai Ye }; 65*94476b2bSKai Ye 66*94476b2bSKai Ye struct qm_aeqc { 67*94476b2bSKai Ye __le16 head; 68*94476b2bSKai Ye __le16 tail; 69*94476b2bSKai Ye __le32 base_l; 70*94476b2bSKai Ye __le32 base_h; 71*94476b2bSKai Ye __le32 dw3; 72*94476b2bSKai Ye __le32 rsvd[2]; 73*94476b2bSKai Ye __le32 dw6; 74*94476b2bSKai Ye }; 75*94476b2bSKai Ye 76*94476b2bSKai Ye static const char * const qm_s[] = { 77*94476b2bSKai Ye "init", "start", "close", "stop", 78*94476b2bSKai Ye }; 79*94476b2bSKai Ye 80*94476b2bSKai Ye void *hisi_qm_ctx_alloc(struct hisi_qm *qm, size_t ctx_size, 81*94476b2bSKai Ye dma_addr_t *dma_addr); 82*94476b2bSKai Ye void hisi_qm_ctx_free(struct hisi_qm *qm, size_t ctx_size, 83*94476b2bSKai Ye const void *ctx_addr, dma_addr_t *dma_addr); 84*94476b2bSKai Ye void hisi_qm_show_last_dfx_regs(struct hisi_qm *qm); 85*94476b2bSKai Ye void hisi_qm_set_algqos_init(struct hisi_qm *qm); 86*94476b2bSKai Ye 87*94476b2bSKai Ye #endif 88