xref: /openbmc/linux/drivers/crypto/ccp/psp-dev.h (revision c900529f3d9161bfde5cca0754f83b4d3c3e0220)
1b93566f1SRijo Thomas /* SPDX-License-Identifier: GPL-2.0-only */
2b93566f1SRijo Thomas /*
3b93566f1SRijo Thomas  * AMD Platform Security Processor (PSP) interface driver
4b93566f1SRijo Thomas  *
5b93566f1SRijo Thomas  * Copyright (C) 2017-2019 Advanced Micro Devices, Inc.
6b93566f1SRijo Thomas  *
7b93566f1SRijo Thomas  * Author: Brijesh Singh <brijesh.singh@amd.com>
8b93566f1SRijo Thomas  */
9b93566f1SRijo Thomas 
10b93566f1SRijo Thomas #ifndef __PSP_DEV_H__
11b93566f1SRijo Thomas #define __PSP_DEV_H__
12b93566f1SRijo Thomas 
13b93566f1SRijo Thomas #include <linux/device.h>
14b93566f1SRijo Thomas #include <linux/list.h>
15b93566f1SRijo Thomas #include <linux/bits.h>
16b93566f1SRijo Thomas #include <linux/interrupt.h>
17b93566f1SRijo Thomas 
18b93566f1SRijo Thomas #include "sp-dev.h"
19b93566f1SRijo Thomas 
20b93566f1SRijo Thomas #define MAX_PSP_NAME_LEN		16
21b93566f1SRijo Thomas 
22b93566f1SRijo Thomas extern struct psp_device *psp_master;
23b93566f1SRijo Thomas 
24b93566f1SRijo Thomas typedef void (*psp_irq_handler_t)(int, void *, unsigned int);
25b93566f1SRijo Thomas 
26b93566f1SRijo Thomas struct psp_device {
27b93566f1SRijo Thomas 	struct list_head entry;
28b93566f1SRijo Thomas 
29b93566f1SRijo Thomas 	struct psp_vdata *vdata;
30b93566f1SRijo Thomas 	char name[MAX_PSP_NAME_LEN];
31b93566f1SRijo Thomas 
32b93566f1SRijo Thomas 	struct device *dev;
33b93566f1SRijo Thomas 	struct sp_device *sp;
34b93566f1SRijo Thomas 
35b93566f1SRijo Thomas 	void __iomem *io_regs;
36b93566f1SRijo Thomas 
37b93566f1SRijo Thomas 	psp_irq_handler_t sev_irq_handler;
38b93566f1SRijo Thomas 	void *sev_irq_data;
39b93566f1SRijo Thomas 
40b93566f1SRijo Thomas 	void *sev_data;
4133960accSRijo Thomas 	void *tee_data;
427ccc4f4eSMario Limonciello 	void *platform_access_data;
43*c04cf9e1SMario Limonciello 	void *dbc_data;
44cac32cd4SMario Limonciello 
45cac32cd4SMario Limonciello 	unsigned int capability;
46b93566f1SRijo Thomas };
47b93566f1SRijo Thomas 
48b93566f1SRijo Thomas void psp_set_sev_irq_handler(struct psp_device *psp, psp_irq_handler_t handler,
49b93566f1SRijo Thomas 			     void *data);
50b93566f1SRijo Thomas void psp_clear_sev_irq_handler(struct psp_device *psp);
51b93566f1SRijo Thomas 
52b93566f1SRijo Thomas struct psp_device *psp_get_master_device(void);
53b93566f1SRijo Thomas 
54cac32cd4SMario Limonciello #define PSP_CAPABILITY_SEV			BIT(0)
55cac32cd4SMario Limonciello #define PSP_CAPABILITY_TEE			BIT(1)
5650c4deccSMario Limonciello #define PSP_CAPABILITY_PSP_SECURITY_REPORTING	BIT(7)
5750c4deccSMario Limonciello 
5850c4deccSMario Limonciello #define PSP_CAPABILITY_PSP_SECURITY_OFFSET	8
5950c4deccSMario Limonciello /*
6050c4deccSMario Limonciello  * The PSP doesn't directly store these bits in the capability register
6150c4deccSMario Limonciello  * but instead copies them from the results of query command.
6250c4deccSMario Limonciello  *
6350c4deccSMario Limonciello  * The offsets from the query command are below, and shifted when used.
6450c4deccSMario Limonciello  */
6550c4deccSMario Limonciello #define PSP_SECURITY_FUSED_PART			BIT(0)
6650c4deccSMario Limonciello #define PSP_SECURITY_DEBUG_LOCK_ON		BIT(2)
6750c4deccSMario Limonciello #define PSP_SECURITY_TSME_STATUS		BIT(5)
6850c4deccSMario Limonciello #define PSP_SECURITY_ANTI_ROLLBACK_STATUS	BIT(7)
6950c4deccSMario Limonciello #define PSP_SECURITY_RPMC_PRODUCTION_ENABLED	BIT(8)
7050c4deccSMario Limonciello #define PSP_SECURITY_RPMC_SPIROM_AVAILABLE	BIT(9)
7150c4deccSMario Limonciello #define PSP_SECURITY_HSP_TPM_AVAILABLE		BIT(10)
7250c4deccSMario Limonciello #define PSP_SECURITY_ROM_ARMOR_ENFORCED		BIT(11)
73cac32cd4SMario Limonciello 
74b93566f1SRijo Thomas #endif /* __PSP_DEV_H */
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