17d127095SSricharan R // SPDX-License-Identifier: GPL-2.0 27d127095SSricharan R /* 37d127095SSricharan R * Copyright (c) 2018, The Linux Foundation. All rights reserved. 47d127095SSricharan R */ 57d127095SSricharan R 67d127095SSricharan R /* 77d127095SSricharan R * In Certain QCOM SoCs like apq8096 and msm8996 that have KRYO processors, 87d127095SSricharan R * the CPU frequency subset and voltage value of each OPP varies 97d127095SSricharan R * based on the silicon variant in use. Qualcomm Process Voltage Scaling Tables 107d127095SSricharan R * defines the voltage and frequency value based on the msm-id in SMEM 117d127095SSricharan R * and speedbin blown in the efuse combination. 127d127095SSricharan R * The qcom-cpufreq-nvmem driver reads the msm-id and efuse value from the SoC 137d127095SSricharan R * to provide the OPP framework with required information. 147d127095SSricharan R * This is used to determine the voltage and frequency value for each OPP of 157d127095SSricharan R * operating-points-v2 table when it is parsed by the OPP framework. 167d127095SSricharan R */ 177d127095SSricharan R 187d127095SSricharan R #include <linux/cpu.h> 197d127095SSricharan R #include <linux/err.h> 207d127095SSricharan R #include <linux/init.h> 217d127095SSricharan R #include <linux/kernel.h> 227d127095SSricharan R #include <linux/module.h> 237d127095SSricharan R #include <linux/nvmem-consumer.h> 247d127095SSricharan R #include <linux/of.h> 257d127095SSricharan R #include <linux/of_device.h> 267d127095SSricharan R #include <linux/platform_device.h> 27*1cb8339cSNiklas Cassel #include <linux/pm_domain.h> 287d127095SSricharan R #include <linux/pm_opp.h> 297d127095SSricharan R #include <linux/slab.h> 307d127095SSricharan R #include <linux/soc/qcom/smem.h> 317d127095SSricharan R 327d127095SSricharan R #define MSM_ID_SMEM 137 337d127095SSricharan R 347d127095SSricharan R enum _msm_id { 357d127095SSricharan R MSM8996V3 = 0xF6ul, 367d127095SSricharan R APQ8096V3 = 0x123ul, 377d127095SSricharan R MSM8996SG = 0x131ul, 387d127095SSricharan R APQ8096SG = 0x138ul, 397d127095SSricharan R }; 407d127095SSricharan R 417d127095SSricharan R enum _msm8996_version { 427d127095SSricharan R MSM8996_V3, 437d127095SSricharan R MSM8996_SG, 447d127095SSricharan R NUM_OF_MSM8996_VERSIONS, 457d127095SSricharan R }; 467d127095SSricharan R 4757f2f8b4SNiklas Cassel struct qcom_cpufreq_drv; 4857f2f8b4SNiklas Cassel 4957f2f8b4SNiklas Cassel struct qcom_cpufreq_match_data { 5057f2f8b4SNiklas Cassel int (*get_version)(struct device *cpu_dev, 5157f2f8b4SNiklas Cassel struct nvmem_cell *speedbin_nvmem, 5257f2f8b4SNiklas Cassel struct qcom_cpufreq_drv *drv); 53*1cb8339cSNiklas Cassel const char **genpd_names; 5457f2f8b4SNiklas Cassel }; 5557f2f8b4SNiklas Cassel 5657f2f8b4SNiklas Cassel struct qcom_cpufreq_drv { 5757f2f8b4SNiklas Cassel struct opp_table **opp_tables; 58*1cb8339cSNiklas Cassel struct opp_table **genpd_opp_tables; 5957f2f8b4SNiklas Cassel u32 versions; 6057f2f8b4SNiklas Cassel const struct qcom_cpufreq_match_data *data; 6157f2f8b4SNiklas Cassel }; 6257f2f8b4SNiklas Cassel 637d127095SSricharan R static struct platform_device *cpufreq_dt_pdev, *cpufreq_pdev; 647d127095SSricharan R 657d127095SSricharan R static enum _msm8996_version qcom_cpufreq_get_msm_id(void) 667d127095SSricharan R { 677d127095SSricharan R size_t len; 687d127095SSricharan R u32 *msm_id; 697d127095SSricharan R enum _msm8996_version version; 707d127095SSricharan R 717d127095SSricharan R msm_id = qcom_smem_get(QCOM_SMEM_HOST_ANY, MSM_ID_SMEM, &len); 727d127095SSricharan R if (IS_ERR(msm_id)) 737d127095SSricharan R return NUM_OF_MSM8996_VERSIONS; 747d127095SSricharan R 757d127095SSricharan R /* The first 4 bytes are format, next to them is the actual msm-id */ 767d127095SSricharan R msm_id++; 777d127095SSricharan R 787d127095SSricharan R switch ((enum _msm_id)*msm_id) { 797d127095SSricharan R case MSM8996V3: 807d127095SSricharan R case APQ8096V3: 817d127095SSricharan R version = MSM8996_V3; 827d127095SSricharan R break; 837d127095SSricharan R case MSM8996SG: 847d127095SSricharan R case APQ8096SG: 857d127095SSricharan R version = MSM8996_SG; 867d127095SSricharan R break; 877d127095SSricharan R default: 887d127095SSricharan R version = NUM_OF_MSM8996_VERSIONS; 897d127095SSricharan R } 907d127095SSricharan R 917d127095SSricharan R return version; 927d127095SSricharan R } 937d127095SSricharan R 947d127095SSricharan R static int qcom_cpufreq_kryo_name_version(struct device *cpu_dev, 957d127095SSricharan R struct nvmem_cell *speedbin_nvmem, 9657f2f8b4SNiklas Cassel struct qcom_cpufreq_drv *drv) 977d127095SSricharan R { 987d127095SSricharan R size_t len; 997d127095SSricharan R u8 *speedbin; 1007d127095SSricharan R enum _msm8996_version msm8996_version; 1017d127095SSricharan R 1027d127095SSricharan R msm8996_version = qcom_cpufreq_get_msm_id(); 1037d127095SSricharan R if (NUM_OF_MSM8996_VERSIONS == msm8996_version) { 1047d127095SSricharan R dev_err(cpu_dev, "Not Snapdragon 820/821!"); 1057d127095SSricharan R return -ENODEV; 1067d127095SSricharan R } 1077d127095SSricharan R 1087d127095SSricharan R speedbin = nvmem_cell_read(speedbin_nvmem, &len); 1097d127095SSricharan R if (IS_ERR(speedbin)) 1107d127095SSricharan R return PTR_ERR(speedbin); 1117d127095SSricharan R 1127d127095SSricharan R switch (msm8996_version) { 1137d127095SSricharan R case MSM8996_V3: 11457f2f8b4SNiklas Cassel drv->versions = 1 << (unsigned int)(*speedbin); 1157d127095SSricharan R break; 1167d127095SSricharan R case MSM8996_SG: 11757f2f8b4SNiklas Cassel drv->versions = 1 << ((unsigned int)(*speedbin) + 4); 1187d127095SSricharan R break; 1197d127095SSricharan R default: 1207d127095SSricharan R BUG(); 1217d127095SSricharan R break; 1227d127095SSricharan R } 1237d127095SSricharan R 1247d127095SSricharan R kfree(speedbin); 1257d127095SSricharan R return 0; 1267d127095SSricharan R } 1277d127095SSricharan R 12857f2f8b4SNiklas Cassel static const struct qcom_cpufreq_match_data match_data_kryo = { 12957f2f8b4SNiklas Cassel .get_version = qcom_cpufreq_kryo_name_version, 13057f2f8b4SNiklas Cassel }; 13157f2f8b4SNiklas Cassel 132*1cb8339cSNiklas Cassel static const char *qcs404_genpd_names[] = { "cpr", NULL }; 133*1cb8339cSNiklas Cassel 134*1cb8339cSNiklas Cassel static const struct qcom_cpufreq_match_data match_data_qcs404 = { 135*1cb8339cSNiklas Cassel .genpd_names = qcs404_genpd_names, 136*1cb8339cSNiklas Cassel }; 137*1cb8339cSNiklas Cassel 1387d127095SSricharan R static int qcom_cpufreq_probe(struct platform_device *pdev) 1397d127095SSricharan R { 14057f2f8b4SNiklas Cassel struct qcom_cpufreq_drv *drv; 1417d127095SSricharan R struct nvmem_cell *speedbin_nvmem; 1427d127095SSricharan R struct device_node *np; 1437d127095SSricharan R struct device *cpu_dev; 1447d127095SSricharan R unsigned cpu; 1457d127095SSricharan R const struct of_device_id *match; 1467d127095SSricharan R int ret; 1477d127095SSricharan R 1487d127095SSricharan R cpu_dev = get_cpu_device(0); 1497d127095SSricharan R if (!cpu_dev) 1507d127095SSricharan R return -ENODEV; 1517d127095SSricharan R 1527d127095SSricharan R np = dev_pm_opp_of_get_opp_desc_node(cpu_dev); 1537d127095SSricharan R if (!np) 1547d127095SSricharan R return -ENOENT; 1557d127095SSricharan R 1567d127095SSricharan R ret = of_device_is_compatible(np, "operating-points-v2-kryo-cpu"); 1577d127095SSricharan R if (!ret) { 1587d127095SSricharan R of_node_put(np); 1597d127095SSricharan R return -ENOENT; 1607d127095SSricharan R } 1617d127095SSricharan R 16257f2f8b4SNiklas Cassel drv = kzalloc(sizeof(*drv), GFP_KERNEL); 16357f2f8b4SNiklas Cassel if (!drv) 16457f2f8b4SNiklas Cassel return -ENOMEM; 16557f2f8b4SNiklas Cassel 16657f2f8b4SNiklas Cassel match = pdev->dev.platform_data; 16757f2f8b4SNiklas Cassel drv->data = match->data; 16857f2f8b4SNiklas Cassel if (!drv->data) { 16957f2f8b4SNiklas Cassel ret = -ENODEV; 17057f2f8b4SNiklas Cassel goto free_drv; 1717d127095SSricharan R } 1727d127095SSricharan R 17357f2f8b4SNiklas Cassel if (drv->data->get_version) { 17457f2f8b4SNiklas Cassel speedbin_nvmem = of_nvmem_cell_get(np, NULL); 17557f2f8b4SNiklas Cassel if (IS_ERR(speedbin_nvmem)) { 17657f2f8b4SNiklas Cassel if (PTR_ERR(speedbin_nvmem) != -EPROBE_DEFER) 17757f2f8b4SNiklas Cassel dev_err(cpu_dev, 17857f2f8b4SNiklas Cassel "Could not get nvmem cell: %ld\n", 17957f2f8b4SNiklas Cassel PTR_ERR(speedbin_nvmem)); 18057f2f8b4SNiklas Cassel ret = PTR_ERR(speedbin_nvmem); 18157f2f8b4SNiklas Cassel goto free_drv; 18257f2f8b4SNiklas Cassel } 1837d127095SSricharan R 18457f2f8b4SNiklas Cassel ret = drv->data->get_version(cpu_dev, speedbin_nvmem, drv); 18557f2f8b4SNiklas Cassel if (ret) { 18657f2f8b4SNiklas Cassel nvmem_cell_put(speedbin_nvmem); 18757f2f8b4SNiklas Cassel goto free_drv; 18857f2f8b4SNiklas Cassel } 18957f2f8b4SNiklas Cassel nvmem_cell_put(speedbin_nvmem); 19057f2f8b4SNiklas Cassel } 19157f2f8b4SNiklas Cassel of_node_put(np); 19257f2f8b4SNiklas Cassel 19357f2f8b4SNiklas Cassel drv->opp_tables = kcalloc(num_possible_cpus(), sizeof(*drv->opp_tables), 19457f2f8b4SNiklas Cassel GFP_KERNEL); 19557f2f8b4SNiklas Cassel if (!drv->opp_tables) { 19657f2f8b4SNiklas Cassel ret = -ENOMEM; 19757f2f8b4SNiklas Cassel goto free_drv; 19857f2f8b4SNiklas Cassel } 1997d127095SSricharan R 200*1cb8339cSNiklas Cassel drv->genpd_opp_tables = kcalloc(num_possible_cpus(), 201*1cb8339cSNiklas Cassel sizeof(*drv->genpd_opp_tables), 202*1cb8339cSNiklas Cassel GFP_KERNEL); 203*1cb8339cSNiklas Cassel if (!drv->genpd_opp_tables) { 204*1cb8339cSNiklas Cassel ret = -ENOMEM; 205*1cb8339cSNiklas Cassel goto free_opp; 206*1cb8339cSNiklas Cassel } 207*1cb8339cSNiklas Cassel 2087d127095SSricharan R for_each_possible_cpu(cpu) { 2097d127095SSricharan R cpu_dev = get_cpu_device(cpu); 2107d127095SSricharan R if (NULL == cpu_dev) { 2117d127095SSricharan R ret = -ENODEV; 212*1cb8339cSNiklas Cassel goto free_genpd_opp; 2137d127095SSricharan R } 2147d127095SSricharan R 21557f2f8b4SNiklas Cassel if (drv->data->get_version) { 21657f2f8b4SNiklas Cassel drv->opp_tables[cpu] = 21757f2f8b4SNiklas Cassel dev_pm_opp_set_supported_hw(cpu_dev, 21857f2f8b4SNiklas Cassel &drv->versions, 1); 21957f2f8b4SNiklas Cassel if (IS_ERR(drv->opp_tables[cpu])) { 22057f2f8b4SNiklas Cassel ret = PTR_ERR(drv->opp_tables[cpu]); 22157f2f8b4SNiklas Cassel dev_err(cpu_dev, 22257f2f8b4SNiklas Cassel "Failed to set supported hardware\n"); 223*1cb8339cSNiklas Cassel goto free_genpd_opp; 224*1cb8339cSNiklas Cassel } 225*1cb8339cSNiklas Cassel } 226*1cb8339cSNiklas Cassel 227*1cb8339cSNiklas Cassel if (drv->data->genpd_names) { 228*1cb8339cSNiklas Cassel drv->genpd_opp_tables[cpu] = 229*1cb8339cSNiklas Cassel dev_pm_opp_attach_genpd(cpu_dev, 230*1cb8339cSNiklas Cassel drv->data->genpd_names, 231*1cb8339cSNiklas Cassel NULL); 232*1cb8339cSNiklas Cassel if (IS_ERR(drv->genpd_opp_tables[cpu])) { 233*1cb8339cSNiklas Cassel ret = PTR_ERR(drv->genpd_opp_tables[cpu]); 234*1cb8339cSNiklas Cassel if (ret != -EPROBE_DEFER) 235*1cb8339cSNiklas Cassel dev_err(cpu_dev, 236*1cb8339cSNiklas Cassel "Could not attach to pm_domain: %d\n", 237*1cb8339cSNiklas Cassel ret); 238*1cb8339cSNiklas Cassel goto free_genpd_opp; 2397d127095SSricharan R } 2407d127095SSricharan R } 24157f2f8b4SNiklas Cassel } 2427d127095SSricharan R 2437d127095SSricharan R cpufreq_dt_pdev = platform_device_register_simple("cpufreq-dt", -1, 2447d127095SSricharan R NULL, 0); 2457d127095SSricharan R if (!IS_ERR(cpufreq_dt_pdev)) { 24657f2f8b4SNiklas Cassel platform_set_drvdata(pdev, drv); 2477d127095SSricharan R return 0; 2487d127095SSricharan R } 2497d127095SSricharan R 2507d127095SSricharan R ret = PTR_ERR(cpufreq_dt_pdev); 2517d127095SSricharan R dev_err(cpu_dev, "Failed to register platform device\n"); 2527d127095SSricharan R 253*1cb8339cSNiklas Cassel free_genpd_opp: 254*1cb8339cSNiklas Cassel for_each_possible_cpu(cpu) { 255*1cb8339cSNiklas Cassel if (IS_ERR_OR_NULL(drv->genpd_opp_tables[cpu])) 256*1cb8339cSNiklas Cassel break; 257*1cb8339cSNiklas Cassel dev_pm_opp_detach_genpd(drv->genpd_opp_tables[cpu]); 258*1cb8339cSNiklas Cassel } 259*1cb8339cSNiklas Cassel kfree(drv->genpd_opp_tables); 2607d127095SSricharan R free_opp: 2617d127095SSricharan R for_each_possible_cpu(cpu) { 26257f2f8b4SNiklas Cassel if (IS_ERR_OR_NULL(drv->opp_tables[cpu])) 2637d127095SSricharan R break; 26457f2f8b4SNiklas Cassel dev_pm_opp_put_supported_hw(drv->opp_tables[cpu]); 2657d127095SSricharan R } 26657f2f8b4SNiklas Cassel kfree(drv->opp_tables); 26757f2f8b4SNiklas Cassel free_drv: 26857f2f8b4SNiklas Cassel kfree(drv); 2697d127095SSricharan R 2707d127095SSricharan R return ret; 2717d127095SSricharan R } 2727d127095SSricharan R 2737d127095SSricharan R static int qcom_cpufreq_remove(struct platform_device *pdev) 2747d127095SSricharan R { 27557f2f8b4SNiklas Cassel struct qcom_cpufreq_drv *drv = platform_get_drvdata(pdev); 2767d127095SSricharan R unsigned int cpu; 2777d127095SSricharan R 2787d127095SSricharan R platform_device_unregister(cpufreq_dt_pdev); 2797d127095SSricharan R 280*1cb8339cSNiklas Cassel for_each_possible_cpu(cpu) { 28157f2f8b4SNiklas Cassel if (drv->opp_tables[cpu]) 28257f2f8b4SNiklas Cassel dev_pm_opp_put_supported_hw(drv->opp_tables[cpu]); 283*1cb8339cSNiklas Cassel if (drv->genpd_opp_tables[cpu]) 284*1cb8339cSNiklas Cassel dev_pm_opp_detach_genpd(drv->genpd_opp_tables[cpu]); 285*1cb8339cSNiklas Cassel } 2867d127095SSricharan R 28757f2f8b4SNiklas Cassel kfree(drv->opp_tables); 288*1cb8339cSNiklas Cassel kfree(drv->genpd_opp_tables); 28957f2f8b4SNiklas Cassel kfree(drv); 2907d127095SSricharan R 2917d127095SSricharan R return 0; 2927d127095SSricharan R } 2937d127095SSricharan R 2947d127095SSricharan R static struct platform_driver qcom_cpufreq_driver = { 2957d127095SSricharan R .probe = qcom_cpufreq_probe, 2967d127095SSricharan R .remove = qcom_cpufreq_remove, 2977d127095SSricharan R .driver = { 2987d127095SSricharan R .name = "qcom-cpufreq-nvmem", 2997d127095SSricharan R }, 3007d127095SSricharan R }; 3017d127095SSricharan R 3027d127095SSricharan R static const struct of_device_id qcom_cpufreq_match_list[] __initconst = { 30357f2f8b4SNiklas Cassel { .compatible = "qcom,apq8096", .data = &match_data_kryo }, 30457f2f8b4SNiklas Cassel { .compatible = "qcom,msm8996", .data = &match_data_kryo }, 305*1cb8339cSNiklas Cassel { .compatible = "qcom,qcs404", .data = &match_data_qcs404 }, 3067d127095SSricharan R {}, 3077d127095SSricharan R }; 3087d127095SSricharan R 3097d127095SSricharan R /* 3107d127095SSricharan R * Since the driver depends on smem and nvmem drivers, which may 3117d127095SSricharan R * return EPROBE_DEFER, all the real activity is done in the probe, 3127d127095SSricharan R * which may be defered as well. The init here is only registering 3137d127095SSricharan R * the driver and the platform device. 3147d127095SSricharan R */ 3157d127095SSricharan R static int __init qcom_cpufreq_init(void) 3167d127095SSricharan R { 3177d127095SSricharan R struct device_node *np = of_find_node_by_path("/"); 3187d127095SSricharan R const struct of_device_id *match; 3197d127095SSricharan R int ret; 3207d127095SSricharan R 3217d127095SSricharan R if (!np) 3227d127095SSricharan R return -ENODEV; 3237d127095SSricharan R 3247d127095SSricharan R match = of_match_node(qcom_cpufreq_match_list, np); 3257d127095SSricharan R of_node_put(np); 3267d127095SSricharan R if (!match) 3277d127095SSricharan R return -ENODEV; 3287d127095SSricharan R 3297d127095SSricharan R ret = platform_driver_register(&qcom_cpufreq_driver); 3307d127095SSricharan R if (unlikely(ret < 0)) 3317d127095SSricharan R return ret; 3327d127095SSricharan R 3337d127095SSricharan R cpufreq_pdev = platform_device_register_data(NULL, "qcom-cpufreq-nvmem", 3347d127095SSricharan R -1, match, sizeof(*match)); 3357d127095SSricharan R ret = PTR_ERR_OR_ZERO(cpufreq_pdev); 3367d127095SSricharan R if (0 == ret) 3377d127095SSricharan R return 0; 3387d127095SSricharan R 3397d127095SSricharan R platform_driver_unregister(&qcom_cpufreq_driver); 3407d127095SSricharan R return ret; 3417d127095SSricharan R } 3427d127095SSricharan R module_init(qcom_cpufreq_init); 3437d127095SSricharan R 3447d127095SSricharan R static void __exit qcom_cpufreq_exit(void) 3457d127095SSricharan R { 3467d127095SSricharan R platform_device_unregister(cpufreq_pdev); 3477d127095SSricharan R platform_driver_unregister(&qcom_cpufreq_driver); 3487d127095SSricharan R } 3497d127095SSricharan R module_exit(qcom_cpufreq_exit); 3507d127095SSricharan R 3517d127095SSricharan R MODULE_DESCRIPTION("Qualcomm Technologies, Inc. CPUfreq driver"); 3527d127095SSricharan R MODULE_LICENSE("GPL v2"); 353