1*1a59d1b8SThomas Gleixner // SPDX-License-Identifier: GPL-2.0-or-later 2cffc96ebSViresh Kumar /* 3cffc96ebSViresh Kumar * Copyright (C) 2002,2003 Intrinsyc Software 4cffc96ebSViresh Kumar * 5cffc96ebSViresh Kumar * History: 6cffc96ebSViresh Kumar * 31-Jul-2002 : Initial version [FB] 7cffc96ebSViresh Kumar * 29-Jan-2003 : added PXA255 support [FB] 8cffc96ebSViresh Kumar * 20-Apr-2003 : ported to v2.5 (Dustin McIntire, Sensoria Corp.) 9cffc96ebSViresh Kumar * 10cffc96ebSViresh Kumar * Note: 11cffc96ebSViresh Kumar * This driver may change the memory bus clock rate, but will not do any 12cffc96ebSViresh Kumar * platform specific access timing changes... for example if you have flash 13cffc96ebSViresh Kumar * memory connected to CS0, you will need to register a platform specific 14cffc96ebSViresh Kumar * notifier which will adjust the memory access strobes to maintain a 15cffc96ebSViresh Kumar * minimum strobe width. 16cffc96ebSViresh Kumar */ 17cffc96ebSViresh Kumar 181c5864e2SJoe Perches #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 191c5864e2SJoe Perches 20cffc96ebSViresh Kumar #include <linux/kernel.h> 21cffc96ebSViresh Kumar #include <linux/module.h> 22cffc96ebSViresh Kumar #include <linux/sched.h> 23cffc96ebSViresh Kumar #include <linux/init.h> 24cffc96ebSViresh Kumar #include <linux/cpufreq.h> 25cffc96ebSViresh Kumar #include <linux/err.h> 26cffc96ebSViresh Kumar #include <linux/regulator/consumer.h> 27cffc96ebSViresh Kumar #include <linux/io.h> 28cffc96ebSViresh Kumar 29cffc96ebSViresh Kumar #include <mach/pxa2xx-regs.h> 30cffc96ebSViresh Kumar #include <mach/smemc.h> 31cffc96ebSViresh Kumar 32cffc96ebSViresh Kumar #ifdef DEBUG 33cffc96ebSViresh Kumar static unsigned int freq_debug; 34cffc96ebSViresh Kumar module_param(freq_debug, uint, 0); 35cffc96ebSViresh Kumar MODULE_PARM_DESC(freq_debug, "Set the debug messages to on=1/off=0"); 36cffc96ebSViresh Kumar #else 37cffc96ebSViresh Kumar #define freq_debug 0 38cffc96ebSViresh Kumar #endif 39cffc96ebSViresh Kumar 40cffc96ebSViresh Kumar static struct regulator *vcc_core; 41cffc96ebSViresh Kumar 42cffc96ebSViresh Kumar static unsigned int pxa27x_maxfreq; 43cffc96ebSViresh Kumar module_param(pxa27x_maxfreq, uint, 0); 44cffc96ebSViresh Kumar MODULE_PARM_DESC(pxa27x_maxfreq, "Set the pxa27x maxfreq in MHz" 45cffc96ebSViresh Kumar "(typically 624=>pxa270, 416=>pxa271, 520=>pxa272)"); 46cffc96ebSViresh Kumar 47d9278077SRobert Jarzmik struct pxa_cpufreq_data { 48d9278077SRobert Jarzmik struct clk *clk_core; 49d9278077SRobert Jarzmik }; 50d9278077SRobert Jarzmik static struct pxa_cpufreq_data pxa_cpufreq_data; 51d9278077SRobert Jarzmik 5252352558SFabian Frederick struct pxa_freqs { 53cffc96ebSViresh Kumar unsigned int khz; 54cffc96ebSViresh Kumar int vmin; 55cffc96ebSViresh Kumar int vmax; 5652352558SFabian Frederick }; 57cffc96ebSViresh Kumar 58cffc96ebSViresh Kumar /* 59cffc96ebSViresh Kumar * PXA255 definitions 60cffc96ebSViresh Kumar */ 6103c22990SFabian Frederick static const struct pxa_freqs pxa255_run_freqs[] = 62cffc96ebSViresh Kumar { 63d9278077SRobert Jarzmik /* CPU MEMBUS run turbo PXbus SDRAM */ 64d9278077SRobert Jarzmik { 99500, -1, -1}, /* 99, 99, 50, 50 */ 65d9278077SRobert Jarzmik {132700, -1, -1}, /* 133, 133, 66, 66 */ 66d9278077SRobert Jarzmik {199100, -1, -1}, /* 199, 199, 99, 99 */ 67d9278077SRobert Jarzmik {265400, -1, -1}, /* 265, 265, 133, 66 */ 68d9278077SRobert Jarzmik {331800, -1, -1}, /* 331, 331, 166, 83 */ 69d9278077SRobert Jarzmik {398100, -1, -1}, /* 398, 398, 196, 99 */ 70cffc96ebSViresh Kumar }; 71cffc96ebSViresh Kumar 72cffc96ebSViresh Kumar /* Use the turbo mode frequencies for the CPUFREQ_POLICY_POWERSAVE policy */ 7303c22990SFabian Frederick static const struct pxa_freqs pxa255_turbo_freqs[] = 74cffc96ebSViresh Kumar { 75d9278077SRobert Jarzmik /* CPU run turbo PXbus SDRAM */ 76d9278077SRobert Jarzmik { 99500, -1, -1}, /* 99, 99, 50, 50 */ 77d9278077SRobert Jarzmik {199100, -1, -1}, /* 99, 199, 50, 99 */ 78d9278077SRobert Jarzmik {298500, -1, -1}, /* 99, 287, 50, 99 */ 79d9278077SRobert Jarzmik {298600, -1, -1}, /* 199, 287, 99, 99 */ 80d9278077SRobert Jarzmik {398100, -1, -1}, /* 199, 398, 99, 99 */ 81cffc96ebSViresh Kumar }; 82cffc96ebSViresh Kumar 83cffc96ebSViresh Kumar #define NUM_PXA25x_RUN_FREQS ARRAY_SIZE(pxa255_run_freqs) 84cffc96ebSViresh Kumar #define NUM_PXA25x_TURBO_FREQS ARRAY_SIZE(pxa255_turbo_freqs) 85cffc96ebSViresh Kumar 86cffc96ebSViresh Kumar static struct cpufreq_frequency_table 87cffc96ebSViresh Kumar pxa255_run_freq_table[NUM_PXA25x_RUN_FREQS+1]; 88cffc96ebSViresh Kumar static struct cpufreq_frequency_table 89cffc96ebSViresh Kumar pxa255_turbo_freq_table[NUM_PXA25x_TURBO_FREQS+1]; 90cffc96ebSViresh Kumar 91cffc96ebSViresh Kumar static unsigned int pxa255_turbo_table; 92cffc96ebSViresh Kumar module_param(pxa255_turbo_table, uint, 0); 93cffc96ebSViresh Kumar MODULE_PARM_DESC(pxa255_turbo_table, "Selects the frequency table (0 = run table, !0 = turbo table)"); 94cffc96ebSViresh Kumar 9552352558SFabian Frederick static struct pxa_freqs pxa27x_freqs[] = { 96d9278077SRobert Jarzmik {104000, 900000, 1705000 }, 97d9278077SRobert Jarzmik {156000, 1000000, 1705000 }, 98d9278077SRobert Jarzmik {208000, 1180000, 1705000 }, 99d9278077SRobert Jarzmik {312000, 1250000, 1705000 }, 100d9278077SRobert Jarzmik {416000, 1350000, 1705000 }, 101d9278077SRobert Jarzmik {520000, 1450000, 1705000 }, 102d9278077SRobert Jarzmik {624000, 1550000, 1705000 } 103cffc96ebSViresh Kumar }; 104cffc96ebSViresh Kumar 105cffc96ebSViresh Kumar #define NUM_PXA27x_FREQS ARRAY_SIZE(pxa27x_freqs) 106cffc96ebSViresh Kumar static struct cpufreq_frequency_table 107cffc96ebSViresh Kumar pxa27x_freq_table[NUM_PXA27x_FREQS+1]; 108cffc96ebSViresh Kumar 109cffc96ebSViresh Kumar extern unsigned get_clk_frequency_khz(int info); 110cffc96ebSViresh Kumar 111cffc96ebSViresh Kumar #ifdef CONFIG_REGULATOR 112cffc96ebSViresh Kumar 11303c22990SFabian Frederick static int pxa_cpufreq_change_voltage(const struct pxa_freqs *pxa_freq) 114cffc96ebSViresh Kumar { 115cffc96ebSViresh Kumar int ret = 0; 116cffc96ebSViresh Kumar int vmin, vmax; 117cffc96ebSViresh Kumar 118cffc96ebSViresh Kumar if (!cpu_is_pxa27x()) 119cffc96ebSViresh Kumar return 0; 120cffc96ebSViresh Kumar 121cffc96ebSViresh Kumar vmin = pxa_freq->vmin; 122cffc96ebSViresh Kumar vmax = pxa_freq->vmax; 123cffc96ebSViresh Kumar if ((vmin == -1) || (vmax == -1)) 124cffc96ebSViresh Kumar return 0; 125cffc96ebSViresh Kumar 126cffc96ebSViresh Kumar ret = regulator_set_voltage(vcc_core, vmin, vmax); 127cffc96ebSViresh Kumar if (ret) 1281c5864e2SJoe Perches pr_err("Failed to set vcc_core in [%dmV..%dmV]\n", vmin, vmax); 129cffc96ebSViresh Kumar return ret; 130cffc96ebSViresh Kumar } 131cffc96ebSViresh Kumar 1329505b98cSArnd Bergmann static void pxa_cpufreq_init_voltages(void) 133cffc96ebSViresh Kumar { 134cffc96ebSViresh Kumar vcc_core = regulator_get(NULL, "vcc_core"); 135cffc96ebSViresh Kumar if (IS_ERR(vcc_core)) { 1361c5864e2SJoe Perches pr_info("Didn't find vcc_core regulator\n"); 137cffc96ebSViresh Kumar vcc_core = NULL; 138cffc96ebSViresh Kumar } else { 1391c5864e2SJoe Perches pr_info("Found vcc_core regulator\n"); 140cffc96ebSViresh Kumar } 141cffc96ebSViresh Kumar } 142cffc96ebSViresh Kumar #else 143fb2a24a1SArnd Bergmann static int pxa_cpufreq_change_voltage(const struct pxa_freqs *pxa_freq) 144cffc96ebSViresh Kumar { 145cffc96ebSViresh Kumar return 0; 146cffc96ebSViresh Kumar } 147cffc96ebSViresh Kumar 1489505b98cSArnd Bergmann static void pxa_cpufreq_init_voltages(void) { } 149cffc96ebSViresh Kumar #endif 150cffc96ebSViresh Kumar 151cffc96ebSViresh Kumar static void find_freq_tables(struct cpufreq_frequency_table **freq_table, 15203c22990SFabian Frederick const struct pxa_freqs **pxa_freqs) 153cffc96ebSViresh Kumar { 154cffc96ebSViresh Kumar if (cpu_is_pxa25x()) { 155cffc96ebSViresh Kumar if (!pxa255_turbo_table) { 156cffc96ebSViresh Kumar *pxa_freqs = pxa255_run_freqs; 157cffc96ebSViresh Kumar *freq_table = pxa255_run_freq_table; 158cffc96ebSViresh Kumar } else { 159cffc96ebSViresh Kumar *pxa_freqs = pxa255_turbo_freqs; 160cffc96ebSViresh Kumar *freq_table = pxa255_turbo_freq_table; 161cffc96ebSViresh Kumar } 1627264a2bbSArnd Bergmann } else if (cpu_is_pxa27x()) { 163cffc96ebSViresh Kumar *pxa_freqs = pxa27x_freqs; 164cffc96ebSViresh Kumar *freq_table = pxa27x_freq_table; 1657264a2bbSArnd Bergmann } else { 1667264a2bbSArnd Bergmann BUG(); 167cffc96ebSViresh Kumar } 168cffc96ebSViresh Kumar } 169cffc96ebSViresh Kumar 170cffc96ebSViresh Kumar static void pxa27x_guess_max_freq(void) 171cffc96ebSViresh Kumar { 172cffc96ebSViresh Kumar if (!pxa27x_maxfreq) { 173cffc96ebSViresh Kumar pxa27x_maxfreq = 416000; 174b49c22a6SJoe Perches pr_info("PXA CPU 27x max frequency not defined (pxa27x_maxfreq), assuming pxa271 with %dkHz maxfreq\n", 175cffc96ebSViresh Kumar pxa27x_maxfreq); 176cffc96ebSViresh Kumar } else { 177cffc96ebSViresh Kumar pxa27x_maxfreq *= 1000; 178cffc96ebSViresh Kumar } 179cffc96ebSViresh Kumar } 180cffc96ebSViresh Kumar 181cffc96ebSViresh Kumar static unsigned int pxa_cpufreq_get(unsigned int cpu) 182cffc96ebSViresh Kumar { 183d9278077SRobert Jarzmik struct pxa_cpufreq_data *data = cpufreq_get_driver_data(); 184d9278077SRobert Jarzmik 185d9278077SRobert Jarzmik return (unsigned int) clk_get_rate(data->clk_core) / 1000; 186cffc96ebSViresh Kumar } 187cffc96ebSViresh Kumar 1889c0ebcf7SViresh Kumar static int pxa_set_target(struct cpufreq_policy *policy, unsigned int idx) 189cffc96ebSViresh Kumar { 190cffc96ebSViresh Kumar struct cpufreq_frequency_table *pxa_freqs_table; 19103c22990SFabian Frederick const struct pxa_freqs *pxa_freq_settings; 192d9278077SRobert Jarzmik struct pxa_cpufreq_data *data = cpufreq_get_driver_data(); 193d9278077SRobert Jarzmik unsigned int new_freq_cpu; 194cffc96ebSViresh Kumar int ret = 0; 195cffc96ebSViresh Kumar 196cffc96ebSViresh Kumar /* Get the current policy */ 197cffc96ebSViresh Kumar find_freq_tables(&pxa_freqs_table, &pxa_freq_settings); 198cffc96ebSViresh Kumar 199cffc96ebSViresh Kumar new_freq_cpu = pxa_freq_settings[idx].khz; 200cffc96ebSViresh Kumar 201cffc96ebSViresh Kumar if (freq_debug) 202d9278077SRobert Jarzmik pr_debug("Changing CPU frequency from %d Mhz to %d Mhz\n", 203d9278077SRobert Jarzmik policy->cur / 1000, new_freq_cpu / 1000); 204cffc96ebSViresh Kumar 205d4019f0aSViresh Kumar if (vcc_core && new_freq_cpu > policy->cur) { 206cffc96ebSViresh Kumar ret = pxa_cpufreq_change_voltage(&pxa_freq_settings[idx]); 207cffc96ebSViresh Kumar if (ret) 208cffc96ebSViresh Kumar return ret; 209d4019f0aSViresh Kumar } 210cffc96ebSViresh Kumar 211d9278077SRobert Jarzmik clk_set_rate(data->clk_core, new_freq_cpu * 1000); 212cffc96ebSViresh Kumar 213cffc96ebSViresh Kumar /* 214cffc96ebSViresh Kumar * Even if voltage setting fails, we don't report it, as the frequency 215cffc96ebSViresh Kumar * change succeeded. The voltage reduction is not a critical failure, 216cffc96ebSViresh Kumar * only power savings will suffer from this. 217cffc96ebSViresh Kumar * 218cffc96ebSViresh Kumar * Note: if the voltage change fails, and a return value is returned, a 219cffc96ebSViresh Kumar * bug is triggered (seems a deadlock). Should anybody find out where, 220cffc96ebSViresh Kumar * the "return 0" should become a "return ret". 221cffc96ebSViresh Kumar */ 222d4019f0aSViresh Kumar if (vcc_core && new_freq_cpu < policy->cur) 223cffc96ebSViresh Kumar ret = pxa_cpufreq_change_voltage(&pxa_freq_settings[idx]); 224cffc96ebSViresh Kumar 225cffc96ebSViresh Kumar return 0; 226cffc96ebSViresh Kumar } 227cffc96ebSViresh Kumar 228cffc96ebSViresh Kumar static int pxa_cpufreq_init(struct cpufreq_policy *policy) 229cffc96ebSViresh Kumar { 230cffc96ebSViresh Kumar int i; 231cffc96ebSViresh Kumar unsigned int freq; 232cffc96ebSViresh Kumar struct cpufreq_frequency_table *pxa255_freq_table; 23303c22990SFabian Frederick const struct pxa_freqs *pxa255_freqs; 234cffc96ebSViresh Kumar 235cffc96ebSViresh Kumar /* try to guess pxa27x cpu */ 236cffc96ebSViresh Kumar if (cpu_is_pxa27x()) 237cffc96ebSViresh Kumar pxa27x_guess_max_freq(); 238cffc96ebSViresh Kumar 239cffc96ebSViresh Kumar pxa_cpufreq_init_voltages(); 240cffc96ebSViresh Kumar 241cffc96ebSViresh Kumar /* set default policy and cpuinfo */ 242cffc96ebSViresh Kumar policy->cpuinfo.transition_latency = 1000; /* FIXME: 1 ms, assumed */ 243cffc96ebSViresh Kumar 244cffc96ebSViresh Kumar /* Generate pxa25x the run cpufreq_frequency_table struct */ 245cffc96ebSViresh Kumar for (i = 0; i < NUM_PXA25x_RUN_FREQS; i++) { 246cffc96ebSViresh Kumar pxa255_run_freq_table[i].frequency = pxa255_run_freqs[i].khz; 24750701588SViresh Kumar pxa255_run_freq_table[i].driver_data = i; 248cffc96ebSViresh Kumar } 249cffc96ebSViresh Kumar pxa255_run_freq_table[i].frequency = CPUFREQ_TABLE_END; 250cffc96ebSViresh Kumar 251cffc96ebSViresh Kumar /* Generate pxa25x the turbo cpufreq_frequency_table struct */ 252cffc96ebSViresh Kumar for (i = 0; i < NUM_PXA25x_TURBO_FREQS; i++) { 253cffc96ebSViresh Kumar pxa255_turbo_freq_table[i].frequency = 254cffc96ebSViresh Kumar pxa255_turbo_freqs[i].khz; 25550701588SViresh Kumar pxa255_turbo_freq_table[i].driver_data = i; 256cffc96ebSViresh Kumar } 257cffc96ebSViresh Kumar pxa255_turbo_freq_table[i].frequency = CPUFREQ_TABLE_END; 258cffc96ebSViresh Kumar 259cffc96ebSViresh Kumar pxa255_turbo_table = !!pxa255_turbo_table; 260cffc96ebSViresh Kumar 261cffc96ebSViresh Kumar /* Generate the pxa27x cpufreq_frequency_table struct */ 262cffc96ebSViresh Kumar for (i = 0; i < NUM_PXA27x_FREQS; i++) { 263cffc96ebSViresh Kumar freq = pxa27x_freqs[i].khz; 264cffc96ebSViresh Kumar if (freq > pxa27x_maxfreq) 265cffc96ebSViresh Kumar break; 266cffc96ebSViresh Kumar pxa27x_freq_table[i].frequency = freq; 26750701588SViresh Kumar pxa27x_freq_table[i].driver_data = i; 268cffc96ebSViresh Kumar } 26950701588SViresh Kumar pxa27x_freq_table[i].driver_data = i; 270cffc96ebSViresh Kumar pxa27x_freq_table[i].frequency = CPUFREQ_TABLE_END; 271cffc96ebSViresh Kumar 272cffc96ebSViresh Kumar /* 273cffc96ebSViresh Kumar * Set the policy's minimum and maximum frequencies from the tables 274cffc96ebSViresh Kumar * just constructed. This sets cpuinfo.mxx_freq, min and max. 275cffc96ebSViresh Kumar */ 276cffc96ebSViresh Kumar if (cpu_is_pxa25x()) { 277cffc96ebSViresh Kumar find_freq_tables(&pxa255_freq_table, &pxa255_freqs); 2781c5864e2SJoe Perches pr_info("using %s frequency table\n", 279cffc96ebSViresh Kumar pxa255_turbo_table ? "turbo" : "run"); 2806a77a1e6SViresh Kumar 2818ed5a219SViresh Kumar policy->freq_table = pxa255_freq_table; 282cffc96ebSViresh Kumar } 2836a77a1e6SViresh Kumar else if (cpu_is_pxa27x()) { 2848ed5a219SViresh Kumar policy->freq_table = pxa27x_freq_table; 2856a77a1e6SViresh Kumar } 286cffc96ebSViresh Kumar 2871c5864e2SJoe Perches pr_info("frequency change support initialized\n"); 288cffc96ebSViresh Kumar 289cffc96ebSViresh Kumar return 0; 290cffc96ebSViresh Kumar } 291cffc96ebSViresh Kumar 292cffc96ebSViresh Kumar static struct cpufreq_driver pxa_cpufreq_driver = { 293ae6b4271SViresh Kumar .flags = CPUFREQ_NEED_INITIAL_FREQ_CHECK, 294bf36e48dSViresh Kumar .verify = cpufreq_generic_frequency_table_verify, 2959c0ebcf7SViresh Kumar .target_index = pxa_set_target, 296cffc96ebSViresh Kumar .init = pxa_cpufreq_init, 297cffc96ebSViresh Kumar .get = pxa_cpufreq_get, 298cffc96ebSViresh Kumar .name = "PXA2xx", 299d9278077SRobert Jarzmik .driver_data = &pxa_cpufreq_data, 300cffc96ebSViresh Kumar }; 301cffc96ebSViresh Kumar 302cffc96ebSViresh Kumar static int __init pxa_cpu_init(void) 303cffc96ebSViresh Kumar { 304cffc96ebSViresh Kumar int ret = -ENODEV; 305d9278077SRobert Jarzmik 306d9278077SRobert Jarzmik pxa_cpufreq_data.clk_core = clk_get_sys(NULL, "core"); 307d9278077SRobert Jarzmik if (IS_ERR(pxa_cpufreq_data.clk_core)) 308d9278077SRobert Jarzmik return PTR_ERR(pxa_cpufreq_data.clk_core); 309d9278077SRobert Jarzmik 310cffc96ebSViresh Kumar if (cpu_is_pxa25x() || cpu_is_pxa27x()) 311cffc96ebSViresh Kumar ret = cpufreq_register_driver(&pxa_cpufreq_driver); 312cffc96ebSViresh Kumar return ret; 313cffc96ebSViresh Kumar } 314cffc96ebSViresh Kumar 315cffc96ebSViresh Kumar static void __exit pxa_cpu_exit(void) 316cffc96ebSViresh Kumar { 317cffc96ebSViresh Kumar cpufreq_unregister_driver(&pxa_cpufreq_driver); 318cffc96ebSViresh Kumar } 319cffc96ebSViresh Kumar 320cffc96ebSViresh Kumar 321cffc96ebSViresh Kumar MODULE_AUTHOR("Intrinsyc Software Inc."); 322cffc96ebSViresh Kumar MODULE_DESCRIPTION("CPU frequency changing driver for the PXA architecture"); 323cffc96ebSViresh Kumar MODULE_LICENSE("GPL"); 324cffc96ebSViresh Kumar module_init(pxa_cpu_init); 325cffc96ebSViresh Kumar module_exit(pxa_cpu_exit); 326