1731e0cc6SSantosh Shilimkar /* 2ffe4f0f1SNishanth Menon * CPU frequency scaling for OMAP using OPP information 3731e0cc6SSantosh Shilimkar * 4731e0cc6SSantosh Shilimkar * Copyright (C) 2005 Nokia Corporation 5731e0cc6SSantosh Shilimkar * Written by Tony Lindgren <tony@atomide.com> 6731e0cc6SSantosh Shilimkar * 7731e0cc6SSantosh Shilimkar * Based on cpu-sa1110.c, Copyright (C) 2001 Russell King 8731e0cc6SSantosh Shilimkar * 9731e0cc6SSantosh Shilimkar * Copyright (C) 2007-2011 Texas Instruments, Inc. 10731e0cc6SSantosh Shilimkar * - OMAP3/4 support by Rajendra Nayak, Santosh Shilimkar 11731e0cc6SSantosh Shilimkar * 12731e0cc6SSantosh Shilimkar * This program is free software; you can redistribute it and/or modify 13731e0cc6SSantosh Shilimkar * it under the terms of the GNU General Public License version 2 as 14731e0cc6SSantosh Shilimkar * published by the Free Software Foundation. 15731e0cc6SSantosh Shilimkar */ 16731e0cc6SSantosh Shilimkar #include <linux/types.h> 17731e0cc6SSantosh Shilimkar #include <linux/kernel.h> 18731e0cc6SSantosh Shilimkar #include <linux/sched.h> 19731e0cc6SSantosh Shilimkar #include <linux/cpufreq.h> 20731e0cc6SSantosh Shilimkar #include <linux/delay.h> 21731e0cc6SSantosh Shilimkar #include <linux/init.h> 22731e0cc6SSantosh Shilimkar #include <linux/err.h> 23731e0cc6SSantosh Shilimkar #include <linux/clk.h> 24731e0cc6SSantosh Shilimkar #include <linux/io.h> 25731e0cc6SSantosh Shilimkar #include <linux/opp.h> 2646c12216SRussell King #include <linux/cpu.h> 27c1b547bcSKevin Hilman #include <linux/module.h> 2849ded525SNishanth Menon #include <linux/platform_device.h> 2953dfe8a8SKevin Hilman #include <linux/regulator/consumer.h> 30731e0cc6SSantosh Shilimkar 31731e0cc6SSantosh Shilimkar #include <asm/smp_plat.h> 3246c12216SRussell King #include <asm/cpu.h> 33731e0cc6SSantosh Shilimkar 3442daffd2SAfzal Mohammed /* OPP tolerance in percentage */ 3542daffd2SAfzal Mohammed #define OPP_TOLERANCE 4 3642daffd2SAfzal Mohammed 37731e0cc6SSantosh Shilimkar static struct cpufreq_frequency_table *freq_table; 381c78217fSNishanth Menon static atomic_t freq_table_users = ATOMIC_INIT(0); 39731e0cc6SSantosh Shilimkar static struct clk *mpu_clk; 40a820ffa8SNishanth Menon static struct device *mpu_dev; 4153dfe8a8SKevin Hilman static struct regulator *mpu_reg; 42731e0cc6SSantosh Shilimkar 43731e0cc6SSantosh Shilimkar static unsigned int omap_getspeed(unsigned int cpu) 44731e0cc6SSantosh Shilimkar { 45731e0cc6SSantosh Shilimkar unsigned long rate; 46731e0cc6SSantosh Shilimkar 4746c12216SRussell King if (cpu >= NR_CPUS) 48731e0cc6SSantosh Shilimkar return 0; 49731e0cc6SSantosh Shilimkar 50731e0cc6SSantosh Shilimkar rate = clk_get_rate(mpu_clk) / 1000; 51731e0cc6SSantosh Shilimkar return rate; 52731e0cc6SSantosh Shilimkar } 53731e0cc6SSantosh Shilimkar 54731e0cc6SSantosh Shilimkar static int omap_target(struct cpufreq_policy *policy, 55731e0cc6SSantosh Shilimkar unsigned int target_freq, 56731e0cc6SSantosh Shilimkar unsigned int relation) 57731e0cc6SSantosh Shilimkar { 58bf2a359dSNishanth Menon unsigned int i; 5953dfe8a8SKevin Hilman int r, ret = 0; 60731e0cc6SSantosh Shilimkar struct cpufreq_freqs freqs; 6153dfe8a8SKevin Hilman struct opp *opp; 6242daffd2SAfzal Mohammed unsigned long freq, volt = 0, volt_old = 0, tol = 0; 63731e0cc6SSantosh Shilimkar 64bf2a359dSNishanth Menon if (!freq_table) { 65bf2a359dSNishanth Menon dev_err(mpu_dev, "%s: cpu%d: no freq table!\n", __func__, 66bf2a359dSNishanth Menon policy->cpu); 67bf2a359dSNishanth Menon return -EINVAL; 68bf2a359dSNishanth Menon } 69bf2a359dSNishanth Menon 70bf2a359dSNishanth Menon ret = cpufreq_frequency_table_target(policy, freq_table, target_freq, 71bf2a359dSNishanth Menon relation, &i); 72bf2a359dSNishanth Menon if (ret) { 73bf2a359dSNishanth Menon dev_dbg(mpu_dev, "%s: cpu%d: no freq match for %d(ret=%d)\n", 74bf2a359dSNishanth Menon __func__, policy->cpu, target_freq, ret); 75bf2a359dSNishanth Menon return ret; 76bf2a359dSNishanth Menon } 77bf2a359dSNishanth Menon freqs.new = freq_table[i].frequency; 78bf2a359dSNishanth Menon if (!freqs.new) { 79bf2a359dSNishanth Menon dev_err(mpu_dev, "%s: cpu%d: no match for freq %d\n", __func__, 80bf2a359dSNishanth Menon policy->cpu, target_freq); 81bf2a359dSNishanth Menon return -EINVAL; 82bf2a359dSNishanth Menon } 83731e0cc6SSantosh Shilimkar 8446c12216SRussell King freqs.old = omap_getspeed(policy->cpu); 85731e0cc6SSantosh Shilimkar 86022ac03bSColin Cross if (freqs.old == freqs.new && policy->cur == freqs.new) 87731e0cc6SSantosh Shilimkar return ret; 88731e0cc6SSantosh Shilimkar 8953dfe8a8SKevin Hilman freq = freqs.new * 1000; 908df0a663SKevin Hilman ret = clk_round_rate(mpu_clk, freq); 918df0a663SKevin Hilman if (IS_ERR_VALUE(ret)) { 928df0a663SKevin Hilman dev_warn(mpu_dev, 938df0a663SKevin Hilman "CPUfreq: Cannot find matching frequency for %lu\n", 948df0a663SKevin Hilman freq); 958df0a663SKevin Hilman return ret; 968df0a663SKevin Hilman } 978df0a663SKevin Hilman freq = ret; 9853dfe8a8SKevin Hilman 9953dfe8a8SKevin Hilman if (mpu_reg) { 100f44d188aSNishanth Menon rcu_read_lock(); 10153dfe8a8SKevin Hilman opp = opp_find_freq_ceil(mpu_dev, &freq); 10253dfe8a8SKevin Hilman if (IS_ERR(opp)) { 103f44d188aSNishanth Menon rcu_read_unlock(); 10453dfe8a8SKevin Hilman dev_err(mpu_dev, "%s: unable to find MPU OPP for %d\n", 10553dfe8a8SKevin Hilman __func__, freqs.new); 10653dfe8a8SKevin Hilman return -EINVAL; 10753dfe8a8SKevin Hilman } 10853dfe8a8SKevin Hilman volt = opp_get_voltage(opp); 109f44d188aSNishanth Menon rcu_read_unlock(); 11042daffd2SAfzal Mohammed tol = volt * OPP_TOLERANCE / 100; 11153dfe8a8SKevin Hilman volt_old = regulator_get_voltage(mpu_reg); 11253dfe8a8SKevin Hilman } 11353dfe8a8SKevin Hilman 11453dfe8a8SKevin Hilman dev_dbg(mpu_dev, "cpufreq-omap: %u MHz, %ld mV --> %u MHz, %ld mV\n", 11553dfe8a8SKevin Hilman freqs.old / 1000, volt_old ? volt_old / 1000 : -1, 11653dfe8a8SKevin Hilman freqs.new / 1000, volt ? volt / 1000 : -1); 11753dfe8a8SKevin Hilman 11844a49a23SViresh Kumar /* notifiers */ 11944a49a23SViresh Kumar cpufreq_notify_transition(policy, &freqs, CPUFREQ_PRECHANGE); 12044a49a23SViresh Kumar 12153dfe8a8SKevin Hilman /* scaling up? scale voltage before frequency */ 12253dfe8a8SKevin Hilman if (mpu_reg && (freqs.new > freqs.old)) { 12342daffd2SAfzal Mohammed r = regulator_set_voltage(mpu_reg, volt - tol, volt + tol); 12453dfe8a8SKevin Hilman if (r < 0) { 12553dfe8a8SKevin Hilman dev_warn(mpu_dev, "%s: unable to scale voltage up.\n", 12653dfe8a8SKevin Hilman __func__); 12753dfe8a8SKevin Hilman freqs.new = freqs.old; 12853dfe8a8SKevin Hilman goto done; 12953dfe8a8SKevin Hilman } 13053dfe8a8SKevin Hilman } 131731e0cc6SSantosh Shilimkar 132731e0cc6SSantosh Shilimkar ret = clk_set_rate(mpu_clk, freqs.new * 1000); 133731e0cc6SSantosh Shilimkar 13453dfe8a8SKevin Hilman /* scaling down? scale voltage after frequency */ 13553dfe8a8SKevin Hilman if (mpu_reg && (freqs.new < freqs.old)) { 13642daffd2SAfzal Mohammed r = regulator_set_voltage(mpu_reg, volt - tol, volt + tol); 13753dfe8a8SKevin Hilman if (r < 0) { 13853dfe8a8SKevin Hilman dev_warn(mpu_dev, "%s: unable to scale voltage down.\n", 13953dfe8a8SKevin Hilman __func__); 14053dfe8a8SKevin Hilman ret = clk_set_rate(mpu_clk, freqs.old * 1000); 14153dfe8a8SKevin Hilman freqs.new = freqs.old; 14253dfe8a8SKevin Hilman goto done; 14353dfe8a8SKevin Hilman } 14453dfe8a8SKevin Hilman } 14553dfe8a8SKevin Hilman 14653dfe8a8SKevin Hilman freqs.new = omap_getspeed(policy->cpu); 14746c12216SRussell King 14853dfe8a8SKevin Hilman done: 14946c12216SRussell King /* notifiers */ 150b43a7ffbSViresh Kumar cpufreq_notify_transition(policy, &freqs, CPUFREQ_POSTCHANGE); 151731e0cc6SSantosh Shilimkar 152731e0cc6SSantosh Shilimkar return ret; 153731e0cc6SSantosh Shilimkar } 154731e0cc6SSantosh Shilimkar 1551c78217fSNishanth Menon static inline void freq_table_free(void) 1561c78217fSNishanth Menon { 1571c78217fSNishanth Menon if (atomic_dec_and_test(&freq_table_users)) 1581c78217fSNishanth Menon opp_free_cpufreq_table(mpu_dev, &freq_table); 1591c78217fSNishanth Menon } 1601c78217fSNishanth Menon 1612760984fSPaul Gortmaker static int omap_cpu_init(struct cpufreq_policy *policy) 162731e0cc6SSantosh Shilimkar { 163731e0cc6SSantosh Shilimkar int result = 0; 164731e0cc6SSantosh Shilimkar 165e2ee1b4dSPaul Walmsley mpu_clk = clk_get(NULL, "cpufreq_ck"); 166731e0cc6SSantosh Shilimkar if (IS_ERR(mpu_clk)) 167731e0cc6SSantosh Shilimkar return PTR_ERR(mpu_clk); 168731e0cc6SSantosh Shilimkar 16911e04fddSNishanth Menon if (policy->cpu >= NR_CPUS) { 17011e04fddSNishanth Menon result = -EINVAL; 17111e04fddSNishanth Menon goto fail_ck; 17211e04fddSNishanth Menon } 173731e0cc6SSantosh Shilimkar 174eb2f50ffSViresh Kumar policy->cur = omap_getspeed(policy->cpu); 1751c78217fSNishanth Menon 1761b865214SRajendra Nayak if (!freq_table) 177bf2a359dSNishanth Menon result = opp_init_cpufreq_table(mpu_dev, &freq_table); 178731e0cc6SSantosh Shilimkar 179bf2a359dSNishanth Menon if (result) { 180bf2a359dSNishanth Menon dev_err(mpu_dev, "%s: cpu%d: failed creating freq table[%d]\n", 181bf2a359dSNishanth Menon __func__, policy->cpu, result); 18211e04fddSNishanth Menon goto fail_ck; 183bf2a359dSNishanth Menon } 184bf2a359dSNishanth Menon 1851b865214SRajendra Nayak atomic_inc_return(&freq_table_users); 1861b865214SRajendra Nayak 187aca71cf0SViresh Kumar result = cpufreq_table_validate_and_show(policy, freq_table); 1881c78217fSNishanth Menon if (result) 1891c78217fSNishanth Menon goto fail_table; 1901c78217fSNishanth Menon 19146c12216SRussell King policy->cur = omap_getspeed(policy->cpu); 19246c12216SRussell King 19346c12216SRussell King /* 19446c12216SRussell King * On OMAP SMP configuartion, both processors share the voltage 19546c12216SRussell King * and clock. So both CPUs needs to be scaled together and hence 19646c12216SRussell King * needs software co-ordination. Use cpufreq affected_cpus 19746c12216SRussell King * interface to handle this scenario. Additional is_smp() check 19846c12216SRussell King * is to keep SMP_ON_UP build working. 19946c12216SRussell King */ 20062b36cc1SViresh Kumar if (is_smp()) 201ed8ce00cSTodd Poynor cpumask_setall(policy->cpus); 202731e0cc6SSantosh Shilimkar 203731e0cc6SSantosh Shilimkar /* FIXME: what's the actual transition time? */ 204731e0cc6SSantosh Shilimkar policy->cpuinfo.transition_latency = 300 * 1000; 205731e0cc6SSantosh Shilimkar 206731e0cc6SSantosh Shilimkar return 0; 20711e04fddSNishanth Menon 2081c78217fSNishanth Menon fail_table: 2091c78217fSNishanth Menon freq_table_free(); 21011e04fddSNishanth Menon fail_ck: 21111e04fddSNishanth Menon clk_put(mpu_clk); 21211e04fddSNishanth Menon return result; 213731e0cc6SSantosh Shilimkar } 214731e0cc6SSantosh Shilimkar 215731e0cc6SSantosh Shilimkar static int omap_cpu_exit(struct cpufreq_policy *policy) 216731e0cc6SSantosh Shilimkar { 21742a4df00SViresh Kumar cpufreq_frequency_table_put_attr(policy->cpu); 2181c78217fSNishanth Menon freq_table_free(); 219731e0cc6SSantosh Shilimkar clk_put(mpu_clk); 220731e0cc6SSantosh Shilimkar return 0; 221731e0cc6SSantosh Shilimkar } 222731e0cc6SSantosh Shilimkar 223731e0cc6SSantosh Shilimkar static struct cpufreq_driver omap_driver = { 224731e0cc6SSantosh Shilimkar .flags = CPUFREQ_STICKY, 225*d5ca1649SViresh Kumar .verify = cpufreq_generic_frequency_table_verify, 226731e0cc6SSantosh Shilimkar .target = omap_target, 227731e0cc6SSantosh Shilimkar .get = omap_getspeed, 228731e0cc6SSantosh Shilimkar .init = omap_cpu_init, 229731e0cc6SSantosh Shilimkar .exit = omap_cpu_exit, 230731e0cc6SSantosh Shilimkar .name = "omap", 231*d5ca1649SViresh Kumar .attr = cpufreq_generic_attr, 232731e0cc6SSantosh Shilimkar }; 233731e0cc6SSantosh Shilimkar 23449ded525SNishanth Menon static int omap_cpufreq_probe(struct platform_device *pdev) 235731e0cc6SSantosh Shilimkar { 236747a7f64SKevin Hilman mpu_dev = get_cpu_device(0); 237747a7f64SKevin Hilman if (!mpu_dev) { 238a820ffa8SNishanth Menon pr_warning("%s: unable to get the mpu device\n", __func__); 239747a7f64SKevin Hilman return -EINVAL; 240a820ffa8SNishanth Menon } 241a820ffa8SNishanth Menon 24253dfe8a8SKevin Hilman mpu_reg = regulator_get(mpu_dev, "vcc"); 24353dfe8a8SKevin Hilman if (IS_ERR(mpu_reg)) { 24453dfe8a8SKevin Hilman pr_warning("%s: unable to get MPU regulator\n", __func__); 24553dfe8a8SKevin Hilman mpu_reg = NULL; 24653dfe8a8SKevin Hilman } else { 24753dfe8a8SKevin Hilman /* 24853dfe8a8SKevin Hilman * Ensure physical regulator is present. 24953dfe8a8SKevin Hilman * (e.g. could be dummy regulator.) 25053dfe8a8SKevin Hilman */ 25153dfe8a8SKevin Hilman if (regulator_get_voltage(mpu_reg) < 0) { 25253dfe8a8SKevin Hilman pr_warn("%s: physical regulator not present for MPU\n", 25353dfe8a8SKevin Hilman __func__); 25453dfe8a8SKevin Hilman regulator_put(mpu_reg); 25553dfe8a8SKevin Hilman mpu_reg = NULL; 25653dfe8a8SKevin Hilman } 25753dfe8a8SKevin Hilman } 25853dfe8a8SKevin Hilman 259731e0cc6SSantosh Shilimkar return cpufreq_register_driver(&omap_driver); 260731e0cc6SSantosh Shilimkar } 261731e0cc6SSantosh Shilimkar 26249ded525SNishanth Menon static int omap_cpufreq_remove(struct platform_device *pdev) 263731e0cc6SSantosh Shilimkar { 26449ded525SNishanth Menon return cpufreq_unregister_driver(&omap_driver); 265731e0cc6SSantosh Shilimkar } 266731e0cc6SSantosh Shilimkar 26749ded525SNishanth Menon static struct platform_driver omap_cpufreq_platdrv = { 26849ded525SNishanth Menon .driver = { 26949ded525SNishanth Menon .name = "omap-cpufreq", 27049ded525SNishanth Menon .owner = THIS_MODULE, 27149ded525SNishanth Menon }, 27249ded525SNishanth Menon .probe = omap_cpufreq_probe, 27349ded525SNishanth Menon .remove = omap_cpufreq_remove, 27449ded525SNishanth Menon }; 27549ded525SNishanth Menon module_platform_driver(omap_cpufreq_platdrv); 27649ded525SNishanth Menon 277731e0cc6SSantosh Shilimkar MODULE_DESCRIPTION("cpufreq driver for OMAP SoCs"); 278731e0cc6SSantosh Shilimkar MODULE_LICENSE("GPL"); 279