1731e0cc6SSantosh Shilimkar /* 2ffe4f0f1SNishanth Menon * CPU frequency scaling for OMAP using OPP information 3731e0cc6SSantosh Shilimkar * 4731e0cc6SSantosh Shilimkar * Copyright (C) 2005 Nokia Corporation 5731e0cc6SSantosh Shilimkar * Written by Tony Lindgren <tony@atomide.com> 6731e0cc6SSantosh Shilimkar * 7731e0cc6SSantosh Shilimkar * Based on cpu-sa1110.c, Copyright (C) 2001 Russell King 8731e0cc6SSantosh Shilimkar * 9731e0cc6SSantosh Shilimkar * Copyright (C) 2007-2011 Texas Instruments, Inc. 10731e0cc6SSantosh Shilimkar * - OMAP3/4 support by Rajendra Nayak, Santosh Shilimkar 11731e0cc6SSantosh Shilimkar * 12731e0cc6SSantosh Shilimkar * This program is free software; you can redistribute it and/or modify 13731e0cc6SSantosh Shilimkar * it under the terms of the GNU General Public License version 2 as 14731e0cc6SSantosh Shilimkar * published by the Free Software Foundation. 15731e0cc6SSantosh Shilimkar */ 16731e0cc6SSantosh Shilimkar #include <linux/types.h> 17731e0cc6SSantosh Shilimkar #include <linux/kernel.h> 18731e0cc6SSantosh Shilimkar #include <linux/sched.h> 19731e0cc6SSantosh Shilimkar #include <linux/cpufreq.h> 20731e0cc6SSantosh Shilimkar #include <linux/delay.h> 21731e0cc6SSantosh Shilimkar #include <linux/init.h> 22731e0cc6SSantosh Shilimkar #include <linux/err.h> 23731e0cc6SSantosh Shilimkar #include <linux/clk.h> 24731e0cc6SSantosh Shilimkar #include <linux/io.h> 25731e0cc6SSantosh Shilimkar #include <linux/opp.h> 2646c12216SRussell King #include <linux/cpu.h> 27c1b547bcSKevin Hilman #include <linux/module.h> 2853dfe8a8SKevin Hilman #include <linux/regulator/consumer.h> 29731e0cc6SSantosh Shilimkar 30731e0cc6SSantosh Shilimkar #include <asm/smp_plat.h> 3146c12216SRussell King #include <asm/cpu.h> 32731e0cc6SSantosh Shilimkar 3342daffd2SAfzal Mohammed /* OPP tolerance in percentage */ 3442daffd2SAfzal Mohammed #define OPP_TOLERANCE 4 3542daffd2SAfzal Mohammed 36731e0cc6SSantosh Shilimkar static struct cpufreq_frequency_table *freq_table; 371c78217fSNishanth Menon static atomic_t freq_table_users = ATOMIC_INIT(0); 38731e0cc6SSantosh Shilimkar static struct clk *mpu_clk; 39a820ffa8SNishanth Menon static struct device *mpu_dev; 4053dfe8a8SKevin Hilman static struct regulator *mpu_reg; 41731e0cc6SSantosh Shilimkar 42731e0cc6SSantosh Shilimkar static int omap_verify_speed(struct cpufreq_policy *policy) 43731e0cc6SSantosh Shilimkar { 44bf2a359dSNishanth Menon if (!freq_table) 45731e0cc6SSantosh Shilimkar return -EINVAL; 46bf2a359dSNishanth Menon return cpufreq_frequency_table_verify(policy, freq_table); 47731e0cc6SSantosh Shilimkar } 48731e0cc6SSantosh Shilimkar 49731e0cc6SSantosh Shilimkar static unsigned int omap_getspeed(unsigned int cpu) 50731e0cc6SSantosh Shilimkar { 51731e0cc6SSantosh Shilimkar unsigned long rate; 52731e0cc6SSantosh Shilimkar 5346c12216SRussell King if (cpu >= NR_CPUS) 54731e0cc6SSantosh Shilimkar return 0; 55731e0cc6SSantosh Shilimkar 56731e0cc6SSantosh Shilimkar rate = clk_get_rate(mpu_clk) / 1000; 57731e0cc6SSantosh Shilimkar return rate; 58731e0cc6SSantosh Shilimkar } 59731e0cc6SSantosh Shilimkar 60731e0cc6SSantosh Shilimkar static int omap_target(struct cpufreq_policy *policy, 61731e0cc6SSantosh Shilimkar unsigned int target_freq, 62731e0cc6SSantosh Shilimkar unsigned int relation) 63731e0cc6SSantosh Shilimkar { 64bf2a359dSNishanth Menon unsigned int i; 6553dfe8a8SKevin Hilman int r, ret = 0; 66731e0cc6SSantosh Shilimkar struct cpufreq_freqs freqs; 6753dfe8a8SKevin Hilman struct opp *opp; 6842daffd2SAfzal Mohammed unsigned long freq, volt = 0, volt_old = 0, tol = 0; 69731e0cc6SSantosh Shilimkar 70bf2a359dSNishanth Menon if (!freq_table) { 71bf2a359dSNishanth Menon dev_err(mpu_dev, "%s: cpu%d: no freq table!\n", __func__, 72bf2a359dSNishanth Menon policy->cpu); 73bf2a359dSNishanth Menon return -EINVAL; 74bf2a359dSNishanth Menon } 75bf2a359dSNishanth Menon 76bf2a359dSNishanth Menon ret = cpufreq_frequency_table_target(policy, freq_table, target_freq, 77bf2a359dSNishanth Menon relation, &i); 78bf2a359dSNishanth Menon if (ret) { 79bf2a359dSNishanth Menon dev_dbg(mpu_dev, "%s: cpu%d: no freq match for %d(ret=%d)\n", 80bf2a359dSNishanth Menon __func__, policy->cpu, target_freq, ret); 81bf2a359dSNishanth Menon return ret; 82bf2a359dSNishanth Menon } 83bf2a359dSNishanth Menon freqs.new = freq_table[i].frequency; 84bf2a359dSNishanth Menon if (!freqs.new) { 85bf2a359dSNishanth Menon dev_err(mpu_dev, "%s: cpu%d: no match for freq %d\n", __func__, 86bf2a359dSNishanth Menon policy->cpu, target_freq); 87bf2a359dSNishanth Menon return -EINVAL; 88bf2a359dSNishanth Menon } 89731e0cc6SSantosh Shilimkar 9046c12216SRussell King freqs.old = omap_getspeed(policy->cpu); 9146c12216SRussell King freqs.cpu = policy->cpu; 92731e0cc6SSantosh Shilimkar 93022ac03bSColin Cross if (freqs.old == freqs.new && policy->cur == freqs.new) 94731e0cc6SSantosh Shilimkar return ret; 95731e0cc6SSantosh Shilimkar 9646c12216SRussell King /* notifiers */ 9746c12216SRussell King for_each_cpu(i, policy->cpus) { 9846c12216SRussell King freqs.cpu = i; 99731e0cc6SSantosh Shilimkar cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); 10046c12216SRussell King } 101731e0cc6SSantosh Shilimkar 10253dfe8a8SKevin Hilman freq = freqs.new * 1000; 1038df0a663SKevin Hilman ret = clk_round_rate(mpu_clk, freq); 1048df0a663SKevin Hilman if (IS_ERR_VALUE(ret)) { 1058df0a663SKevin Hilman dev_warn(mpu_dev, 1068df0a663SKevin Hilman "CPUfreq: Cannot find matching frequency for %lu\n", 1078df0a663SKevin Hilman freq); 1088df0a663SKevin Hilman return ret; 1098df0a663SKevin Hilman } 1108df0a663SKevin Hilman freq = ret; 11153dfe8a8SKevin Hilman 11253dfe8a8SKevin Hilman if (mpu_reg) { 11353dfe8a8SKevin Hilman opp = opp_find_freq_ceil(mpu_dev, &freq); 11453dfe8a8SKevin Hilman if (IS_ERR(opp)) { 11553dfe8a8SKevin Hilman dev_err(mpu_dev, "%s: unable to find MPU OPP for %d\n", 11653dfe8a8SKevin Hilman __func__, freqs.new); 11753dfe8a8SKevin Hilman return -EINVAL; 11853dfe8a8SKevin Hilman } 11953dfe8a8SKevin Hilman volt = opp_get_voltage(opp); 12042daffd2SAfzal Mohammed tol = volt * OPP_TOLERANCE / 100; 12153dfe8a8SKevin Hilman volt_old = regulator_get_voltage(mpu_reg); 12253dfe8a8SKevin Hilman } 12353dfe8a8SKevin Hilman 12453dfe8a8SKevin Hilman dev_dbg(mpu_dev, "cpufreq-omap: %u MHz, %ld mV --> %u MHz, %ld mV\n", 12553dfe8a8SKevin Hilman freqs.old / 1000, volt_old ? volt_old / 1000 : -1, 12653dfe8a8SKevin Hilman freqs.new / 1000, volt ? volt / 1000 : -1); 12753dfe8a8SKevin Hilman 12853dfe8a8SKevin Hilman /* scaling up? scale voltage before frequency */ 12953dfe8a8SKevin Hilman if (mpu_reg && (freqs.new > freqs.old)) { 13042daffd2SAfzal Mohammed r = regulator_set_voltage(mpu_reg, volt - tol, volt + tol); 13153dfe8a8SKevin Hilman if (r < 0) { 13253dfe8a8SKevin Hilman dev_warn(mpu_dev, "%s: unable to scale voltage up.\n", 13353dfe8a8SKevin Hilman __func__); 13453dfe8a8SKevin Hilman freqs.new = freqs.old; 13553dfe8a8SKevin Hilman goto done; 13653dfe8a8SKevin Hilman } 13753dfe8a8SKevin Hilman } 138731e0cc6SSantosh Shilimkar 139731e0cc6SSantosh Shilimkar ret = clk_set_rate(mpu_clk, freqs.new * 1000); 140731e0cc6SSantosh Shilimkar 14153dfe8a8SKevin Hilman /* scaling down? scale voltage after frequency */ 14253dfe8a8SKevin Hilman if (mpu_reg && (freqs.new < freqs.old)) { 14342daffd2SAfzal Mohammed r = regulator_set_voltage(mpu_reg, volt - tol, volt + tol); 14453dfe8a8SKevin Hilman if (r < 0) { 14553dfe8a8SKevin Hilman dev_warn(mpu_dev, "%s: unable to scale voltage down.\n", 14653dfe8a8SKevin Hilman __func__); 14753dfe8a8SKevin Hilman ret = clk_set_rate(mpu_clk, freqs.old * 1000); 14853dfe8a8SKevin Hilman freqs.new = freqs.old; 14953dfe8a8SKevin Hilman goto done; 15053dfe8a8SKevin Hilman } 15153dfe8a8SKevin Hilman } 15253dfe8a8SKevin Hilman 15353dfe8a8SKevin Hilman freqs.new = omap_getspeed(policy->cpu); 15446c12216SRussell King 15553dfe8a8SKevin Hilman done: 15646c12216SRussell King /* notifiers */ 15746c12216SRussell King for_each_cpu(i, policy->cpus) { 15846c12216SRussell King freqs.cpu = i; 159731e0cc6SSantosh Shilimkar cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); 16046c12216SRussell King } 161731e0cc6SSantosh Shilimkar 162731e0cc6SSantosh Shilimkar return ret; 163731e0cc6SSantosh Shilimkar } 164731e0cc6SSantosh Shilimkar 1651c78217fSNishanth Menon static inline void freq_table_free(void) 1661c78217fSNishanth Menon { 1671c78217fSNishanth Menon if (atomic_dec_and_test(&freq_table_users)) 1681c78217fSNishanth Menon opp_free_cpufreq_table(mpu_dev, &freq_table); 1691c78217fSNishanth Menon } 1701c78217fSNishanth Menon 171731e0cc6SSantosh Shilimkar static int __cpuinit omap_cpu_init(struct cpufreq_policy *policy) 172731e0cc6SSantosh Shilimkar { 173731e0cc6SSantosh Shilimkar int result = 0; 174731e0cc6SSantosh Shilimkar 175e2ee1b4dSPaul Walmsley mpu_clk = clk_get(NULL, "cpufreq_ck"); 176731e0cc6SSantosh Shilimkar if (IS_ERR(mpu_clk)) 177731e0cc6SSantosh Shilimkar return PTR_ERR(mpu_clk); 178731e0cc6SSantosh Shilimkar 17911e04fddSNishanth Menon if (policy->cpu >= NR_CPUS) { 18011e04fddSNishanth Menon result = -EINVAL; 18111e04fddSNishanth Menon goto fail_ck; 18211e04fddSNishanth Menon } 183731e0cc6SSantosh Shilimkar 18446c12216SRussell King policy->cur = policy->min = policy->max = omap_getspeed(policy->cpu); 1851c78217fSNishanth Menon 1861b865214SRajendra Nayak if (!freq_table) 187bf2a359dSNishanth Menon result = opp_init_cpufreq_table(mpu_dev, &freq_table); 188731e0cc6SSantosh Shilimkar 189bf2a359dSNishanth Menon if (result) { 190bf2a359dSNishanth Menon dev_err(mpu_dev, "%s: cpu%d: failed creating freq table[%d]\n", 191bf2a359dSNishanth Menon __func__, policy->cpu, result); 19211e04fddSNishanth Menon goto fail_ck; 193bf2a359dSNishanth Menon } 194bf2a359dSNishanth Menon 1951b865214SRajendra Nayak atomic_inc_return(&freq_table_users); 1961b865214SRajendra Nayak 197731e0cc6SSantosh Shilimkar result = cpufreq_frequency_table_cpuinfo(policy, freq_table); 1981c78217fSNishanth Menon if (result) 1991c78217fSNishanth Menon goto fail_table; 2001c78217fSNishanth Menon 201bf2a359dSNishanth Menon cpufreq_frequency_table_get_attr(freq_table, policy->cpu); 202731e0cc6SSantosh Shilimkar 203731e0cc6SSantosh Shilimkar policy->min = policy->cpuinfo.min_freq; 204731e0cc6SSantosh Shilimkar policy->max = policy->cpuinfo.max_freq; 20546c12216SRussell King policy->cur = omap_getspeed(policy->cpu); 20646c12216SRussell King 20746c12216SRussell King /* 20846c12216SRussell King * On OMAP SMP configuartion, both processors share the voltage 20946c12216SRussell King * and clock. So both CPUs needs to be scaled together and hence 21046c12216SRussell King * needs software co-ordination. Use cpufreq affected_cpus 21146c12216SRussell King * interface to handle this scenario. Additional is_smp() check 21246c12216SRussell King * is to keep SMP_ON_UP build working. 21346c12216SRussell King */ 21446c12216SRussell King if (is_smp()) { 21546c12216SRussell King policy->shared_type = CPUFREQ_SHARED_TYPE_ANY; 216ed8ce00cSTodd Poynor cpumask_setall(policy->cpus); 21746c12216SRussell King } 218731e0cc6SSantosh Shilimkar 219731e0cc6SSantosh Shilimkar /* FIXME: what's the actual transition time? */ 220731e0cc6SSantosh Shilimkar policy->cpuinfo.transition_latency = 300 * 1000; 221731e0cc6SSantosh Shilimkar 222731e0cc6SSantosh Shilimkar return 0; 22311e04fddSNishanth Menon 2241c78217fSNishanth Menon fail_table: 2251c78217fSNishanth Menon freq_table_free(); 22611e04fddSNishanth Menon fail_ck: 22711e04fddSNishanth Menon clk_put(mpu_clk); 22811e04fddSNishanth Menon return result; 229731e0cc6SSantosh Shilimkar } 230731e0cc6SSantosh Shilimkar 231731e0cc6SSantosh Shilimkar static int omap_cpu_exit(struct cpufreq_policy *policy) 232731e0cc6SSantosh Shilimkar { 2331c78217fSNishanth Menon freq_table_free(); 234731e0cc6SSantosh Shilimkar clk_put(mpu_clk); 235731e0cc6SSantosh Shilimkar return 0; 236731e0cc6SSantosh Shilimkar } 237731e0cc6SSantosh Shilimkar 238731e0cc6SSantosh Shilimkar static struct freq_attr *omap_cpufreq_attr[] = { 239731e0cc6SSantosh Shilimkar &cpufreq_freq_attr_scaling_available_freqs, 240731e0cc6SSantosh Shilimkar NULL, 241731e0cc6SSantosh Shilimkar }; 242731e0cc6SSantosh Shilimkar 243731e0cc6SSantosh Shilimkar static struct cpufreq_driver omap_driver = { 244731e0cc6SSantosh Shilimkar .flags = CPUFREQ_STICKY, 245731e0cc6SSantosh Shilimkar .verify = omap_verify_speed, 246731e0cc6SSantosh Shilimkar .target = omap_target, 247731e0cc6SSantosh Shilimkar .get = omap_getspeed, 248731e0cc6SSantosh Shilimkar .init = omap_cpu_init, 249731e0cc6SSantosh Shilimkar .exit = omap_cpu_exit, 250731e0cc6SSantosh Shilimkar .name = "omap", 251731e0cc6SSantosh Shilimkar .attr = omap_cpufreq_attr, 252731e0cc6SSantosh Shilimkar }; 253731e0cc6SSantosh Shilimkar 254731e0cc6SSantosh Shilimkar static int __init omap_cpufreq_init(void) 255731e0cc6SSantosh Shilimkar { 256*747a7f64SKevin Hilman mpu_dev = get_cpu_device(0); 257*747a7f64SKevin Hilman if (!mpu_dev) { 258a820ffa8SNishanth Menon pr_warning("%s: unable to get the mpu device\n", __func__); 259*747a7f64SKevin Hilman return -EINVAL; 260a820ffa8SNishanth Menon } 261a820ffa8SNishanth Menon 26253dfe8a8SKevin Hilman mpu_reg = regulator_get(mpu_dev, "vcc"); 26353dfe8a8SKevin Hilman if (IS_ERR(mpu_reg)) { 26453dfe8a8SKevin Hilman pr_warning("%s: unable to get MPU regulator\n", __func__); 26553dfe8a8SKevin Hilman mpu_reg = NULL; 26653dfe8a8SKevin Hilman } else { 26753dfe8a8SKevin Hilman /* 26853dfe8a8SKevin Hilman * Ensure physical regulator is present. 26953dfe8a8SKevin Hilman * (e.g. could be dummy regulator.) 27053dfe8a8SKevin Hilman */ 27153dfe8a8SKevin Hilman if (regulator_get_voltage(mpu_reg) < 0) { 27253dfe8a8SKevin Hilman pr_warn("%s: physical regulator not present for MPU\n", 27353dfe8a8SKevin Hilman __func__); 27453dfe8a8SKevin Hilman regulator_put(mpu_reg); 27553dfe8a8SKevin Hilman mpu_reg = NULL; 27653dfe8a8SKevin Hilman } 27753dfe8a8SKevin Hilman } 27853dfe8a8SKevin Hilman 279731e0cc6SSantosh Shilimkar return cpufreq_register_driver(&omap_driver); 280731e0cc6SSantosh Shilimkar } 281731e0cc6SSantosh Shilimkar 282731e0cc6SSantosh Shilimkar static void __exit omap_cpufreq_exit(void) 283731e0cc6SSantosh Shilimkar { 284731e0cc6SSantosh Shilimkar cpufreq_unregister_driver(&omap_driver); 285731e0cc6SSantosh Shilimkar } 286731e0cc6SSantosh Shilimkar 287731e0cc6SSantosh Shilimkar MODULE_DESCRIPTION("cpufreq driver for OMAP SoCs"); 288731e0cc6SSantosh Shilimkar MODULE_LICENSE("GPL"); 289731e0cc6SSantosh Shilimkar module_init(omap_cpufreq_init); 290731e0cc6SSantosh Shilimkar module_exit(omap_cpufreq_exit); 291