1731e0cc6SSantosh Shilimkar /* 2ffe4f0f1SNishanth Menon * CPU frequency scaling for OMAP using OPP information 3731e0cc6SSantosh Shilimkar * 4731e0cc6SSantosh Shilimkar * Copyright (C) 2005 Nokia Corporation 5731e0cc6SSantosh Shilimkar * Written by Tony Lindgren <tony@atomide.com> 6731e0cc6SSantosh Shilimkar * 7731e0cc6SSantosh Shilimkar * Based on cpu-sa1110.c, Copyright (C) 2001 Russell King 8731e0cc6SSantosh Shilimkar * 9731e0cc6SSantosh Shilimkar * Copyright (C) 2007-2011 Texas Instruments, Inc. 10731e0cc6SSantosh Shilimkar * - OMAP3/4 support by Rajendra Nayak, Santosh Shilimkar 11731e0cc6SSantosh Shilimkar * 12731e0cc6SSantosh Shilimkar * This program is free software; you can redistribute it and/or modify 13731e0cc6SSantosh Shilimkar * it under the terms of the GNU General Public License version 2 as 14731e0cc6SSantosh Shilimkar * published by the Free Software Foundation. 15731e0cc6SSantosh Shilimkar */ 16731e0cc6SSantosh Shilimkar #include <linux/types.h> 17731e0cc6SSantosh Shilimkar #include <linux/kernel.h> 18731e0cc6SSantosh Shilimkar #include <linux/sched.h> 19731e0cc6SSantosh Shilimkar #include <linux/cpufreq.h> 20731e0cc6SSantosh Shilimkar #include <linux/delay.h> 21731e0cc6SSantosh Shilimkar #include <linux/init.h> 22731e0cc6SSantosh Shilimkar #include <linux/err.h> 23731e0cc6SSantosh Shilimkar #include <linux/clk.h> 24731e0cc6SSantosh Shilimkar #include <linux/io.h> 25e4db1c74SNishanth Menon #include <linux/pm_opp.h> 2646c12216SRussell King #include <linux/cpu.h> 27c1b547bcSKevin Hilman #include <linux/module.h> 2849ded525SNishanth Menon #include <linux/platform_device.h> 2953dfe8a8SKevin Hilman #include <linux/regulator/consumer.h> 30731e0cc6SSantosh Shilimkar 31731e0cc6SSantosh Shilimkar #include <asm/smp_plat.h> 3246c12216SRussell King #include <asm/cpu.h> 33731e0cc6SSantosh Shilimkar 3442daffd2SAfzal Mohammed /* OPP tolerance in percentage */ 3542daffd2SAfzal Mohammed #define OPP_TOLERANCE 4 3642daffd2SAfzal Mohammed 37731e0cc6SSantosh Shilimkar static struct cpufreq_frequency_table *freq_table; 381c78217fSNishanth Menon static atomic_t freq_table_users = ATOMIC_INIT(0); 39731e0cc6SSantosh Shilimkar static struct clk *mpu_clk; 40a820ffa8SNishanth Menon static struct device *mpu_dev; 4153dfe8a8SKevin Hilman static struct regulator *mpu_reg; 42731e0cc6SSantosh Shilimkar 43731e0cc6SSantosh Shilimkar static unsigned int omap_getspeed(unsigned int cpu) 44731e0cc6SSantosh Shilimkar { 45731e0cc6SSantosh Shilimkar unsigned long rate; 46731e0cc6SSantosh Shilimkar 4746c12216SRussell King if (cpu >= NR_CPUS) 48731e0cc6SSantosh Shilimkar return 0; 49731e0cc6SSantosh Shilimkar 50731e0cc6SSantosh Shilimkar rate = clk_get_rate(mpu_clk) / 1000; 51731e0cc6SSantosh Shilimkar return rate; 52731e0cc6SSantosh Shilimkar } 53731e0cc6SSantosh Shilimkar 549c0ebcf7SViresh Kumar static int omap_target(struct cpufreq_policy *policy, unsigned int index) 55731e0cc6SSantosh Shilimkar { 56*696d0b2cSviresh kumar int r, ret; 5747d43ba7SNishanth Menon struct dev_pm_opp *opp; 5842daffd2SAfzal Mohammed unsigned long freq, volt = 0, volt_old = 0, tol = 0; 59d4019f0aSViresh Kumar unsigned int old_freq, new_freq; 60731e0cc6SSantosh Shilimkar 61d4019f0aSViresh Kumar old_freq = omap_getspeed(policy->cpu); 62d4019f0aSViresh Kumar new_freq = freq_table[index].frequency; 63731e0cc6SSantosh Shilimkar 64d4019f0aSViresh Kumar freq = new_freq * 1000; 658df0a663SKevin Hilman ret = clk_round_rate(mpu_clk, freq); 668df0a663SKevin Hilman if (IS_ERR_VALUE(ret)) { 678df0a663SKevin Hilman dev_warn(mpu_dev, 688df0a663SKevin Hilman "CPUfreq: Cannot find matching frequency for %lu\n", 698df0a663SKevin Hilman freq); 708df0a663SKevin Hilman return ret; 718df0a663SKevin Hilman } 728df0a663SKevin Hilman freq = ret; 7353dfe8a8SKevin Hilman 7453dfe8a8SKevin Hilman if (mpu_reg) { 75f44d188aSNishanth Menon rcu_read_lock(); 765d4879cdSNishanth Menon opp = dev_pm_opp_find_freq_ceil(mpu_dev, &freq); 7753dfe8a8SKevin Hilman if (IS_ERR(opp)) { 78f44d188aSNishanth Menon rcu_read_unlock(); 7953dfe8a8SKevin Hilman dev_err(mpu_dev, "%s: unable to find MPU OPP for %d\n", 80d4019f0aSViresh Kumar __func__, new_freq); 8153dfe8a8SKevin Hilman return -EINVAL; 8253dfe8a8SKevin Hilman } 835d4879cdSNishanth Menon volt = dev_pm_opp_get_voltage(opp); 84f44d188aSNishanth Menon rcu_read_unlock(); 8542daffd2SAfzal Mohammed tol = volt * OPP_TOLERANCE / 100; 8653dfe8a8SKevin Hilman volt_old = regulator_get_voltage(mpu_reg); 8753dfe8a8SKevin Hilman } 8853dfe8a8SKevin Hilman 8953dfe8a8SKevin Hilman dev_dbg(mpu_dev, "cpufreq-omap: %u MHz, %ld mV --> %u MHz, %ld mV\n", 90d4019f0aSViresh Kumar old_freq / 1000, volt_old ? volt_old / 1000 : -1, 91d4019f0aSViresh Kumar new_freq / 1000, volt ? volt / 1000 : -1); 9244a49a23SViresh Kumar 9353dfe8a8SKevin Hilman /* scaling up? scale voltage before frequency */ 94d4019f0aSViresh Kumar if (mpu_reg && (new_freq > old_freq)) { 9542daffd2SAfzal Mohammed r = regulator_set_voltage(mpu_reg, volt - tol, volt + tol); 9653dfe8a8SKevin Hilman if (r < 0) { 9753dfe8a8SKevin Hilman dev_warn(mpu_dev, "%s: unable to scale voltage up.\n", 9853dfe8a8SKevin Hilman __func__); 99d4019f0aSViresh Kumar return r; 10053dfe8a8SKevin Hilman } 10153dfe8a8SKevin Hilman } 102731e0cc6SSantosh Shilimkar 103d4019f0aSViresh Kumar ret = clk_set_rate(mpu_clk, new_freq * 1000); 104731e0cc6SSantosh Shilimkar 10553dfe8a8SKevin Hilman /* scaling down? scale voltage after frequency */ 106d4019f0aSViresh Kumar if (mpu_reg && (new_freq < old_freq)) { 10742daffd2SAfzal Mohammed r = regulator_set_voltage(mpu_reg, volt - tol, volt + tol); 10853dfe8a8SKevin Hilman if (r < 0) { 10953dfe8a8SKevin Hilman dev_warn(mpu_dev, "%s: unable to scale voltage down.\n", 11053dfe8a8SKevin Hilman __func__); 111d4019f0aSViresh Kumar clk_set_rate(mpu_clk, old_freq * 1000); 112d4019f0aSViresh Kumar return r; 11353dfe8a8SKevin Hilman } 11453dfe8a8SKevin Hilman } 11553dfe8a8SKevin Hilman 116731e0cc6SSantosh Shilimkar return ret; 117731e0cc6SSantosh Shilimkar } 118731e0cc6SSantosh Shilimkar 1191c78217fSNishanth Menon static inline void freq_table_free(void) 1201c78217fSNishanth Menon { 1211c78217fSNishanth Menon if (atomic_dec_and_test(&freq_table_users)) 1225d4879cdSNishanth Menon dev_pm_opp_free_cpufreq_table(mpu_dev, &freq_table); 1231c78217fSNishanth Menon } 1241c78217fSNishanth Menon 1252760984fSPaul Gortmaker static int omap_cpu_init(struct cpufreq_policy *policy) 126731e0cc6SSantosh Shilimkar { 127982bce11SViresh Kumar int result; 128731e0cc6SSantosh Shilimkar 129e2ee1b4dSPaul Walmsley mpu_clk = clk_get(NULL, "cpufreq_ck"); 130731e0cc6SSantosh Shilimkar if (IS_ERR(mpu_clk)) 131731e0cc6SSantosh Shilimkar return PTR_ERR(mpu_clk); 132731e0cc6SSantosh Shilimkar 133982bce11SViresh Kumar if (!freq_table) { 1345d4879cdSNishanth Menon result = dev_pm_opp_init_cpufreq_table(mpu_dev, &freq_table); 135bf2a359dSNishanth Menon if (result) { 136982bce11SViresh Kumar dev_err(mpu_dev, 137982bce11SViresh Kumar "%s: cpu%d: failed creating freq table[%d]\n", 138bf2a359dSNishanth Menon __func__, policy->cpu, result); 139982bce11SViresh Kumar goto fail; 140982bce11SViresh Kumar } 141bf2a359dSNishanth Menon } 142bf2a359dSNishanth Menon 1431b865214SRajendra Nayak atomic_inc_return(&freq_table_users); 1441b865214SRajendra Nayak 145731e0cc6SSantosh Shilimkar /* FIXME: what's the actual transition time? */ 146982bce11SViresh Kumar result = cpufreq_generic_init(policy, freq_table, 300 * 1000); 147982bce11SViresh Kumar if (!result) 148731e0cc6SSantosh Shilimkar return 0; 14911e04fddSNishanth Menon 1501c78217fSNishanth Menon freq_table_free(); 151982bce11SViresh Kumar fail: 15211e04fddSNishanth Menon clk_put(mpu_clk); 15311e04fddSNishanth Menon return result; 154731e0cc6SSantosh Shilimkar } 155731e0cc6SSantosh Shilimkar 156731e0cc6SSantosh Shilimkar static int omap_cpu_exit(struct cpufreq_policy *policy) 157731e0cc6SSantosh Shilimkar { 15842a4df00SViresh Kumar cpufreq_frequency_table_put_attr(policy->cpu); 1591c78217fSNishanth Menon freq_table_free(); 160731e0cc6SSantosh Shilimkar clk_put(mpu_clk); 161731e0cc6SSantosh Shilimkar return 0; 162731e0cc6SSantosh Shilimkar } 163731e0cc6SSantosh Shilimkar 164731e0cc6SSantosh Shilimkar static struct cpufreq_driver omap_driver = { 165731e0cc6SSantosh Shilimkar .flags = CPUFREQ_STICKY, 166d5ca1649SViresh Kumar .verify = cpufreq_generic_frequency_table_verify, 1679c0ebcf7SViresh Kumar .target_index = omap_target, 168731e0cc6SSantosh Shilimkar .get = omap_getspeed, 169731e0cc6SSantosh Shilimkar .init = omap_cpu_init, 170731e0cc6SSantosh Shilimkar .exit = omap_cpu_exit, 171731e0cc6SSantosh Shilimkar .name = "omap", 172d5ca1649SViresh Kumar .attr = cpufreq_generic_attr, 173731e0cc6SSantosh Shilimkar }; 174731e0cc6SSantosh Shilimkar 17549ded525SNishanth Menon static int omap_cpufreq_probe(struct platform_device *pdev) 176731e0cc6SSantosh Shilimkar { 177747a7f64SKevin Hilman mpu_dev = get_cpu_device(0); 178747a7f64SKevin Hilman if (!mpu_dev) { 179a820ffa8SNishanth Menon pr_warning("%s: unable to get the mpu device\n", __func__); 180747a7f64SKevin Hilman return -EINVAL; 181a820ffa8SNishanth Menon } 182a820ffa8SNishanth Menon 18353dfe8a8SKevin Hilman mpu_reg = regulator_get(mpu_dev, "vcc"); 18453dfe8a8SKevin Hilman if (IS_ERR(mpu_reg)) { 18553dfe8a8SKevin Hilman pr_warning("%s: unable to get MPU regulator\n", __func__); 18653dfe8a8SKevin Hilman mpu_reg = NULL; 18753dfe8a8SKevin Hilman } else { 18853dfe8a8SKevin Hilman /* 18953dfe8a8SKevin Hilman * Ensure physical regulator is present. 19053dfe8a8SKevin Hilman * (e.g. could be dummy regulator.) 19153dfe8a8SKevin Hilman */ 19253dfe8a8SKevin Hilman if (regulator_get_voltage(mpu_reg) < 0) { 19353dfe8a8SKevin Hilman pr_warn("%s: physical regulator not present for MPU\n", 19453dfe8a8SKevin Hilman __func__); 19553dfe8a8SKevin Hilman regulator_put(mpu_reg); 19653dfe8a8SKevin Hilman mpu_reg = NULL; 19753dfe8a8SKevin Hilman } 19853dfe8a8SKevin Hilman } 19953dfe8a8SKevin Hilman 200731e0cc6SSantosh Shilimkar return cpufreq_register_driver(&omap_driver); 201731e0cc6SSantosh Shilimkar } 202731e0cc6SSantosh Shilimkar 20349ded525SNishanth Menon static int omap_cpufreq_remove(struct platform_device *pdev) 204731e0cc6SSantosh Shilimkar { 20549ded525SNishanth Menon return cpufreq_unregister_driver(&omap_driver); 206731e0cc6SSantosh Shilimkar } 207731e0cc6SSantosh Shilimkar 20849ded525SNishanth Menon static struct platform_driver omap_cpufreq_platdrv = { 20949ded525SNishanth Menon .driver = { 21049ded525SNishanth Menon .name = "omap-cpufreq", 21149ded525SNishanth Menon .owner = THIS_MODULE, 21249ded525SNishanth Menon }, 21349ded525SNishanth Menon .probe = omap_cpufreq_probe, 21449ded525SNishanth Menon .remove = omap_cpufreq_remove, 21549ded525SNishanth Menon }; 21649ded525SNishanth Menon module_platform_driver(omap_cpufreq_platdrv); 21749ded525SNishanth Menon 218731e0cc6SSantosh Shilimkar MODULE_DESCRIPTION("cpufreq driver for OMAP SoCs"); 219731e0cc6SSantosh Shilimkar MODULE_LICENSE("GPL"); 220