1731e0cc6SSantosh Shilimkar /* 2ffe4f0f1SNishanth Menon * CPU frequency scaling for OMAP using OPP information 3731e0cc6SSantosh Shilimkar * 4731e0cc6SSantosh Shilimkar * Copyright (C) 2005 Nokia Corporation 5731e0cc6SSantosh Shilimkar * Written by Tony Lindgren <tony@atomide.com> 6731e0cc6SSantosh Shilimkar * 7731e0cc6SSantosh Shilimkar * Based on cpu-sa1110.c, Copyright (C) 2001 Russell King 8731e0cc6SSantosh Shilimkar * 9731e0cc6SSantosh Shilimkar * Copyright (C) 2007-2011 Texas Instruments, Inc. 10731e0cc6SSantosh Shilimkar * - OMAP3/4 support by Rajendra Nayak, Santosh Shilimkar 11731e0cc6SSantosh Shilimkar * 12731e0cc6SSantosh Shilimkar * This program is free software; you can redistribute it and/or modify 13731e0cc6SSantosh Shilimkar * it under the terms of the GNU General Public License version 2 as 14731e0cc6SSantosh Shilimkar * published by the Free Software Foundation. 15731e0cc6SSantosh Shilimkar */ 16731e0cc6SSantosh Shilimkar #include <linux/types.h> 17731e0cc6SSantosh Shilimkar #include <linux/kernel.h> 18731e0cc6SSantosh Shilimkar #include <linux/sched.h> 19731e0cc6SSantosh Shilimkar #include <linux/cpufreq.h> 20731e0cc6SSantosh Shilimkar #include <linux/delay.h> 21731e0cc6SSantosh Shilimkar #include <linux/init.h> 22731e0cc6SSantosh Shilimkar #include <linux/err.h> 23731e0cc6SSantosh Shilimkar #include <linux/clk.h> 24731e0cc6SSantosh Shilimkar #include <linux/io.h> 25731e0cc6SSantosh Shilimkar #include <linux/opp.h> 2646c12216SRussell King #include <linux/cpu.h> 27c1b547bcSKevin Hilman #include <linux/module.h> 2853dfe8a8SKevin Hilman #include <linux/regulator/consumer.h> 29731e0cc6SSantosh Shilimkar 30731e0cc6SSantosh Shilimkar #include <asm/system.h> 31731e0cc6SSantosh Shilimkar #include <asm/smp_plat.h> 3246c12216SRussell King #include <asm/cpu.h> 33731e0cc6SSantosh Shilimkar 34731e0cc6SSantosh Shilimkar #include <plat/clock.h> 35731e0cc6SSantosh Shilimkar #include <plat/omap-pm.h> 36731e0cc6SSantosh Shilimkar #include <plat/common.h> 37c1b547bcSKevin Hilman #include <plat/omap_device.h> 38731e0cc6SSantosh Shilimkar 39731e0cc6SSantosh Shilimkar #include <mach/hardware.h> 40731e0cc6SSantosh Shilimkar 41*42daffd2SAfzal Mohammed /* OPP tolerance in percentage */ 42*42daffd2SAfzal Mohammed #define OPP_TOLERANCE 4 43*42daffd2SAfzal Mohammed 4446c12216SRussell King #ifdef CONFIG_SMP 4546c12216SRussell King struct lpj_info { 4646c12216SRussell King unsigned long ref; 4746c12216SRussell King unsigned int freq; 4846c12216SRussell King }; 4946c12216SRussell King 5046c12216SRussell King static DEFINE_PER_CPU(struct lpj_info, lpj_ref); 5146c12216SRussell King static struct lpj_info global_lpj_ref; 5246c12216SRussell King #endif 5346c12216SRussell King 54731e0cc6SSantosh Shilimkar static struct cpufreq_frequency_table *freq_table; 551c78217fSNishanth Menon static atomic_t freq_table_users = ATOMIC_INIT(0); 56731e0cc6SSantosh Shilimkar static struct clk *mpu_clk; 5708ca3e3bSNishanth Menon static char *mpu_clk_name; 58a820ffa8SNishanth Menon static struct device *mpu_dev; 5953dfe8a8SKevin Hilman static struct regulator *mpu_reg; 60731e0cc6SSantosh Shilimkar 61731e0cc6SSantosh Shilimkar static int omap_verify_speed(struct cpufreq_policy *policy) 62731e0cc6SSantosh Shilimkar { 63bf2a359dSNishanth Menon if (!freq_table) 64731e0cc6SSantosh Shilimkar return -EINVAL; 65bf2a359dSNishanth Menon return cpufreq_frequency_table_verify(policy, freq_table); 66731e0cc6SSantosh Shilimkar } 67731e0cc6SSantosh Shilimkar 68731e0cc6SSantosh Shilimkar static unsigned int omap_getspeed(unsigned int cpu) 69731e0cc6SSantosh Shilimkar { 70731e0cc6SSantosh Shilimkar unsigned long rate; 71731e0cc6SSantosh Shilimkar 7246c12216SRussell King if (cpu >= NR_CPUS) 73731e0cc6SSantosh Shilimkar return 0; 74731e0cc6SSantosh Shilimkar 75731e0cc6SSantosh Shilimkar rate = clk_get_rate(mpu_clk) / 1000; 76731e0cc6SSantosh Shilimkar return rate; 77731e0cc6SSantosh Shilimkar } 78731e0cc6SSantosh Shilimkar 79731e0cc6SSantosh Shilimkar static int omap_target(struct cpufreq_policy *policy, 80731e0cc6SSantosh Shilimkar unsigned int target_freq, 81731e0cc6SSantosh Shilimkar unsigned int relation) 82731e0cc6SSantosh Shilimkar { 83bf2a359dSNishanth Menon unsigned int i; 8453dfe8a8SKevin Hilman int r, ret = 0; 85731e0cc6SSantosh Shilimkar struct cpufreq_freqs freqs; 8653dfe8a8SKevin Hilman struct opp *opp; 87*42daffd2SAfzal Mohammed unsigned long freq, volt = 0, volt_old = 0, tol = 0; 88731e0cc6SSantosh Shilimkar 89bf2a359dSNishanth Menon if (!freq_table) { 90bf2a359dSNishanth Menon dev_err(mpu_dev, "%s: cpu%d: no freq table!\n", __func__, 91bf2a359dSNishanth Menon policy->cpu); 92bf2a359dSNishanth Menon return -EINVAL; 93bf2a359dSNishanth Menon } 94bf2a359dSNishanth Menon 95bf2a359dSNishanth Menon ret = cpufreq_frequency_table_target(policy, freq_table, target_freq, 96bf2a359dSNishanth Menon relation, &i); 97bf2a359dSNishanth Menon if (ret) { 98bf2a359dSNishanth Menon dev_dbg(mpu_dev, "%s: cpu%d: no freq match for %d(ret=%d)\n", 99bf2a359dSNishanth Menon __func__, policy->cpu, target_freq, ret); 100bf2a359dSNishanth Menon return ret; 101bf2a359dSNishanth Menon } 102bf2a359dSNishanth Menon freqs.new = freq_table[i].frequency; 103bf2a359dSNishanth Menon if (!freqs.new) { 104bf2a359dSNishanth Menon dev_err(mpu_dev, "%s: cpu%d: no match for freq %d\n", __func__, 105bf2a359dSNishanth Menon policy->cpu, target_freq); 106bf2a359dSNishanth Menon return -EINVAL; 107bf2a359dSNishanth Menon } 108731e0cc6SSantosh Shilimkar 10946c12216SRussell King freqs.old = omap_getspeed(policy->cpu); 11046c12216SRussell King freqs.cpu = policy->cpu; 111731e0cc6SSantosh Shilimkar 112022ac03bSColin Cross if (freqs.old == freqs.new && policy->cur == freqs.new) 113731e0cc6SSantosh Shilimkar return ret; 114731e0cc6SSantosh Shilimkar 11546c12216SRussell King /* notifiers */ 11646c12216SRussell King for_each_cpu(i, policy->cpus) { 11746c12216SRussell King freqs.cpu = i; 118731e0cc6SSantosh Shilimkar cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); 11946c12216SRussell King } 120731e0cc6SSantosh Shilimkar 12153dfe8a8SKevin Hilman freq = freqs.new * 1000; 12253dfe8a8SKevin Hilman 12353dfe8a8SKevin Hilman if (mpu_reg) { 12453dfe8a8SKevin Hilman opp = opp_find_freq_ceil(mpu_dev, &freq); 12553dfe8a8SKevin Hilman if (IS_ERR(opp)) { 12653dfe8a8SKevin Hilman dev_err(mpu_dev, "%s: unable to find MPU OPP for %d\n", 12753dfe8a8SKevin Hilman __func__, freqs.new); 12853dfe8a8SKevin Hilman return -EINVAL; 12953dfe8a8SKevin Hilman } 13053dfe8a8SKevin Hilman volt = opp_get_voltage(opp); 131*42daffd2SAfzal Mohammed tol = volt * OPP_TOLERANCE / 100; 13253dfe8a8SKevin Hilman volt_old = regulator_get_voltage(mpu_reg); 13353dfe8a8SKevin Hilman } 13453dfe8a8SKevin Hilman 13553dfe8a8SKevin Hilman dev_dbg(mpu_dev, "cpufreq-omap: %u MHz, %ld mV --> %u MHz, %ld mV\n", 13653dfe8a8SKevin Hilman freqs.old / 1000, volt_old ? volt_old / 1000 : -1, 13753dfe8a8SKevin Hilman freqs.new / 1000, volt ? volt / 1000 : -1); 13853dfe8a8SKevin Hilman 13953dfe8a8SKevin Hilman /* scaling up? scale voltage before frequency */ 14053dfe8a8SKevin Hilman if (mpu_reg && (freqs.new > freqs.old)) { 141*42daffd2SAfzal Mohammed r = regulator_set_voltage(mpu_reg, volt - tol, volt + tol); 14253dfe8a8SKevin Hilman if (r < 0) { 14353dfe8a8SKevin Hilman dev_warn(mpu_dev, "%s: unable to scale voltage up.\n", 14453dfe8a8SKevin Hilman __func__); 14553dfe8a8SKevin Hilman freqs.new = freqs.old; 14653dfe8a8SKevin Hilman goto done; 14753dfe8a8SKevin Hilman } 14853dfe8a8SKevin Hilman } 149731e0cc6SSantosh Shilimkar 150731e0cc6SSantosh Shilimkar ret = clk_set_rate(mpu_clk, freqs.new * 1000); 151731e0cc6SSantosh Shilimkar 15253dfe8a8SKevin Hilman /* scaling down? scale voltage after frequency */ 15353dfe8a8SKevin Hilman if (mpu_reg && (freqs.new < freqs.old)) { 154*42daffd2SAfzal Mohammed r = regulator_set_voltage(mpu_reg, volt - tol, volt + tol); 15553dfe8a8SKevin Hilman if (r < 0) { 15653dfe8a8SKevin Hilman dev_warn(mpu_dev, "%s: unable to scale voltage down.\n", 15753dfe8a8SKevin Hilman __func__); 15853dfe8a8SKevin Hilman ret = clk_set_rate(mpu_clk, freqs.old * 1000); 15953dfe8a8SKevin Hilman freqs.new = freqs.old; 16053dfe8a8SKevin Hilman goto done; 16153dfe8a8SKevin Hilman } 16253dfe8a8SKevin Hilman } 16353dfe8a8SKevin Hilman 16453dfe8a8SKevin Hilman freqs.new = omap_getspeed(policy->cpu); 16546c12216SRussell King #ifdef CONFIG_SMP 16646c12216SRussell King /* 16746c12216SRussell King * Note that loops_per_jiffy is not updated on SMP systems in 16846c12216SRussell King * cpufreq driver. So, update the per-CPU loops_per_jiffy value 16946c12216SRussell King * on frequency transition. We need to update all dependent CPUs. 17046c12216SRussell King */ 17146c12216SRussell King for_each_cpu(i, policy->cpus) { 17246c12216SRussell King struct lpj_info *lpj = &per_cpu(lpj_ref, i); 17346c12216SRussell King if (!lpj->freq) { 17446c12216SRussell King lpj->ref = per_cpu(cpu_data, i).loops_per_jiffy; 17546c12216SRussell King lpj->freq = freqs.old; 17646c12216SRussell King } 17746c12216SRussell King 17846c12216SRussell King per_cpu(cpu_data, i).loops_per_jiffy = 17946c12216SRussell King cpufreq_scale(lpj->ref, lpj->freq, freqs.new); 18046c12216SRussell King } 18146c12216SRussell King 18246c12216SRussell King /* And don't forget to adjust the global one */ 18346c12216SRussell King if (!global_lpj_ref.freq) { 18446c12216SRussell King global_lpj_ref.ref = loops_per_jiffy; 18546c12216SRussell King global_lpj_ref.freq = freqs.old; 18646c12216SRussell King } 18746c12216SRussell King loops_per_jiffy = cpufreq_scale(global_lpj_ref.ref, global_lpj_ref.freq, 18846c12216SRussell King freqs.new); 18946c12216SRussell King #endif 19046c12216SRussell King 19153dfe8a8SKevin Hilman done: 19246c12216SRussell King /* notifiers */ 19346c12216SRussell King for_each_cpu(i, policy->cpus) { 19446c12216SRussell King freqs.cpu = i; 195731e0cc6SSantosh Shilimkar cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); 19646c12216SRussell King } 197731e0cc6SSantosh Shilimkar 198731e0cc6SSantosh Shilimkar return ret; 199731e0cc6SSantosh Shilimkar } 200731e0cc6SSantosh Shilimkar 2011c78217fSNishanth Menon static inline void freq_table_free(void) 2021c78217fSNishanth Menon { 2031c78217fSNishanth Menon if (atomic_dec_and_test(&freq_table_users)) 2041c78217fSNishanth Menon opp_free_cpufreq_table(mpu_dev, &freq_table); 2051c78217fSNishanth Menon } 2061c78217fSNishanth Menon 207731e0cc6SSantosh Shilimkar static int __cpuinit omap_cpu_init(struct cpufreq_policy *policy) 208731e0cc6SSantosh Shilimkar { 209731e0cc6SSantosh Shilimkar int result = 0; 210731e0cc6SSantosh Shilimkar 21108ca3e3bSNishanth Menon mpu_clk = clk_get(NULL, mpu_clk_name); 212731e0cc6SSantosh Shilimkar if (IS_ERR(mpu_clk)) 213731e0cc6SSantosh Shilimkar return PTR_ERR(mpu_clk); 214731e0cc6SSantosh Shilimkar 21511e04fddSNishanth Menon if (policy->cpu >= NR_CPUS) { 21611e04fddSNishanth Menon result = -EINVAL; 21711e04fddSNishanth Menon goto fail_ck; 21811e04fddSNishanth Menon } 219731e0cc6SSantosh Shilimkar 22046c12216SRussell King policy->cur = policy->min = policy->max = omap_getspeed(policy->cpu); 2211c78217fSNishanth Menon 2221c78217fSNishanth Menon if (atomic_inc_return(&freq_table_users) == 1) 223bf2a359dSNishanth Menon result = opp_init_cpufreq_table(mpu_dev, &freq_table); 224731e0cc6SSantosh Shilimkar 225bf2a359dSNishanth Menon if (result) { 226bf2a359dSNishanth Menon dev_err(mpu_dev, "%s: cpu%d: failed creating freq table[%d]\n", 227bf2a359dSNishanth Menon __func__, policy->cpu, result); 22811e04fddSNishanth Menon goto fail_ck; 229bf2a359dSNishanth Menon } 230bf2a359dSNishanth Menon 231731e0cc6SSantosh Shilimkar result = cpufreq_frequency_table_cpuinfo(policy, freq_table); 2321c78217fSNishanth Menon if (result) 2331c78217fSNishanth Menon goto fail_table; 2341c78217fSNishanth Menon 235bf2a359dSNishanth Menon cpufreq_frequency_table_get_attr(freq_table, policy->cpu); 236731e0cc6SSantosh Shilimkar 237731e0cc6SSantosh Shilimkar policy->min = policy->cpuinfo.min_freq; 238731e0cc6SSantosh Shilimkar policy->max = policy->cpuinfo.max_freq; 23946c12216SRussell King policy->cur = omap_getspeed(policy->cpu); 24046c12216SRussell King 24146c12216SRussell King /* 24246c12216SRussell King * On OMAP SMP configuartion, both processors share the voltage 24346c12216SRussell King * and clock. So both CPUs needs to be scaled together and hence 24446c12216SRussell King * needs software co-ordination. Use cpufreq affected_cpus 24546c12216SRussell King * interface to handle this scenario. Additional is_smp() check 24646c12216SRussell King * is to keep SMP_ON_UP build working. 24746c12216SRussell King */ 24846c12216SRussell King if (is_smp()) { 24946c12216SRussell King policy->shared_type = CPUFREQ_SHARED_TYPE_ANY; 250ed8ce00cSTodd Poynor cpumask_setall(policy->cpus); 25146c12216SRussell King } 252731e0cc6SSantosh Shilimkar 253731e0cc6SSantosh Shilimkar /* FIXME: what's the actual transition time? */ 254731e0cc6SSantosh Shilimkar policy->cpuinfo.transition_latency = 300 * 1000; 255731e0cc6SSantosh Shilimkar 256731e0cc6SSantosh Shilimkar return 0; 25711e04fddSNishanth Menon 2581c78217fSNishanth Menon fail_table: 2591c78217fSNishanth Menon freq_table_free(); 26011e04fddSNishanth Menon fail_ck: 26111e04fddSNishanth Menon clk_put(mpu_clk); 26211e04fddSNishanth Menon return result; 263731e0cc6SSantosh Shilimkar } 264731e0cc6SSantosh Shilimkar 265731e0cc6SSantosh Shilimkar static int omap_cpu_exit(struct cpufreq_policy *policy) 266731e0cc6SSantosh Shilimkar { 2671c78217fSNishanth Menon freq_table_free(); 268731e0cc6SSantosh Shilimkar clk_put(mpu_clk); 269731e0cc6SSantosh Shilimkar return 0; 270731e0cc6SSantosh Shilimkar } 271731e0cc6SSantosh Shilimkar 272731e0cc6SSantosh Shilimkar static struct freq_attr *omap_cpufreq_attr[] = { 273731e0cc6SSantosh Shilimkar &cpufreq_freq_attr_scaling_available_freqs, 274731e0cc6SSantosh Shilimkar NULL, 275731e0cc6SSantosh Shilimkar }; 276731e0cc6SSantosh Shilimkar 277731e0cc6SSantosh Shilimkar static struct cpufreq_driver omap_driver = { 278731e0cc6SSantosh Shilimkar .flags = CPUFREQ_STICKY, 279731e0cc6SSantosh Shilimkar .verify = omap_verify_speed, 280731e0cc6SSantosh Shilimkar .target = omap_target, 281731e0cc6SSantosh Shilimkar .get = omap_getspeed, 282731e0cc6SSantosh Shilimkar .init = omap_cpu_init, 283731e0cc6SSantosh Shilimkar .exit = omap_cpu_exit, 284731e0cc6SSantosh Shilimkar .name = "omap", 285731e0cc6SSantosh Shilimkar .attr = omap_cpufreq_attr, 286731e0cc6SSantosh Shilimkar }; 287731e0cc6SSantosh Shilimkar 288731e0cc6SSantosh Shilimkar static int __init omap_cpufreq_init(void) 289731e0cc6SSantosh Shilimkar { 29008ca3e3bSNishanth Menon if (cpu_is_omap24xx()) 29108ca3e3bSNishanth Menon mpu_clk_name = "virt_prcm_set"; 29208ca3e3bSNishanth Menon else if (cpu_is_omap34xx()) 29308ca3e3bSNishanth Menon mpu_clk_name = "dpll1_ck"; 29408ca3e3bSNishanth Menon else if (cpu_is_omap44xx()) 29508ca3e3bSNishanth Menon mpu_clk_name = "dpll_mpu_ck"; 29608ca3e3bSNishanth Menon 29708ca3e3bSNishanth Menon if (!mpu_clk_name) { 29808ca3e3bSNishanth Menon pr_err("%s: unsupported Silicon?\n", __func__); 29908ca3e3bSNishanth Menon return -EINVAL; 30008ca3e3bSNishanth Menon } 301a820ffa8SNishanth Menon 302c1b547bcSKevin Hilman mpu_dev = omap_device_get_by_hwmod_name("mpu"); 303a820ffa8SNishanth Menon if (!mpu_dev) { 304a820ffa8SNishanth Menon pr_warning("%s: unable to get the mpu device\n", __func__); 305a820ffa8SNishanth Menon return -EINVAL; 306a820ffa8SNishanth Menon } 307a820ffa8SNishanth Menon 30853dfe8a8SKevin Hilman mpu_reg = regulator_get(mpu_dev, "vcc"); 30953dfe8a8SKevin Hilman if (IS_ERR(mpu_reg)) { 31053dfe8a8SKevin Hilman pr_warning("%s: unable to get MPU regulator\n", __func__); 31153dfe8a8SKevin Hilman mpu_reg = NULL; 31253dfe8a8SKevin Hilman } else { 31353dfe8a8SKevin Hilman /* 31453dfe8a8SKevin Hilman * Ensure physical regulator is present. 31553dfe8a8SKevin Hilman * (e.g. could be dummy regulator.) 31653dfe8a8SKevin Hilman */ 31753dfe8a8SKevin Hilman if (regulator_get_voltage(mpu_reg) < 0) { 31853dfe8a8SKevin Hilman pr_warn("%s: physical regulator not present for MPU\n", 31953dfe8a8SKevin Hilman __func__); 32053dfe8a8SKevin Hilman regulator_put(mpu_reg); 32153dfe8a8SKevin Hilman mpu_reg = NULL; 32253dfe8a8SKevin Hilman } 32353dfe8a8SKevin Hilman } 32453dfe8a8SKevin Hilman 325731e0cc6SSantosh Shilimkar return cpufreq_register_driver(&omap_driver); 326731e0cc6SSantosh Shilimkar } 327731e0cc6SSantosh Shilimkar 328731e0cc6SSantosh Shilimkar static void __exit omap_cpufreq_exit(void) 329731e0cc6SSantosh Shilimkar { 330731e0cc6SSantosh Shilimkar cpufreq_unregister_driver(&omap_driver); 331731e0cc6SSantosh Shilimkar } 332731e0cc6SSantosh Shilimkar 333731e0cc6SSantosh Shilimkar MODULE_DESCRIPTION("cpufreq driver for OMAP SoCs"); 334731e0cc6SSantosh Shilimkar MODULE_LICENSE("GPL"); 335731e0cc6SSantosh Shilimkar module_init(omap_cpufreq_init); 336731e0cc6SSantosh Shilimkar module_exit(omap_cpufreq_exit); 337