1731e0cc6SSantosh Shilimkar /* 2ffe4f0f1SNishanth Menon * CPU frequency scaling for OMAP using OPP information 3731e0cc6SSantosh Shilimkar * 4731e0cc6SSantosh Shilimkar * Copyright (C) 2005 Nokia Corporation 5731e0cc6SSantosh Shilimkar * Written by Tony Lindgren <tony@atomide.com> 6731e0cc6SSantosh Shilimkar * 7731e0cc6SSantosh Shilimkar * Based on cpu-sa1110.c, Copyright (C) 2001 Russell King 8731e0cc6SSantosh Shilimkar * 9731e0cc6SSantosh Shilimkar * Copyright (C) 2007-2011 Texas Instruments, Inc. 10731e0cc6SSantosh Shilimkar * - OMAP3/4 support by Rajendra Nayak, Santosh Shilimkar 11731e0cc6SSantosh Shilimkar * 12731e0cc6SSantosh Shilimkar * This program is free software; you can redistribute it and/or modify 13731e0cc6SSantosh Shilimkar * it under the terms of the GNU General Public License version 2 as 14731e0cc6SSantosh Shilimkar * published by the Free Software Foundation. 15731e0cc6SSantosh Shilimkar */ 16731e0cc6SSantosh Shilimkar #include <linux/types.h> 17731e0cc6SSantosh Shilimkar #include <linux/kernel.h> 18731e0cc6SSantosh Shilimkar #include <linux/sched.h> 19731e0cc6SSantosh Shilimkar #include <linux/cpufreq.h> 20731e0cc6SSantosh Shilimkar #include <linux/delay.h> 21731e0cc6SSantosh Shilimkar #include <linux/init.h> 22731e0cc6SSantosh Shilimkar #include <linux/err.h> 23731e0cc6SSantosh Shilimkar #include <linux/clk.h> 24731e0cc6SSantosh Shilimkar #include <linux/io.h> 25731e0cc6SSantosh Shilimkar #include <linux/opp.h> 2646c12216SRussell King #include <linux/cpu.h> 27c1b547bcSKevin Hilman #include <linux/module.h> 2849ded525SNishanth Menon #include <linux/platform_device.h> 2953dfe8a8SKevin Hilman #include <linux/regulator/consumer.h> 30731e0cc6SSantosh Shilimkar 31731e0cc6SSantosh Shilimkar #include <asm/smp_plat.h> 3246c12216SRussell King #include <asm/cpu.h> 33731e0cc6SSantosh Shilimkar 3442daffd2SAfzal Mohammed /* OPP tolerance in percentage */ 3542daffd2SAfzal Mohammed #define OPP_TOLERANCE 4 3642daffd2SAfzal Mohammed 37731e0cc6SSantosh Shilimkar static struct cpufreq_frequency_table *freq_table; 381c78217fSNishanth Menon static atomic_t freq_table_users = ATOMIC_INIT(0); 39731e0cc6SSantosh Shilimkar static struct clk *mpu_clk; 40a820ffa8SNishanth Menon static struct device *mpu_dev; 4153dfe8a8SKevin Hilman static struct regulator *mpu_reg; 42731e0cc6SSantosh Shilimkar 43731e0cc6SSantosh Shilimkar static int omap_verify_speed(struct cpufreq_policy *policy) 44731e0cc6SSantosh Shilimkar { 45bf2a359dSNishanth Menon if (!freq_table) 46731e0cc6SSantosh Shilimkar return -EINVAL; 47bf2a359dSNishanth Menon return cpufreq_frequency_table_verify(policy, freq_table); 48731e0cc6SSantosh Shilimkar } 49731e0cc6SSantosh Shilimkar 50731e0cc6SSantosh Shilimkar static unsigned int omap_getspeed(unsigned int cpu) 51731e0cc6SSantosh Shilimkar { 52731e0cc6SSantosh Shilimkar unsigned long rate; 53731e0cc6SSantosh Shilimkar 5446c12216SRussell King if (cpu >= NR_CPUS) 55731e0cc6SSantosh Shilimkar return 0; 56731e0cc6SSantosh Shilimkar 57731e0cc6SSantosh Shilimkar rate = clk_get_rate(mpu_clk) / 1000; 58731e0cc6SSantosh Shilimkar return rate; 59731e0cc6SSantosh Shilimkar } 60731e0cc6SSantosh Shilimkar 61731e0cc6SSantosh Shilimkar static int omap_target(struct cpufreq_policy *policy, 62731e0cc6SSantosh Shilimkar unsigned int target_freq, 63731e0cc6SSantosh Shilimkar unsigned int relation) 64731e0cc6SSantosh Shilimkar { 65bf2a359dSNishanth Menon unsigned int i; 6653dfe8a8SKevin Hilman int r, ret = 0; 67731e0cc6SSantosh Shilimkar struct cpufreq_freqs freqs; 6853dfe8a8SKevin Hilman struct opp *opp; 6942daffd2SAfzal Mohammed unsigned long freq, volt = 0, volt_old = 0, tol = 0; 70731e0cc6SSantosh Shilimkar 71bf2a359dSNishanth Menon if (!freq_table) { 72bf2a359dSNishanth Menon dev_err(mpu_dev, "%s: cpu%d: no freq table!\n", __func__, 73bf2a359dSNishanth Menon policy->cpu); 74bf2a359dSNishanth Menon return -EINVAL; 75bf2a359dSNishanth Menon } 76bf2a359dSNishanth Menon 77bf2a359dSNishanth Menon ret = cpufreq_frequency_table_target(policy, freq_table, target_freq, 78bf2a359dSNishanth Menon relation, &i); 79bf2a359dSNishanth Menon if (ret) { 80bf2a359dSNishanth Menon dev_dbg(mpu_dev, "%s: cpu%d: no freq match for %d(ret=%d)\n", 81bf2a359dSNishanth Menon __func__, policy->cpu, target_freq, ret); 82bf2a359dSNishanth Menon return ret; 83bf2a359dSNishanth Menon } 84bf2a359dSNishanth Menon freqs.new = freq_table[i].frequency; 85bf2a359dSNishanth Menon if (!freqs.new) { 86bf2a359dSNishanth Menon dev_err(mpu_dev, "%s: cpu%d: no match for freq %d\n", __func__, 87bf2a359dSNishanth Menon policy->cpu, target_freq); 88bf2a359dSNishanth Menon return -EINVAL; 89bf2a359dSNishanth Menon } 90731e0cc6SSantosh Shilimkar 9146c12216SRussell King freqs.old = omap_getspeed(policy->cpu); 92731e0cc6SSantosh Shilimkar 93022ac03bSColin Cross if (freqs.old == freqs.new && policy->cur == freqs.new) 94731e0cc6SSantosh Shilimkar return ret; 95731e0cc6SSantosh Shilimkar 9653dfe8a8SKevin Hilman freq = freqs.new * 1000; 978df0a663SKevin Hilman ret = clk_round_rate(mpu_clk, freq); 988df0a663SKevin Hilman if (IS_ERR_VALUE(ret)) { 998df0a663SKevin Hilman dev_warn(mpu_dev, 1008df0a663SKevin Hilman "CPUfreq: Cannot find matching frequency for %lu\n", 1018df0a663SKevin Hilman freq); 1028df0a663SKevin Hilman return ret; 1038df0a663SKevin Hilman } 1048df0a663SKevin Hilman freq = ret; 10553dfe8a8SKevin Hilman 10653dfe8a8SKevin Hilman if (mpu_reg) { 107f44d188aSNishanth Menon rcu_read_lock(); 10853dfe8a8SKevin Hilman opp = opp_find_freq_ceil(mpu_dev, &freq); 10953dfe8a8SKevin Hilman if (IS_ERR(opp)) { 110f44d188aSNishanth Menon rcu_read_unlock(); 11153dfe8a8SKevin Hilman dev_err(mpu_dev, "%s: unable to find MPU OPP for %d\n", 11253dfe8a8SKevin Hilman __func__, freqs.new); 11353dfe8a8SKevin Hilman return -EINVAL; 11453dfe8a8SKevin Hilman } 11553dfe8a8SKevin Hilman volt = opp_get_voltage(opp); 116f44d188aSNishanth Menon rcu_read_unlock(); 11742daffd2SAfzal Mohammed tol = volt * OPP_TOLERANCE / 100; 11853dfe8a8SKevin Hilman volt_old = regulator_get_voltage(mpu_reg); 11953dfe8a8SKevin Hilman } 12053dfe8a8SKevin Hilman 12153dfe8a8SKevin Hilman dev_dbg(mpu_dev, "cpufreq-omap: %u MHz, %ld mV --> %u MHz, %ld mV\n", 12253dfe8a8SKevin Hilman freqs.old / 1000, volt_old ? volt_old / 1000 : -1, 12353dfe8a8SKevin Hilman freqs.new / 1000, volt ? volt / 1000 : -1); 12453dfe8a8SKevin Hilman 12544a49a23SViresh Kumar /* notifiers */ 12644a49a23SViresh Kumar cpufreq_notify_transition(policy, &freqs, CPUFREQ_PRECHANGE); 12744a49a23SViresh Kumar 12853dfe8a8SKevin Hilman /* scaling up? scale voltage before frequency */ 12953dfe8a8SKevin Hilman if (mpu_reg && (freqs.new > freqs.old)) { 13042daffd2SAfzal Mohammed r = regulator_set_voltage(mpu_reg, volt - tol, volt + tol); 13153dfe8a8SKevin Hilman if (r < 0) { 13253dfe8a8SKevin Hilman dev_warn(mpu_dev, "%s: unable to scale voltage up.\n", 13353dfe8a8SKevin Hilman __func__); 13453dfe8a8SKevin Hilman freqs.new = freqs.old; 13553dfe8a8SKevin Hilman goto done; 13653dfe8a8SKevin Hilman } 13753dfe8a8SKevin Hilman } 138731e0cc6SSantosh Shilimkar 139731e0cc6SSantosh Shilimkar ret = clk_set_rate(mpu_clk, freqs.new * 1000); 140731e0cc6SSantosh Shilimkar 14153dfe8a8SKevin Hilman /* scaling down? scale voltage after frequency */ 14253dfe8a8SKevin Hilman if (mpu_reg && (freqs.new < freqs.old)) { 14342daffd2SAfzal Mohammed r = regulator_set_voltage(mpu_reg, volt - tol, volt + tol); 14453dfe8a8SKevin Hilman if (r < 0) { 14553dfe8a8SKevin Hilman dev_warn(mpu_dev, "%s: unable to scale voltage down.\n", 14653dfe8a8SKevin Hilman __func__); 14753dfe8a8SKevin Hilman ret = clk_set_rate(mpu_clk, freqs.old * 1000); 14853dfe8a8SKevin Hilman freqs.new = freqs.old; 14953dfe8a8SKevin Hilman goto done; 15053dfe8a8SKevin Hilman } 15153dfe8a8SKevin Hilman } 15253dfe8a8SKevin Hilman 15353dfe8a8SKevin Hilman freqs.new = omap_getspeed(policy->cpu); 15446c12216SRussell King 15553dfe8a8SKevin Hilman done: 15646c12216SRussell King /* notifiers */ 157b43a7ffbSViresh Kumar cpufreq_notify_transition(policy, &freqs, CPUFREQ_POSTCHANGE); 158731e0cc6SSantosh Shilimkar 159731e0cc6SSantosh Shilimkar return ret; 160731e0cc6SSantosh Shilimkar } 161731e0cc6SSantosh Shilimkar 1621c78217fSNishanth Menon static inline void freq_table_free(void) 1631c78217fSNishanth Menon { 1641c78217fSNishanth Menon if (atomic_dec_and_test(&freq_table_users)) 1651c78217fSNishanth Menon opp_free_cpufreq_table(mpu_dev, &freq_table); 1661c78217fSNishanth Menon } 1671c78217fSNishanth Menon 168*2760984fSPaul Gortmaker static int omap_cpu_init(struct cpufreq_policy *policy) 169731e0cc6SSantosh Shilimkar { 170731e0cc6SSantosh Shilimkar int result = 0; 171731e0cc6SSantosh Shilimkar 172e2ee1b4dSPaul Walmsley mpu_clk = clk_get(NULL, "cpufreq_ck"); 173731e0cc6SSantosh Shilimkar if (IS_ERR(mpu_clk)) 174731e0cc6SSantosh Shilimkar return PTR_ERR(mpu_clk); 175731e0cc6SSantosh Shilimkar 17611e04fddSNishanth Menon if (policy->cpu >= NR_CPUS) { 17711e04fddSNishanth Menon result = -EINVAL; 17811e04fddSNishanth Menon goto fail_ck; 17911e04fddSNishanth Menon } 180731e0cc6SSantosh Shilimkar 181eb2f50ffSViresh Kumar policy->cur = omap_getspeed(policy->cpu); 1821c78217fSNishanth Menon 1831b865214SRajendra Nayak if (!freq_table) 184bf2a359dSNishanth Menon result = opp_init_cpufreq_table(mpu_dev, &freq_table); 185731e0cc6SSantosh Shilimkar 186bf2a359dSNishanth Menon if (result) { 187bf2a359dSNishanth Menon dev_err(mpu_dev, "%s: cpu%d: failed creating freq table[%d]\n", 188bf2a359dSNishanth Menon __func__, policy->cpu, result); 18911e04fddSNishanth Menon goto fail_ck; 190bf2a359dSNishanth Menon } 191bf2a359dSNishanth Menon 1921b865214SRajendra Nayak atomic_inc_return(&freq_table_users); 1931b865214SRajendra Nayak 194731e0cc6SSantosh Shilimkar result = cpufreq_frequency_table_cpuinfo(policy, freq_table); 1951c78217fSNishanth Menon if (result) 1961c78217fSNishanth Menon goto fail_table; 1971c78217fSNishanth Menon 198bf2a359dSNishanth Menon cpufreq_frequency_table_get_attr(freq_table, policy->cpu); 199731e0cc6SSantosh Shilimkar 20046c12216SRussell King policy->cur = omap_getspeed(policy->cpu); 20146c12216SRussell King 20246c12216SRussell King /* 20346c12216SRussell King * On OMAP SMP configuartion, both processors share the voltage 20446c12216SRussell King * and clock. So both CPUs needs to be scaled together and hence 20546c12216SRussell King * needs software co-ordination. Use cpufreq affected_cpus 20646c12216SRussell King * interface to handle this scenario. Additional is_smp() check 20746c12216SRussell King * is to keep SMP_ON_UP build working. 20846c12216SRussell King */ 20962b36cc1SViresh Kumar if (is_smp()) 210ed8ce00cSTodd Poynor cpumask_setall(policy->cpus); 211731e0cc6SSantosh Shilimkar 212731e0cc6SSantosh Shilimkar /* FIXME: what's the actual transition time? */ 213731e0cc6SSantosh Shilimkar policy->cpuinfo.transition_latency = 300 * 1000; 214731e0cc6SSantosh Shilimkar 215731e0cc6SSantosh Shilimkar return 0; 21611e04fddSNishanth Menon 2171c78217fSNishanth Menon fail_table: 2181c78217fSNishanth Menon freq_table_free(); 21911e04fddSNishanth Menon fail_ck: 22011e04fddSNishanth Menon clk_put(mpu_clk); 22111e04fddSNishanth Menon return result; 222731e0cc6SSantosh Shilimkar } 223731e0cc6SSantosh Shilimkar 224731e0cc6SSantosh Shilimkar static int omap_cpu_exit(struct cpufreq_policy *policy) 225731e0cc6SSantosh Shilimkar { 2261c78217fSNishanth Menon freq_table_free(); 227731e0cc6SSantosh Shilimkar clk_put(mpu_clk); 228731e0cc6SSantosh Shilimkar return 0; 229731e0cc6SSantosh Shilimkar } 230731e0cc6SSantosh Shilimkar 231731e0cc6SSantosh Shilimkar static struct freq_attr *omap_cpufreq_attr[] = { 232731e0cc6SSantosh Shilimkar &cpufreq_freq_attr_scaling_available_freqs, 233731e0cc6SSantosh Shilimkar NULL, 234731e0cc6SSantosh Shilimkar }; 235731e0cc6SSantosh Shilimkar 236731e0cc6SSantosh Shilimkar static struct cpufreq_driver omap_driver = { 237731e0cc6SSantosh Shilimkar .flags = CPUFREQ_STICKY, 238731e0cc6SSantosh Shilimkar .verify = omap_verify_speed, 239731e0cc6SSantosh Shilimkar .target = omap_target, 240731e0cc6SSantosh Shilimkar .get = omap_getspeed, 241731e0cc6SSantosh Shilimkar .init = omap_cpu_init, 242731e0cc6SSantosh Shilimkar .exit = omap_cpu_exit, 243731e0cc6SSantosh Shilimkar .name = "omap", 244731e0cc6SSantosh Shilimkar .attr = omap_cpufreq_attr, 245731e0cc6SSantosh Shilimkar }; 246731e0cc6SSantosh Shilimkar 24749ded525SNishanth Menon static int omap_cpufreq_probe(struct platform_device *pdev) 248731e0cc6SSantosh Shilimkar { 249747a7f64SKevin Hilman mpu_dev = get_cpu_device(0); 250747a7f64SKevin Hilman if (!mpu_dev) { 251a820ffa8SNishanth Menon pr_warning("%s: unable to get the mpu device\n", __func__); 252747a7f64SKevin Hilman return -EINVAL; 253a820ffa8SNishanth Menon } 254a820ffa8SNishanth Menon 25553dfe8a8SKevin Hilman mpu_reg = regulator_get(mpu_dev, "vcc"); 25653dfe8a8SKevin Hilman if (IS_ERR(mpu_reg)) { 25753dfe8a8SKevin Hilman pr_warning("%s: unable to get MPU regulator\n", __func__); 25853dfe8a8SKevin Hilman mpu_reg = NULL; 25953dfe8a8SKevin Hilman } else { 26053dfe8a8SKevin Hilman /* 26153dfe8a8SKevin Hilman * Ensure physical regulator is present. 26253dfe8a8SKevin Hilman * (e.g. could be dummy regulator.) 26353dfe8a8SKevin Hilman */ 26453dfe8a8SKevin Hilman if (regulator_get_voltage(mpu_reg) < 0) { 26553dfe8a8SKevin Hilman pr_warn("%s: physical regulator not present for MPU\n", 26653dfe8a8SKevin Hilman __func__); 26753dfe8a8SKevin Hilman regulator_put(mpu_reg); 26853dfe8a8SKevin Hilman mpu_reg = NULL; 26953dfe8a8SKevin Hilman } 27053dfe8a8SKevin Hilman } 27153dfe8a8SKevin Hilman 272731e0cc6SSantosh Shilimkar return cpufreq_register_driver(&omap_driver); 273731e0cc6SSantosh Shilimkar } 274731e0cc6SSantosh Shilimkar 27549ded525SNishanth Menon static int omap_cpufreq_remove(struct platform_device *pdev) 276731e0cc6SSantosh Shilimkar { 27749ded525SNishanth Menon return cpufreq_unregister_driver(&omap_driver); 278731e0cc6SSantosh Shilimkar } 279731e0cc6SSantosh Shilimkar 28049ded525SNishanth Menon static struct platform_driver omap_cpufreq_platdrv = { 28149ded525SNishanth Menon .driver = { 28249ded525SNishanth Menon .name = "omap-cpufreq", 28349ded525SNishanth Menon .owner = THIS_MODULE, 28449ded525SNishanth Menon }, 28549ded525SNishanth Menon .probe = omap_cpufreq_probe, 28649ded525SNishanth Menon .remove = omap_cpufreq_remove, 28749ded525SNishanth Menon }; 28849ded525SNishanth Menon module_platform_driver(omap_cpufreq_platdrv); 28949ded525SNishanth Menon 290731e0cc6SSantosh Shilimkar MODULE_DESCRIPTION("cpufreq driver for OMAP SoCs"); 291731e0cc6SSantosh Shilimkar MODULE_LICENSE("GPL"); 292