1d2912cb1SThomas Gleixner // SPDX-License-Identifier: GPL-2.0-only
2731e0cc6SSantosh Shilimkar /*
3ffe4f0f1SNishanth Menon * CPU frequency scaling for OMAP using OPP information
4731e0cc6SSantosh Shilimkar *
5731e0cc6SSantosh Shilimkar * Copyright (C) 2005 Nokia Corporation
6731e0cc6SSantosh Shilimkar * Written by Tony Lindgren <tony@atomide.com>
7731e0cc6SSantosh Shilimkar *
8731e0cc6SSantosh Shilimkar * Based on cpu-sa1110.c, Copyright (C) 2001 Russell King
9731e0cc6SSantosh Shilimkar *
10731e0cc6SSantosh Shilimkar * Copyright (C) 2007-2011 Texas Instruments, Inc.
11731e0cc6SSantosh Shilimkar * - OMAP3/4 support by Rajendra Nayak, Santosh Shilimkar
12731e0cc6SSantosh Shilimkar */
131c5864e2SJoe Perches
141c5864e2SJoe Perches #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
151c5864e2SJoe Perches
16731e0cc6SSantosh Shilimkar #include <linux/types.h>
17731e0cc6SSantosh Shilimkar #include <linux/kernel.h>
18731e0cc6SSantosh Shilimkar #include <linux/sched.h>
19731e0cc6SSantosh Shilimkar #include <linux/cpufreq.h>
20731e0cc6SSantosh Shilimkar #include <linux/delay.h>
21731e0cc6SSantosh Shilimkar #include <linux/init.h>
22731e0cc6SSantosh Shilimkar #include <linux/err.h>
23731e0cc6SSantosh Shilimkar #include <linux/clk.h>
24731e0cc6SSantosh Shilimkar #include <linux/io.h>
25e4db1c74SNishanth Menon #include <linux/pm_opp.h>
2646c12216SRussell King #include <linux/cpu.h>
27c1b547bcSKevin Hilman #include <linux/module.h>
2849ded525SNishanth Menon #include <linux/platform_device.h>
2953dfe8a8SKevin Hilman #include <linux/regulator/consumer.h>
30731e0cc6SSantosh Shilimkar
31731e0cc6SSantosh Shilimkar #include <asm/smp_plat.h>
3246c12216SRussell King #include <asm/cpu.h>
33731e0cc6SSantosh Shilimkar
3442daffd2SAfzal Mohammed /* OPP tolerance in percentage */
3542daffd2SAfzal Mohammed #define OPP_TOLERANCE 4
3642daffd2SAfzal Mohammed
37731e0cc6SSantosh Shilimkar static struct cpufreq_frequency_table *freq_table;
381c78217fSNishanth Menon static atomic_t freq_table_users = ATOMIC_INIT(0);
39a820ffa8SNishanth Menon static struct device *mpu_dev;
4053dfe8a8SKevin Hilman static struct regulator *mpu_reg;
41731e0cc6SSantosh Shilimkar
omap_target(struct cpufreq_policy * policy,unsigned int index)429c0ebcf7SViresh Kumar static int omap_target(struct cpufreq_policy *policy, unsigned int index)
43731e0cc6SSantosh Shilimkar {
44696d0b2cSviresh kumar int r, ret;
4547d43ba7SNishanth Menon struct dev_pm_opp *opp;
4642daffd2SAfzal Mohammed unsigned long freq, volt = 0, volt_old = 0, tol = 0;
47d4019f0aSViresh Kumar unsigned int old_freq, new_freq;
48731e0cc6SSantosh Shilimkar
49652ed95dSViresh Kumar old_freq = policy->cur;
50d4019f0aSViresh Kumar new_freq = freq_table[index].frequency;
51731e0cc6SSantosh Shilimkar
52d4019f0aSViresh Kumar freq = new_freq * 1000;
53652ed95dSViresh Kumar ret = clk_round_rate(policy->clk, freq);
54287980e4SArnd Bergmann if (ret < 0) {
558df0a663SKevin Hilman dev_warn(mpu_dev,
568df0a663SKevin Hilman "CPUfreq: Cannot find matching frequency for %lu\n",
578df0a663SKevin Hilman freq);
588df0a663SKevin Hilman return ret;
598df0a663SKevin Hilman }
608df0a663SKevin Hilman freq = ret;
6153dfe8a8SKevin Hilman
6253dfe8a8SKevin Hilman if (mpu_reg) {
635d4879cdSNishanth Menon opp = dev_pm_opp_find_freq_ceil(mpu_dev, &freq);
6453dfe8a8SKevin Hilman if (IS_ERR(opp)) {
6553dfe8a8SKevin Hilman dev_err(mpu_dev, "%s: unable to find MPU OPP for %d\n",
66d4019f0aSViresh Kumar __func__, new_freq);
6753dfe8a8SKevin Hilman return -EINVAL;
6853dfe8a8SKevin Hilman }
695d4879cdSNishanth Menon volt = dev_pm_opp_get_voltage(opp);
708a31d9d9SViresh Kumar dev_pm_opp_put(opp);
7142daffd2SAfzal Mohammed tol = volt * OPP_TOLERANCE / 100;
7253dfe8a8SKevin Hilman volt_old = regulator_get_voltage(mpu_reg);
7353dfe8a8SKevin Hilman }
7453dfe8a8SKevin Hilman
7553dfe8a8SKevin Hilman dev_dbg(mpu_dev, "cpufreq-omap: %u MHz, %ld mV --> %u MHz, %ld mV\n",
76d4019f0aSViresh Kumar old_freq / 1000, volt_old ? volt_old / 1000 : -1,
77d4019f0aSViresh Kumar new_freq / 1000, volt ? volt / 1000 : -1);
7844a49a23SViresh Kumar
7953dfe8a8SKevin Hilman /* scaling up? scale voltage before frequency */
80d4019f0aSViresh Kumar if (mpu_reg && (new_freq > old_freq)) {
8142daffd2SAfzal Mohammed r = regulator_set_voltage(mpu_reg, volt - tol, volt + tol);
8253dfe8a8SKevin Hilman if (r < 0) {
8353dfe8a8SKevin Hilman dev_warn(mpu_dev, "%s: unable to scale voltage up.\n",
8453dfe8a8SKevin Hilman __func__);
85d4019f0aSViresh Kumar return r;
8653dfe8a8SKevin Hilman }
8753dfe8a8SKevin Hilman }
88731e0cc6SSantosh Shilimkar
89652ed95dSViresh Kumar ret = clk_set_rate(policy->clk, new_freq * 1000);
90731e0cc6SSantosh Shilimkar
9153dfe8a8SKevin Hilman /* scaling down? scale voltage after frequency */
92d4019f0aSViresh Kumar if (mpu_reg && (new_freq < old_freq)) {
9342daffd2SAfzal Mohammed r = regulator_set_voltage(mpu_reg, volt - tol, volt + tol);
9453dfe8a8SKevin Hilman if (r < 0) {
9553dfe8a8SKevin Hilman dev_warn(mpu_dev, "%s: unable to scale voltage down.\n",
9653dfe8a8SKevin Hilman __func__);
97652ed95dSViresh Kumar clk_set_rate(policy->clk, old_freq * 1000);
98d4019f0aSViresh Kumar return r;
9953dfe8a8SKevin Hilman }
10053dfe8a8SKevin Hilman }
10153dfe8a8SKevin Hilman
102731e0cc6SSantosh Shilimkar return ret;
103731e0cc6SSantosh Shilimkar }
104731e0cc6SSantosh Shilimkar
freq_table_free(void)1051c78217fSNishanth Menon static inline void freq_table_free(void)
1061c78217fSNishanth Menon {
1071c78217fSNishanth Menon if (atomic_dec_and_test(&freq_table_users))
1085d4879cdSNishanth Menon dev_pm_opp_free_cpufreq_table(mpu_dev, &freq_table);
1091c78217fSNishanth Menon }
1101c78217fSNishanth Menon
omap_cpu_init(struct cpufreq_policy * policy)1112760984fSPaul Gortmaker static int omap_cpu_init(struct cpufreq_policy *policy)
112731e0cc6SSantosh Shilimkar {
113982bce11SViresh Kumar int result;
114731e0cc6SSantosh Shilimkar
115652ed95dSViresh Kumar policy->clk = clk_get(NULL, "cpufreq_ck");
116652ed95dSViresh Kumar if (IS_ERR(policy->clk))
117652ed95dSViresh Kumar return PTR_ERR(policy->clk);
118731e0cc6SSantosh Shilimkar
119982bce11SViresh Kumar if (!freq_table) {
1205d4879cdSNishanth Menon result = dev_pm_opp_init_cpufreq_table(mpu_dev, &freq_table);
121bf2a359dSNishanth Menon if (result) {
122982bce11SViresh Kumar dev_err(mpu_dev,
123982bce11SViresh Kumar "%s: cpu%d: failed creating freq table[%d]\n",
124bf2a359dSNishanth Menon __func__, policy->cpu, result);
125c4dcc8a1SViresh Kumar clk_put(policy->clk);
126c4dcc8a1SViresh Kumar return result;
127982bce11SViresh Kumar }
128bf2a359dSNishanth Menon }
129bf2a359dSNishanth Menon
1301b865214SRajendra Nayak atomic_inc_return(&freq_table_users);
1311b865214SRajendra Nayak
132731e0cc6SSantosh Shilimkar /* FIXME: what's the actual transition time? */
133c4dcc8a1SViresh Kumar cpufreq_generic_init(policy, freq_table, 300 * 1000);
13411e04fddSNishanth Menon
135c4dcc8a1SViresh Kumar return 0;
136731e0cc6SSantosh Shilimkar }
137731e0cc6SSantosh Shilimkar
omap_cpu_exit(struct cpufreq_policy * policy)138731e0cc6SSantosh Shilimkar static int omap_cpu_exit(struct cpufreq_policy *policy)
139731e0cc6SSantosh Shilimkar {
1401c78217fSNishanth Menon freq_table_free();
141652ed95dSViresh Kumar clk_put(policy->clk);
142731e0cc6SSantosh Shilimkar return 0;
143731e0cc6SSantosh Shilimkar }
144731e0cc6SSantosh Shilimkar
145731e0cc6SSantosh Shilimkar static struct cpufreq_driver omap_driver = {
1465ae4a4b4SViresh Kumar .flags = CPUFREQ_NEED_INITIAL_FREQ_CHECK,
147d5ca1649SViresh Kumar .verify = cpufreq_generic_frequency_table_verify,
1489c0ebcf7SViresh Kumar .target_index = omap_target,
149652ed95dSViresh Kumar .get = cpufreq_generic_get,
150731e0cc6SSantosh Shilimkar .init = omap_cpu_init,
151731e0cc6SSantosh Shilimkar .exit = omap_cpu_exit,
152361a172dSViresh Kumar .register_em = cpufreq_register_em_with_opp,
153731e0cc6SSantosh Shilimkar .name = "omap",
154d5ca1649SViresh Kumar .attr = cpufreq_generic_attr,
155731e0cc6SSantosh Shilimkar };
156731e0cc6SSantosh Shilimkar
omap_cpufreq_probe(struct platform_device * pdev)15749ded525SNishanth Menon static int omap_cpufreq_probe(struct platform_device *pdev)
158731e0cc6SSantosh Shilimkar {
159747a7f64SKevin Hilman mpu_dev = get_cpu_device(0);
160747a7f64SKevin Hilman if (!mpu_dev) {
1611c5864e2SJoe Perches pr_warn("%s: unable to get the MPU device\n", __func__);
162747a7f64SKevin Hilman return -EINVAL;
163a820ffa8SNishanth Menon }
164a820ffa8SNishanth Menon
16553dfe8a8SKevin Hilman mpu_reg = regulator_get(mpu_dev, "vcc");
16653dfe8a8SKevin Hilman if (IS_ERR(mpu_reg)) {
167b49c22a6SJoe Perches pr_warn("%s: unable to get MPU regulator\n", __func__);
16853dfe8a8SKevin Hilman mpu_reg = NULL;
16953dfe8a8SKevin Hilman } else {
17053dfe8a8SKevin Hilman /*
17153dfe8a8SKevin Hilman * Ensure physical regulator is present.
17253dfe8a8SKevin Hilman * (e.g. could be dummy regulator.)
17353dfe8a8SKevin Hilman */
17453dfe8a8SKevin Hilman if (regulator_get_voltage(mpu_reg) < 0) {
17553dfe8a8SKevin Hilman pr_warn("%s: physical regulator not present for MPU\n",
17653dfe8a8SKevin Hilman __func__);
17753dfe8a8SKevin Hilman regulator_put(mpu_reg);
17853dfe8a8SKevin Hilman mpu_reg = NULL;
17953dfe8a8SKevin Hilman }
18053dfe8a8SKevin Hilman }
18153dfe8a8SKevin Hilman
182731e0cc6SSantosh Shilimkar return cpufreq_register_driver(&omap_driver);
183731e0cc6SSantosh Shilimkar }
184731e0cc6SSantosh Shilimkar
omap_cpufreq_remove(struct platform_device * pdev)185*fd459406SYangtao Li static void omap_cpufreq_remove(struct platform_device *pdev)
186731e0cc6SSantosh Shilimkar {
187dd329e1eSUwe Kleine-König cpufreq_unregister_driver(&omap_driver);
188731e0cc6SSantosh Shilimkar }
189731e0cc6SSantosh Shilimkar
19049ded525SNishanth Menon static struct platform_driver omap_cpufreq_platdrv = {
19149ded525SNishanth Menon .driver = {
19249ded525SNishanth Menon .name = "omap-cpufreq",
19349ded525SNishanth Menon },
19449ded525SNishanth Menon .probe = omap_cpufreq_probe,
195*fd459406SYangtao Li .remove_new = omap_cpufreq_remove,
19649ded525SNishanth Menon };
19749ded525SNishanth Menon module_platform_driver(omap_cpufreq_platdrv);
19849ded525SNishanth Menon
199731e0cc6SSantosh Shilimkar MODULE_DESCRIPTION("cpufreq driver for OMAP SoCs");
200731e0cc6SSantosh Shilimkar MODULE_LICENSE("GPL");
201