1bb0a56ecSDave Jones /* 2bb0a56ecSDave Jones * Cyrix MediaGX and NatSemi Geode Suspend Modulation 3bb0a56ecSDave Jones * (C) 2002 Zwane Mwaikambo <zwane@commfireservices.com> 4bb0a56ecSDave Jones * (C) 2002 Hiroshi Miura <miura@da-cha.org> 5bb0a56ecSDave Jones * All Rights Reserved 6bb0a56ecSDave Jones * 7bb0a56ecSDave Jones * This program is free software; you can redistribute it and/or 8bb0a56ecSDave Jones * modify it under the terms of the GNU General Public License 9bb0a56ecSDave Jones * version 2 as published by the Free Software Foundation 10bb0a56ecSDave Jones * 11bb0a56ecSDave Jones * The author(s) of this software shall not be held liable for damages 12bb0a56ecSDave Jones * of any nature resulting due to the use of this software. This 13bb0a56ecSDave Jones * software is provided AS-IS with no warranties. 14bb0a56ecSDave Jones * 15bb0a56ecSDave Jones * Theoretical note: 16bb0a56ecSDave Jones * 17bb0a56ecSDave Jones * (see Geode(tm) CS5530 manual (rev.4.1) page.56) 18bb0a56ecSDave Jones * 19bb0a56ecSDave Jones * CPU frequency control on NatSemi Geode GX1/GXLV processor and CS55x0 20bb0a56ecSDave Jones * are based on Suspend Modulation. 21bb0a56ecSDave Jones * 22bb0a56ecSDave Jones * Suspend Modulation works by asserting and de-asserting the SUSP# pin 23bb0a56ecSDave Jones * to CPU(GX1/GXLV) for configurable durations. When asserting SUSP# 24bb0a56ecSDave Jones * the CPU enters an idle state. GX1 stops its core clock when SUSP# is 25bb0a56ecSDave Jones * asserted then power consumption is reduced. 26bb0a56ecSDave Jones * 27bb0a56ecSDave Jones * Suspend Modulation's OFF/ON duration are configurable 28bb0a56ecSDave Jones * with 'Suspend Modulation OFF Count Register' 29bb0a56ecSDave Jones * and 'Suspend Modulation ON Count Register'. 30bb0a56ecSDave Jones * These registers are 8bit counters that represent the number of 31bb0a56ecSDave Jones * 32us intervals which the SUSP# pin is asserted(ON)/de-asserted(OFF) 32bb0a56ecSDave Jones * to the processor. 33bb0a56ecSDave Jones * 34bb0a56ecSDave Jones * These counters define a ratio which is the effective frequency 35bb0a56ecSDave Jones * of operation of the system. 36bb0a56ecSDave Jones * 37bb0a56ecSDave Jones * OFF Count 38bb0a56ecSDave Jones * F_eff = Fgx * ---------------------- 39bb0a56ecSDave Jones * OFF Count + ON Count 40bb0a56ecSDave Jones * 41bb0a56ecSDave Jones * 0 <= On Count, Off Count <= 255 42bb0a56ecSDave Jones * 43bb0a56ecSDave Jones * From these limits, we can get register values 44bb0a56ecSDave Jones * 45bb0a56ecSDave Jones * off_duration + on_duration <= MAX_DURATION 46bb0a56ecSDave Jones * on_duration = off_duration * (stock_freq - freq) / freq 47bb0a56ecSDave Jones * 48bb0a56ecSDave Jones * off_duration = (freq * DURATION) / stock_freq 49bb0a56ecSDave Jones * on_duration = DURATION - off_duration 50bb0a56ecSDave Jones * 51bb0a56ecSDave Jones * 52bb0a56ecSDave Jones *--------------------------------------------------------------------------- 53bb0a56ecSDave Jones * 54bb0a56ecSDave Jones * ChangeLog: 55bb0a56ecSDave Jones * Dec. 12, 2003 Hiroshi Miura <miura@da-cha.org> 56bb0a56ecSDave Jones * - fix on/off register mistake 57bb0a56ecSDave Jones * - fix cpu_khz calc when it stops cpu modulation. 58bb0a56ecSDave Jones * 59bb0a56ecSDave Jones * Dec. 11, 2002 Hiroshi Miura <miura@da-cha.org> 60bb0a56ecSDave Jones * - rewrite for Cyrix MediaGX Cx5510/5520 and 61bb0a56ecSDave Jones * NatSemi Geode Cs5530(A). 62bb0a56ecSDave Jones * 63bb0a56ecSDave Jones * Jul. ??, 2002 Zwane Mwaikambo <zwane@commfireservices.com> 64bb0a56ecSDave Jones * - cs5530_mod patch for 2.4.19-rc1. 65bb0a56ecSDave Jones * 66bb0a56ecSDave Jones *--------------------------------------------------------------------------- 67bb0a56ecSDave Jones * 68bb0a56ecSDave Jones * Todo 69bb0a56ecSDave Jones * Test on machines with 5510, 5530, 5530A 70bb0a56ecSDave Jones */ 71bb0a56ecSDave Jones 72bb0a56ecSDave Jones /************************************************************************ 73bb0a56ecSDave Jones * Suspend Modulation - Definitions * 74bb0a56ecSDave Jones ************************************************************************/ 75bb0a56ecSDave Jones 76bb0a56ecSDave Jones #include <linux/kernel.h> 77bb0a56ecSDave Jones #include <linux/module.h> 78bb0a56ecSDave Jones #include <linux/init.h> 79bb0a56ecSDave Jones #include <linux/smp.h> 80bb0a56ecSDave Jones #include <linux/cpufreq.h> 81bb0a56ecSDave Jones #include <linux/pci.h> 82bb0a56ecSDave Jones #include <linux/errno.h> 83bb0a56ecSDave Jones #include <linux/slab.h> 84bb0a56ecSDave Jones 85fa8031aeSAndi Kleen #include <asm/cpu_device_id.h> 86bb0a56ecSDave Jones #include <asm/processor-cyrix.h> 87bb0a56ecSDave Jones 88bb0a56ecSDave Jones /* PCI config registers, all at F0 */ 89bb0a56ecSDave Jones #define PCI_PMER1 0x80 /* power management enable register 1 */ 90bb0a56ecSDave Jones #define PCI_PMER2 0x81 /* power management enable register 2 */ 91bb0a56ecSDave Jones #define PCI_PMER3 0x82 /* power management enable register 3 */ 92bb0a56ecSDave Jones #define PCI_IRQTC 0x8c /* irq speedup timer counter register:typical 2 to 4ms */ 93bb0a56ecSDave Jones #define PCI_VIDTC 0x8d /* video speedup timer counter register: typical 50 to 100ms */ 94bb0a56ecSDave Jones #define PCI_MODOFF 0x94 /* suspend modulation OFF counter register, 1 = 32us */ 95bb0a56ecSDave Jones #define PCI_MODON 0x95 /* suspend modulation ON counter register */ 96bb0a56ecSDave Jones #define PCI_SUSCFG 0x96 /* suspend configuration register */ 97bb0a56ecSDave Jones 98bb0a56ecSDave Jones /* PMER1 bits */ 99bb0a56ecSDave Jones #define GPM (1<<0) /* global power management */ 100bb0a56ecSDave Jones #define GIT (1<<1) /* globally enable PM device idle timers */ 101bb0a56ecSDave Jones #define GTR (1<<2) /* globally enable IO traps */ 102bb0a56ecSDave Jones #define IRQ_SPDUP (1<<3) /* disable clock throttle during interrupt handling */ 103bb0a56ecSDave Jones #define VID_SPDUP (1<<4) /* disable clock throttle during vga video handling */ 104bb0a56ecSDave Jones 105bb0a56ecSDave Jones /* SUSCFG bits */ 106bb0a56ecSDave Jones #define SUSMOD (1<<0) /* enable/disable suspend modulation */ 107bb0a56ecSDave Jones /* the below is supported only with cs5530 (after rev.1.2)/cs5530A */ 108bb0a56ecSDave Jones #define SMISPDUP (1<<1) /* select how SMI re-enable suspend modulation: */ 109bb0a56ecSDave Jones /* IRQTC timer or read SMI speedup disable reg.(F1BAR[08-09h]) */ 110bb0a56ecSDave Jones #define SUSCFG (1<<2) /* enable powering down a GXLV processor. "Special 3Volt Suspend" mode */ 111bb0a56ecSDave Jones /* the below is supported only with cs5530A */ 112bb0a56ecSDave Jones #define PWRSVE_ISA (1<<3) /* stop ISA clock */ 113bb0a56ecSDave Jones #define PWRSVE (1<<4) /* active idle */ 114bb0a56ecSDave Jones 115bb0a56ecSDave Jones struct gxfreq_params { 116bb0a56ecSDave Jones u8 on_duration; 117bb0a56ecSDave Jones u8 off_duration; 118bb0a56ecSDave Jones u8 pci_suscfg; 119bb0a56ecSDave Jones u8 pci_pmer1; 120bb0a56ecSDave Jones u8 pci_pmer2; 121bb0a56ecSDave Jones struct pci_dev *cs55x0; 122bb0a56ecSDave Jones }; 123bb0a56ecSDave Jones 124bb0a56ecSDave Jones static struct gxfreq_params *gx_params; 125bb0a56ecSDave Jones static int stock_freq; 126bb0a56ecSDave Jones 127bb0a56ecSDave Jones /* PCI bus clock - defaults to 30.000 if cpu_khz is not available */ 128bb0a56ecSDave Jones static int pci_busclk; 129bb0a56ecSDave Jones module_param(pci_busclk, int, 0444); 130bb0a56ecSDave Jones 131bb0a56ecSDave Jones /* maximum duration for which the cpu may be suspended 132bb0a56ecSDave Jones * (32us * MAX_DURATION). If no parameter is given, this defaults 133bb0a56ecSDave Jones * to 255. 134bb0a56ecSDave Jones * Note that this leads to a maximum of 8 ms(!) where the CPU clock 135bb0a56ecSDave Jones * is suspended -- processing power is just 0.39% of what it used to be, 136bb0a56ecSDave Jones * though. 781.25 kHz(!) for a 200 MHz processor -- wow. */ 137bb0a56ecSDave Jones static int max_duration = 255; 138bb0a56ecSDave Jones module_param(max_duration, int, 0444); 139bb0a56ecSDave Jones 140bb0a56ecSDave Jones /* For the default policy, we want at least some processing power 141bb0a56ecSDave Jones * - let's say 5%. (min = maxfreq / POLICY_MIN_DIV) 142bb0a56ecSDave Jones */ 143bb0a56ecSDave Jones #define POLICY_MIN_DIV 20 144bb0a56ecSDave Jones 145bb0a56ecSDave Jones 146bb0a56ecSDave Jones /** 147bb0a56ecSDave Jones * we can detect a core multipiler from dir0_lsb 148bb0a56ecSDave Jones * from GX1 datasheet p.56, 149bb0a56ecSDave Jones * MULT[3:0]: 150bb0a56ecSDave Jones * 0000 = SYSCLK multiplied by 4 (test only) 151bb0a56ecSDave Jones * 0001 = SYSCLK multiplied by 10 152bb0a56ecSDave Jones * 0010 = SYSCLK multiplied by 4 153bb0a56ecSDave Jones * 0011 = SYSCLK multiplied by 6 154bb0a56ecSDave Jones * 0100 = SYSCLK multiplied by 9 155bb0a56ecSDave Jones * 0101 = SYSCLK multiplied by 5 156bb0a56ecSDave Jones * 0110 = SYSCLK multiplied by 7 157bb0a56ecSDave Jones * 0111 = SYSCLK multiplied by 8 158bb0a56ecSDave Jones * of 33.3MHz 159bb0a56ecSDave Jones **/ 160bb0a56ecSDave Jones static int gx_freq_mult[16] = { 161bb0a56ecSDave Jones 4, 10, 4, 6, 9, 5, 7, 8, 162bb0a56ecSDave Jones 0, 0, 0, 0, 0, 0, 0, 0 163bb0a56ecSDave Jones }; 164bb0a56ecSDave Jones 165bb0a56ecSDave Jones 166bb0a56ecSDave Jones /**************************************************************** 167bb0a56ecSDave Jones * Low Level chipset interface * 168bb0a56ecSDave Jones ****************************************************************/ 169bb0a56ecSDave Jones static struct pci_device_id gx_chipset_tbl[] __initdata = { 170bb0a56ecSDave Jones { PCI_VDEVICE(CYRIX, PCI_DEVICE_ID_CYRIX_5530_LEGACY), }, 171bb0a56ecSDave Jones { PCI_VDEVICE(CYRIX, PCI_DEVICE_ID_CYRIX_5520), }, 172bb0a56ecSDave Jones { PCI_VDEVICE(CYRIX, PCI_DEVICE_ID_CYRIX_5510), }, 173bb0a56ecSDave Jones { 0, }, 174bb0a56ecSDave Jones }; 175*b3012e12SAlan Cox MODULE_DEVICE_TABLE(pci, gx_chipset_tbl); 176bb0a56ecSDave Jones 177bb0a56ecSDave Jones static void gx_write_byte(int reg, int value) 178bb0a56ecSDave Jones { 179bb0a56ecSDave Jones pci_write_config_byte(gx_params->cs55x0, reg, value); 180bb0a56ecSDave Jones } 181bb0a56ecSDave Jones 182bb0a56ecSDave Jones /** 183bb0a56ecSDave Jones * gx_detect_chipset: 184bb0a56ecSDave Jones * 185bb0a56ecSDave Jones **/ 186bb0a56ecSDave Jones static __init struct pci_dev *gx_detect_chipset(void) 187bb0a56ecSDave Jones { 188bb0a56ecSDave Jones struct pci_dev *gx_pci = NULL; 189bb0a56ecSDave Jones 190bb0a56ecSDave Jones /* detect which companion chip is used */ 191bb0a56ecSDave Jones for_each_pci_dev(gx_pci) { 192bb0a56ecSDave Jones if ((pci_match_id(gx_chipset_tbl, gx_pci)) != NULL) 193bb0a56ecSDave Jones return gx_pci; 194bb0a56ecSDave Jones } 195bb0a56ecSDave Jones 196bb0a56ecSDave Jones pr_debug("error: no supported chipset found!\n"); 197bb0a56ecSDave Jones return NULL; 198bb0a56ecSDave Jones } 199bb0a56ecSDave Jones 200bb0a56ecSDave Jones /** 201bb0a56ecSDave Jones * gx_get_cpuspeed: 202bb0a56ecSDave Jones * 203bb0a56ecSDave Jones * Finds out at which efficient frequency the Cyrix MediaGX/NatSemi 204bb0a56ecSDave Jones * Geode CPU runs. 205bb0a56ecSDave Jones */ 206bb0a56ecSDave Jones static unsigned int gx_get_cpuspeed(unsigned int cpu) 207bb0a56ecSDave Jones { 208bb0a56ecSDave Jones if ((gx_params->pci_suscfg & SUSMOD) == 0) 209bb0a56ecSDave Jones return stock_freq; 210bb0a56ecSDave Jones 211bb0a56ecSDave Jones return (stock_freq * gx_params->off_duration) 212bb0a56ecSDave Jones / (gx_params->on_duration + gx_params->off_duration); 213bb0a56ecSDave Jones } 214bb0a56ecSDave Jones 215bb0a56ecSDave Jones /** 216bb0a56ecSDave Jones * gx_validate_speed: 217bb0a56ecSDave Jones * determine current cpu speed 218bb0a56ecSDave Jones * 219bb0a56ecSDave Jones **/ 220bb0a56ecSDave Jones 221bb0a56ecSDave Jones static unsigned int gx_validate_speed(unsigned int khz, u8 *on_duration, 222bb0a56ecSDave Jones u8 *off_duration) 223bb0a56ecSDave Jones { 224bb0a56ecSDave Jones unsigned int i; 225bb0a56ecSDave Jones u8 tmp_on, tmp_off; 226bb0a56ecSDave Jones int old_tmp_freq = stock_freq; 227bb0a56ecSDave Jones int tmp_freq; 228bb0a56ecSDave Jones 229bb0a56ecSDave Jones *off_duration = 1; 230bb0a56ecSDave Jones *on_duration = 0; 231bb0a56ecSDave Jones 232bb0a56ecSDave Jones for (i = max_duration; i > 0; i--) { 233bb0a56ecSDave Jones tmp_off = ((khz * i) / stock_freq) & 0xff; 234bb0a56ecSDave Jones tmp_on = i - tmp_off; 235bb0a56ecSDave Jones tmp_freq = (stock_freq * tmp_off) / i; 236bb0a56ecSDave Jones /* if this relation is closer to khz, use this. If it's equal, 237bb0a56ecSDave Jones * prefer it, too - lower latency */ 238bb0a56ecSDave Jones if (abs(tmp_freq - khz) <= abs(old_tmp_freq - khz)) { 239bb0a56ecSDave Jones *on_duration = tmp_on; 240bb0a56ecSDave Jones *off_duration = tmp_off; 241bb0a56ecSDave Jones old_tmp_freq = tmp_freq; 242bb0a56ecSDave Jones } 243bb0a56ecSDave Jones } 244bb0a56ecSDave Jones 245bb0a56ecSDave Jones return old_tmp_freq; 246bb0a56ecSDave Jones } 247bb0a56ecSDave Jones 248bb0a56ecSDave Jones 249bb0a56ecSDave Jones /** 250bb0a56ecSDave Jones * gx_set_cpuspeed: 251bb0a56ecSDave Jones * set cpu speed in khz. 252bb0a56ecSDave Jones **/ 253bb0a56ecSDave Jones 254bb0a56ecSDave Jones static void gx_set_cpuspeed(unsigned int khz) 255bb0a56ecSDave Jones { 256bb0a56ecSDave Jones u8 suscfg, pmer1; 257bb0a56ecSDave Jones unsigned int new_khz; 258bb0a56ecSDave Jones unsigned long flags; 259bb0a56ecSDave Jones struct cpufreq_freqs freqs; 260bb0a56ecSDave Jones 261bb0a56ecSDave Jones freqs.cpu = 0; 262bb0a56ecSDave Jones freqs.old = gx_get_cpuspeed(0); 263bb0a56ecSDave Jones 264bb0a56ecSDave Jones new_khz = gx_validate_speed(khz, &gx_params->on_duration, 265bb0a56ecSDave Jones &gx_params->off_duration); 266bb0a56ecSDave Jones 267bb0a56ecSDave Jones freqs.new = new_khz; 268bb0a56ecSDave Jones 269bb0a56ecSDave Jones cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); 270bb0a56ecSDave Jones local_irq_save(flags); 271bb0a56ecSDave Jones 272bb0a56ecSDave Jones 273bb0a56ecSDave Jones 274bb0a56ecSDave Jones if (new_khz != stock_freq) { 275bb0a56ecSDave Jones /* if new khz == 100% of CPU speed, it is special case */ 276bb0a56ecSDave Jones switch (gx_params->cs55x0->device) { 277bb0a56ecSDave Jones case PCI_DEVICE_ID_CYRIX_5530_LEGACY: 278bb0a56ecSDave Jones pmer1 = gx_params->pci_pmer1 | IRQ_SPDUP | VID_SPDUP; 279bb0a56ecSDave Jones /* FIXME: need to test other values -- Zwane,Miura */ 280bb0a56ecSDave Jones /* typical 2 to 4ms */ 281bb0a56ecSDave Jones gx_write_byte(PCI_IRQTC, 4); 282bb0a56ecSDave Jones /* typical 50 to 100ms */ 283bb0a56ecSDave Jones gx_write_byte(PCI_VIDTC, 100); 284bb0a56ecSDave Jones gx_write_byte(PCI_PMER1, pmer1); 285bb0a56ecSDave Jones 286bb0a56ecSDave Jones if (gx_params->cs55x0->revision < 0x10) { 287bb0a56ecSDave Jones /* CS5530(rev 1.2, 1.3) */ 288bb0a56ecSDave Jones suscfg = gx_params->pci_suscfg|SUSMOD; 289bb0a56ecSDave Jones } else { 290bb0a56ecSDave Jones /* CS5530A,B.. */ 291bb0a56ecSDave Jones suscfg = gx_params->pci_suscfg|SUSMOD|PWRSVE; 292bb0a56ecSDave Jones } 293bb0a56ecSDave Jones break; 294bb0a56ecSDave Jones case PCI_DEVICE_ID_CYRIX_5520: 295bb0a56ecSDave Jones case PCI_DEVICE_ID_CYRIX_5510: 296bb0a56ecSDave Jones suscfg = gx_params->pci_suscfg | SUSMOD; 297bb0a56ecSDave Jones break; 298bb0a56ecSDave Jones default: 299bb0a56ecSDave Jones local_irq_restore(flags); 300bb0a56ecSDave Jones pr_debug("fatal: try to set unknown chipset.\n"); 301bb0a56ecSDave Jones return; 302bb0a56ecSDave Jones } 303bb0a56ecSDave Jones } else { 304bb0a56ecSDave Jones suscfg = gx_params->pci_suscfg & ~(SUSMOD); 305bb0a56ecSDave Jones gx_params->off_duration = 0; 306bb0a56ecSDave Jones gx_params->on_duration = 0; 307bb0a56ecSDave Jones pr_debug("suspend modulation disabled: cpu runs 100%% speed.\n"); 308bb0a56ecSDave Jones } 309bb0a56ecSDave Jones 310bb0a56ecSDave Jones gx_write_byte(PCI_MODOFF, gx_params->off_duration); 311bb0a56ecSDave Jones gx_write_byte(PCI_MODON, gx_params->on_duration); 312bb0a56ecSDave Jones 313bb0a56ecSDave Jones gx_write_byte(PCI_SUSCFG, suscfg); 314bb0a56ecSDave Jones pci_read_config_byte(gx_params->cs55x0, PCI_SUSCFG, &suscfg); 315bb0a56ecSDave Jones 316bb0a56ecSDave Jones local_irq_restore(flags); 317bb0a56ecSDave Jones 318bb0a56ecSDave Jones gx_params->pci_suscfg = suscfg; 319bb0a56ecSDave Jones 320bb0a56ecSDave Jones cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); 321bb0a56ecSDave Jones 322bb0a56ecSDave Jones pr_debug("suspend modulation w/ duration of ON:%d us, OFF:%d us\n", 323bb0a56ecSDave Jones gx_params->on_duration * 32, gx_params->off_duration * 32); 324bb0a56ecSDave Jones pr_debug("suspend modulation w/ clock speed: %d kHz.\n", freqs.new); 325bb0a56ecSDave Jones } 326bb0a56ecSDave Jones 327bb0a56ecSDave Jones /**************************************************************** 328bb0a56ecSDave Jones * High level functions * 329bb0a56ecSDave Jones ****************************************************************/ 330bb0a56ecSDave Jones 331bb0a56ecSDave Jones /* 332bb0a56ecSDave Jones * cpufreq_gx_verify: test if frequency range is valid 333bb0a56ecSDave Jones * 334bb0a56ecSDave Jones * This function checks if a given frequency range in kHz is valid 335bb0a56ecSDave Jones * for the hardware supported by the driver. 336bb0a56ecSDave Jones */ 337bb0a56ecSDave Jones 338bb0a56ecSDave Jones static int cpufreq_gx_verify(struct cpufreq_policy *policy) 339bb0a56ecSDave Jones { 340bb0a56ecSDave Jones unsigned int tmp_freq = 0; 341bb0a56ecSDave Jones u8 tmp1, tmp2; 342bb0a56ecSDave Jones 343bb0a56ecSDave Jones if (!stock_freq || !policy) 344bb0a56ecSDave Jones return -EINVAL; 345bb0a56ecSDave Jones 346bb0a56ecSDave Jones policy->cpu = 0; 347bb0a56ecSDave Jones cpufreq_verify_within_limits(policy, (stock_freq / max_duration), 348bb0a56ecSDave Jones stock_freq); 349bb0a56ecSDave Jones 350bb0a56ecSDave Jones /* it needs to be assured that at least one supported frequency is 351bb0a56ecSDave Jones * within policy->min and policy->max. If it is not, policy->max 352bb0a56ecSDave Jones * needs to be increased until one freuqency is supported. 353bb0a56ecSDave Jones * policy->min may not be decreased, though. This way we guarantee a 354bb0a56ecSDave Jones * specific processing capacity. 355bb0a56ecSDave Jones */ 356bb0a56ecSDave Jones tmp_freq = gx_validate_speed(policy->min, &tmp1, &tmp2); 357bb0a56ecSDave Jones if (tmp_freq < policy->min) 358bb0a56ecSDave Jones tmp_freq += stock_freq / max_duration; 359bb0a56ecSDave Jones policy->min = tmp_freq; 360bb0a56ecSDave Jones if (policy->min > policy->max) 361bb0a56ecSDave Jones policy->max = tmp_freq; 362bb0a56ecSDave Jones tmp_freq = gx_validate_speed(policy->max, &tmp1, &tmp2); 363bb0a56ecSDave Jones if (tmp_freq > policy->max) 364bb0a56ecSDave Jones tmp_freq -= stock_freq / max_duration; 365bb0a56ecSDave Jones policy->max = tmp_freq; 366bb0a56ecSDave Jones if (policy->max < policy->min) 367bb0a56ecSDave Jones policy->max = policy->min; 368bb0a56ecSDave Jones cpufreq_verify_within_limits(policy, (stock_freq / max_duration), 369bb0a56ecSDave Jones stock_freq); 370bb0a56ecSDave Jones 371bb0a56ecSDave Jones return 0; 372bb0a56ecSDave Jones } 373bb0a56ecSDave Jones 374bb0a56ecSDave Jones /* 375bb0a56ecSDave Jones * cpufreq_gx_target: 376bb0a56ecSDave Jones * 377bb0a56ecSDave Jones */ 378bb0a56ecSDave Jones static int cpufreq_gx_target(struct cpufreq_policy *policy, 379bb0a56ecSDave Jones unsigned int target_freq, 380bb0a56ecSDave Jones unsigned int relation) 381bb0a56ecSDave Jones { 382bb0a56ecSDave Jones u8 tmp1, tmp2; 383bb0a56ecSDave Jones unsigned int tmp_freq; 384bb0a56ecSDave Jones 385bb0a56ecSDave Jones if (!stock_freq || !policy) 386bb0a56ecSDave Jones return -EINVAL; 387bb0a56ecSDave Jones 388bb0a56ecSDave Jones policy->cpu = 0; 389bb0a56ecSDave Jones 390bb0a56ecSDave Jones tmp_freq = gx_validate_speed(target_freq, &tmp1, &tmp2); 391bb0a56ecSDave Jones while (tmp_freq < policy->min) { 392bb0a56ecSDave Jones tmp_freq += stock_freq / max_duration; 393bb0a56ecSDave Jones tmp_freq = gx_validate_speed(tmp_freq, &tmp1, &tmp2); 394bb0a56ecSDave Jones } 395bb0a56ecSDave Jones while (tmp_freq > policy->max) { 396bb0a56ecSDave Jones tmp_freq -= stock_freq / max_duration; 397bb0a56ecSDave Jones tmp_freq = gx_validate_speed(tmp_freq, &tmp1, &tmp2); 398bb0a56ecSDave Jones } 399bb0a56ecSDave Jones 400bb0a56ecSDave Jones gx_set_cpuspeed(tmp_freq); 401bb0a56ecSDave Jones 402bb0a56ecSDave Jones return 0; 403bb0a56ecSDave Jones } 404bb0a56ecSDave Jones 405bb0a56ecSDave Jones static int cpufreq_gx_cpu_init(struct cpufreq_policy *policy) 406bb0a56ecSDave Jones { 407bb0a56ecSDave Jones unsigned int maxfreq, curfreq; 408bb0a56ecSDave Jones 409bb0a56ecSDave Jones if (!policy || policy->cpu != 0) 410bb0a56ecSDave Jones return -ENODEV; 411bb0a56ecSDave Jones 412bb0a56ecSDave Jones /* determine maximum frequency */ 413bb0a56ecSDave Jones if (pci_busclk) 414bb0a56ecSDave Jones maxfreq = pci_busclk * gx_freq_mult[getCx86(CX86_DIR1) & 0x0f]; 415bb0a56ecSDave Jones else if (cpu_khz) 416bb0a56ecSDave Jones maxfreq = cpu_khz; 417bb0a56ecSDave Jones else 418bb0a56ecSDave Jones maxfreq = 30000 * gx_freq_mult[getCx86(CX86_DIR1) & 0x0f]; 419bb0a56ecSDave Jones 420bb0a56ecSDave Jones stock_freq = maxfreq; 421bb0a56ecSDave Jones curfreq = gx_get_cpuspeed(0); 422bb0a56ecSDave Jones 423bb0a56ecSDave Jones pr_debug("cpu max frequency is %d.\n", maxfreq); 424bb0a56ecSDave Jones pr_debug("cpu current frequency is %dkHz.\n", curfreq); 425bb0a56ecSDave Jones 426bb0a56ecSDave Jones /* setup basic struct for cpufreq API */ 427bb0a56ecSDave Jones policy->cpu = 0; 428bb0a56ecSDave Jones 429bb0a56ecSDave Jones if (max_duration < POLICY_MIN_DIV) 430bb0a56ecSDave Jones policy->min = maxfreq / max_duration; 431bb0a56ecSDave Jones else 432bb0a56ecSDave Jones policy->min = maxfreq / POLICY_MIN_DIV; 433bb0a56ecSDave Jones policy->max = maxfreq; 434bb0a56ecSDave Jones policy->cur = curfreq; 435bb0a56ecSDave Jones policy->cpuinfo.min_freq = maxfreq / max_duration; 436bb0a56ecSDave Jones policy->cpuinfo.max_freq = maxfreq; 437bb0a56ecSDave Jones policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL; 438bb0a56ecSDave Jones 439bb0a56ecSDave Jones return 0; 440bb0a56ecSDave Jones } 441bb0a56ecSDave Jones 442bb0a56ecSDave Jones /* 443bb0a56ecSDave Jones * cpufreq_gx_init: 444bb0a56ecSDave Jones * MediaGX/Geode GX initialize cpufreq driver 445bb0a56ecSDave Jones */ 446bb0a56ecSDave Jones static struct cpufreq_driver gx_suspmod_driver = { 447bb0a56ecSDave Jones .get = gx_get_cpuspeed, 448bb0a56ecSDave Jones .verify = cpufreq_gx_verify, 449bb0a56ecSDave Jones .target = cpufreq_gx_target, 450bb0a56ecSDave Jones .init = cpufreq_gx_cpu_init, 451bb0a56ecSDave Jones .name = "gx-suspmod", 452bb0a56ecSDave Jones .owner = THIS_MODULE, 453bb0a56ecSDave Jones }; 454bb0a56ecSDave Jones 455bb0a56ecSDave Jones static int __init cpufreq_gx_init(void) 456bb0a56ecSDave Jones { 457bb0a56ecSDave Jones int ret; 458bb0a56ecSDave Jones struct gxfreq_params *params; 459bb0a56ecSDave Jones struct pci_dev *gx_pci; 460bb0a56ecSDave Jones 461bb0a56ecSDave Jones /* Test if we have the right hardware */ 462bb0a56ecSDave Jones gx_pci = gx_detect_chipset(); 463bb0a56ecSDave Jones if (gx_pci == NULL) 464bb0a56ecSDave Jones return -ENODEV; 465bb0a56ecSDave Jones 466bb0a56ecSDave Jones /* check whether module parameters are sane */ 467bb0a56ecSDave Jones if (max_duration > 0xff) 468bb0a56ecSDave Jones max_duration = 0xff; 469bb0a56ecSDave Jones 470bb0a56ecSDave Jones pr_debug("geode suspend modulation available.\n"); 471bb0a56ecSDave Jones 472bb0a56ecSDave Jones params = kzalloc(sizeof(struct gxfreq_params), GFP_KERNEL); 473bb0a56ecSDave Jones if (params == NULL) 474bb0a56ecSDave Jones return -ENOMEM; 475bb0a56ecSDave Jones 476bb0a56ecSDave Jones params->cs55x0 = gx_pci; 477bb0a56ecSDave Jones gx_params = params; 478bb0a56ecSDave Jones 479bb0a56ecSDave Jones /* keep cs55x0 configurations */ 480bb0a56ecSDave Jones pci_read_config_byte(params->cs55x0, PCI_SUSCFG, &(params->pci_suscfg)); 481bb0a56ecSDave Jones pci_read_config_byte(params->cs55x0, PCI_PMER1, &(params->pci_pmer1)); 482bb0a56ecSDave Jones pci_read_config_byte(params->cs55x0, PCI_PMER2, &(params->pci_pmer2)); 483bb0a56ecSDave Jones pci_read_config_byte(params->cs55x0, PCI_MODON, &(params->on_duration)); 484bb0a56ecSDave Jones pci_read_config_byte(params->cs55x0, PCI_MODOFF, 485bb0a56ecSDave Jones &(params->off_duration)); 486bb0a56ecSDave Jones 487bb0a56ecSDave Jones ret = cpufreq_register_driver(&gx_suspmod_driver); 488bb0a56ecSDave Jones if (ret) { 489bb0a56ecSDave Jones kfree(params); 490bb0a56ecSDave Jones return ret; /* register error! */ 491bb0a56ecSDave Jones } 492bb0a56ecSDave Jones 493bb0a56ecSDave Jones return 0; 494bb0a56ecSDave Jones } 495bb0a56ecSDave Jones 496bb0a56ecSDave Jones static void __exit cpufreq_gx_exit(void) 497bb0a56ecSDave Jones { 498bb0a56ecSDave Jones cpufreq_unregister_driver(&gx_suspmod_driver); 499bb0a56ecSDave Jones pci_dev_put(gx_params->cs55x0); 500bb0a56ecSDave Jones kfree(gx_params); 501bb0a56ecSDave Jones } 502bb0a56ecSDave Jones 503bb0a56ecSDave Jones MODULE_AUTHOR("Hiroshi Miura <miura@da-cha.org>"); 504bb0a56ecSDave Jones MODULE_DESCRIPTION("Cpufreq driver for Cyrix MediaGX and NatSemi Geode"); 505bb0a56ecSDave Jones MODULE_LICENSE("GPL"); 506bb0a56ecSDave Jones 507bb0a56ecSDave Jones module_init(cpufreq_gx_init); 508bb0a56ecSDave Jones module_exit(cpufreq_gx_exit); 509bb0a56ecSDave Jones 510