1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright (C) 2018 Socionext Inc. 4 */ 5 6 #include <linux/clk.h> 7 #include <linux/interrupt.h> 8 #include <linux/irq.h> 9 #include <linux/irqreturn.h> 10 #include <linux/sched_clock.h> 11 #include "timer-of.h" 12 13 #define MLB_TMR_TMCSR_OFS 0x0 14 #define MLB_TMR_TMR_OFS 0x4 15 #define MLB_TMR_TMRLR1_OFS 0x8 16 #define MLB_TMR_TMRLR2_OFS 0xc 17 #define MLB_TMR_REGSZPCH 0x10 18 19 #define MLB_TMR_TMCSR_OUTL BIT(5) 20 #define MLB_TMR_TMCSR_RELD BIT(4) 21 #define MLB_TMR_TMCSR_INTE BIT(3) 22 #define MLB_TMR_TMCSR_UF BIT(2) 23 #define MLB_TMR_TMCSR_CNTE BIT(1) 24 #define MLB_TMR_TMCSR_TRG BIT(0) 25 26 #define MLB_TMR_TMCSR_CSL_DIV2 0 27 #define MLB_TMR_DIV_CNT 2 28 29 #define MLB_TMR_SRC_CH (1) 30 #define MLB_TMR_EVT_CH (0) 31 32 #define MLB_TMR_SRC_CH_OFS (MLB_TMR_REGSZPCH * MLB_TMR_SRC_CH) 33 #define MLB_TMR_EVT_CH_OFS (MLB_TMR_REGSZPCH * MLB_TMR_EVT_CH) 34 35 #define MLB_TMR_SRC_TMCSR_OFS (MLB_TMR_SRC_CH_OFS + MLB_TMR_TMCSR_OFS) 36 #define MLB_TMR_SRC_TMR_OFS (MLB_TMR_SRC_CH_OFS + MLB_TMR_TMR_OFS) 37 #define MLB_TMR_SRC_TMRLR1_OFS (MLB_TMR_SRC_CH_OFS + MLB_TMR_TMRLR1_OFS) 38 #define MLB_TMR_SRC_TMRLR2_OFS (MLB_TMR_SRC_CH_OFS + MLB_TMR_TMRLR2_OFS) 39 40 #define MLB_TMR_EVT_TMCSR_OFS (MLB_TMR_EVT_CH_OFS + MLB_TMR_TMCSR_OFS) 41 #define MLB_TMR_EVT_TMR_OFS (MLB_TMR_EVT_CH_OFS + MLB_TMR_TMR_OFS) 42 #define MLB_TMR_EVT_TMRLR1_OFS (MLB_TMR_EVT_CH_OFS + MLB_TMR_TMRLR1_OFS) 43 #define MLB_TMR_EVT_TMRLR2_OFS (MLB_TMR_EVT_CH_OFS + MLB_TMR_TMRLR2_OFS) 44 45 #define MLB_TIMER_RATING 500 46 47 static irqreturn_t mlb_timer_interrupt(int irq, void *dev_id) 48 { 49 struct clock_event_device *clk = dev_id; 50 struct timer_of *to = to_timer_of(clk); 51 u32 val; 52 53 val = readl_relaxed(timer_of_base(to) + MLB_TMR_EVT_TMCSR_OFS); 54 val &= ~MLB_TMR_TMCSR_UF; 55 writel_relaxed(val, timer_of_base(to) + MLB_TMR_EVT_TMCSR_OFS); 56 57 clk->event_handler(clk); 58 59 return IRQ_HANDLED; 60 } 61 62 static int mlb_set_state_periodic(struct clock_event_device *clk) 63 { 64 struct timer_of *to = to_timer_of(clk); 65 u32 val = MLB_TMR_TMCSR_CSL_DIV2; 66 67 writel_relaxed(val, timer_of_base(to) + MLB_TMR_EVT_TMCSR_OFS); 68 69 writel_relaxed(to->of_clk.period, timer_of_base(to) + 70 MLB_TMR_EVT_TMRLR1_OFS); 71 val |= MLB_TMR_TMCSR_RELD | MLB_TMR_TMCSR_CNTE | 72 MLB_TMR_TMCSR_TRG | MLB_TMR_TMCSR_INTE; 73 writel_relaxed(val, timer_of_base(to) + MLB_TMR_EVT_TMCSR_OFS); 74 return 0; 75 } 76 77 static int mlb_set_state_oneshot(struct clock_event_device *clk) 78 { 79 struct timer_of *to = to_timer_of(clk); 80 u32 val = MLB_TMR_TMCSR_CSL_DIV2; 81 82 writel_relaxed(val, timer_of_base(to) + MLB_TMR_EVT_TMCSR_OFS); 83 val |= MLB_TMR_TMCSR_CNTE | MLB_TMR_TMCSR_TRG | MLB_TMR_TMCSR_INTE; 84 writel_relaxed(val, timer_of_base(to) + MLB_TMR_EVT_TMCSR_OFS); 85 return 0; 86 } 87 88 static int mlb_clkevt_next_event(unsigned long event, 89 struct clock_event_device *clk) 90 { 91 struct timer_of *to = to_timer_of(clk); 92 93 writel_relaxed(event, timer_of_base(to) + MLB_TMR_EVT_TMRLR1_OFS); 94 writel_relaxed(MLB_TMR_TMCSR_CSL_DIV2 | 95 MLB_TMR_TMCSR_CNTE | MLB_TMR_TMCSR_INTE | 96 MLB_TMR_TMCSR_TRG, timer_of_base(to) + 97 MLB_TMR_EVT_TMCSR_OFS); 98 return 0; 99 } 100 101 static int mlb_config_clock_source(struct timer_of *to) 102 { 103 writel_relaxed(0, timer_of_base(to) + MLB_TMR_SRC_TMCSR_OFS); 104 writel_relaxed(~0, timer_of_base(to) + MLB_TMR_SRC_TMR_OFS); 105 writel_relaxed(~0, timer_of_base(to) + MLB_TMR_SRC_TMRLR1_OFS); 106 writel_relaxed(~0, timer_of_base(to) + MLB_TMR_SRC_TMRLR2_OFS); 107 writel_relaxed(BIT(4) | BIT(1) | BIT(0), timer_of_base(to) + 108 MLB_TMR_SRC_TMCSR_OFS); 109 return 0; 110 } 111 112 static int mlb_config_clock_event(struct timer_of *to) 113 { 114 writel_relaxed(0, timer_of_base(to) + MLB_TMR_EVT_TMCSR_OFS); 115 return 0; 116 } 117 118 static struct timer_of to = { 119 .flags = TIMER_OF_IRQ | TIMER_OF_BASE | TIMER_OF_CLOCK, 120 121 .clkevt = { 122 .name = "mlb-clkevt", 123 .rating = MLB_TIMER_RATING, 124 .cpumask = cpu_possible_mask, 125 .features = CLOCK_EVT_FEAT_DYNIRQ | CLOCK_EVT_FEAT_ONESHOT, 126 .set_state_oneshot = mlb_set_state_oneshot, 127 .set_state_periodic = mlb_set_state_periodic, 128 .set_next_event = mlb_clkevt_next_event, 129 }, 130 131 .of_irq = { 132 .flags = IRQF_TIMER | IRQF_IRQPOLL, 133 .handler = mlb_timer_interrupt, 134 }, 135 }; 136 137 static u64 notrace mlb_timer_sched_read(void) 138 { 139 return ~readl_relaxed(timer_of_base(&to) + MLB_TMR_SRC_TMR_OFS); 140 } 141 142 static int __init mlb_timer_init(struct device_node *node) 143 { 144 int ret; 145 unsigned long rate; 146 147 ret = timer_of_init(node, &to); 148 if (ret) 149 return ret; 150 151 rate = timer_of_rate(&to) / MLB_TMR_DIV_CNT; 152 mlb_config_clock_source(&to); 153 clocksource_mmio_init(timer_of_base(&to) + MLB_TMR_SRC_TMR_OFS, 154 node->name, rate, MLB_TIMER_RATING, 32, 155 clocksource_mmio_readl_down); 156 sched_clock_register(mlb_timer_sched_read, 32, rate); 157 mlb_config_clock_event(&to); 158 clockevents_config_and_register(&to.clkevt, timer_of_rate(&to), 15, 159 0xffffffff); 160 return 0; 161 } 162 TIMER_OF_DECLARE(mlb_peritimer, "socionext,milbeaut-timer", 163 mlb_timer_init); 164