11802d0beSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-only
2fa63aa3dSTuomas Tynkkynen /*
3fa63aa3dSTuomas Tynkkynen * Utility functions for parsing Tegra CVB voltage tables
4fa63aa3dSTuomas Tynkkynen *
5b3cf8d06SJoseph Lo * Copyright (C) 2012-2019 NVIDIA Corporation. All rights reserved.
6fa63aa3dSTuomas Tynkkynen */
7fa63aa3dSTuomas Tynkkynen #include <linux/err.h>
8fa63aa3dSTuomas Tynkkynen #include <linux/kernel.h>
9fa63aa3dSTuomas Tynkkynen #include <linux/pm_opp.h>
10fa63aa3dSTuomas Tynkkynen
11fa63aa3dSTuomas Tynkkynen #include "cvb.h"
12fa63aa3dSTuomas Tynkkynen
13fa63aa3dSTuomas Tynkkynen /* cvb_mv = ((c2 * speedo / s_scale + c1) * speedo / s_scale + c0) */
get_cvb_voltage(int speedo,int s_scale,const struct cvb_coefficients * cvb)14fa63aa3dSTuomas Tynkkynen static inline int get_cvb_voltage(int speedo, int s_scale,
15fa63aa3dSTuomas Tynkkynen const struct cvb_coefficients *cvb)
16fa63aa3dSTuomas Tynkkynen {
17fa63aa3dSTuomas Tynkkynen int mv;
18fa63aa3dSTuomas Tynkkynen
19fa63aa3dSTuomas Tynkkynen /* apply only speedo scale: output mv = cvb_mv * v_scale */
20fa63aa3dSTuomas Tynkkynen mv = DIV_ROUND_CLOSEST(cvb->c2 * speedo, s_scale);
21fa63aa3dSTuomas Tynkkynen mv = DIV_ROUND_CLOSEST((mv + cvb->c1) * speedo, s_scale) + cvb->c0;
22fa63aa3dSTuomas Tynkkynen return mv;
23fa63aa3dSTuomas Tynkkynen }
24fa63aa3dSTuomas Tynkkynen
round_cvb_voltage(int mv,int v_scale,const struct rail_alignment * align)25fa63aa3dSTuomas Tynkkynen static int round_cvb_voltage(int mv, int v_scale,
26fa63aa3dSTuomas Tynkkynen const struct rail_alignment *align)
27fa63aa3dSTuomas Tynkkynen {
28fa63aa3dSTuomas Tynkkynen /* combined: apply voltage scale and round to cvb alignment step */
29fa63aa3dSTuomas Tynkkynen int uv;
30fa63aa3dSTuomas Tynkkynen int step = (align->step_uv ? : 1000) * v_scale;
31fa63aa3dSTuomas Tynkkynen int offset = align->offset_uv * v_scale;
32fa63aa3dSTuomas Tynkkynen
33fa63aa3dSTuomas Tynkkynen uv = max(mv * 1000, offset) - offset;
34fa63aa3dSTuomas Tynkkynen uv = DIV_ROUND_UP(uv, step) * align->step_uv + align->offset_uv;
35fa63aa3dSTuomas Tynkkynen return uv / 1000;
36fa63aa3dSTuomas Tynkkynen }
37fa63aa3dSTuomas Tynkkynen
38fa63aa3dSTuomas Tynkkynen enum {
39fa63aa3dSTuomas Tynkkynen DOWN,
40fa63aa3dSTuomas Tynkkynen UP
41fa63aa3dSTuomas Tynkkynen };
42fa63aa3dSTuomas Tynkkynen
round_voltage(int mv,const struct rail_alignment * align,int up)43fa63aa3dSTuomas Tynkkynen static int round_voltage(int mv, const struct rail_alignment *align, int up)
44fa63aa3dSTuomas Tynkkynen {
45fa63aa3dSTuomas Tynkkynen if (align->step_uv) {
46fa63aa3dSTuomas Tynkkynen int uv;
47fa63aa3dSTuomas Tynkkynen
48fa63aa3dSTuomas Tynkkynen uv = max(mv * 1000, align->offset_uv) - align->offset_uv;
49fa63aa3dSTuomas Tynkkynen uv = (uv + (up ? align->step_uv - 1 : 0)) / align->step_uv;
50fa63aa3dSTuomas Tynkkynen return (uv * align->step_uv + align->offset_uv) / 1000;
51fa63aa3dSTuomas Tynkkynen }
52fa63aa3dSTuomas Tynkkynen return mv;
53fa63aa3dSTuomas Tynkkynen }
54fa63aa3dSTuomas Tynkkynen
build_opp_table(struct device * dev,const struct cvb_table * table,struct rail_alignment * align,int speedo_value,unsigned long max_freq)55e8f6a68cSThierry Reding static int build_opp_table(struct device *dev, const struct cvb_table *table,
56b3cf8d06SJoseph Lo struct rail_alignment *align,
57e8f6a68cSThierry Reding int speedo_value, unsigned long max_freq)
58fa63aa3dSTuomas Tynkkynen {
59fa63aa3dSTuomas Tynkkynen int i, ret, dfll_mv, min_mv, max_mv;
60fa63aa3dSTuomas Tynkkynen
61e8f6a68cSThierry Reding min_mv = round_voltage(table->min_millivolts, align, UP);
62e8f6a68cSThierry Reding max_mv = round_voltage(table->max_millivolts, align, DOWN);
63fa63aa3dSTuomas Tynkkynen
64fa63aa3dSTuomas Tynkkynen for (i = 0; i < MAX_DVFS_FREQS; i++) {
65e8f6a68cSThierry Reding const struct cvb_table_freq_entry *entry = &table->entries[i];
66e8f6a68cSThierry Reding
67e8f6a68cSThierry Reding if (!entry->freq || (entry->freq > max_freq))
68fa63aa3dSTuomas Tynkkynen break;
69fa63aa3dSTuomas Tynkkynen
70e8f6a68cSThierry Reding dfll_mv = get_cvb_voltage(speedo_value, table->speedo_scale,
71e8f6a68cSThierry Reding &entry->coefficients);
72e8f6a68cSThierry Reding dfll_mv = round_cvb_voltage(dfll_mv, table->voltage_scale,
73e8f6a68cSThierry Reding align);
74fa63aa3dSTuomas Tynkkynen dfll_mv = clamp(dfll_mv, min_mv, max_mv);
75fa63aa3dSTuomas Tynkkynen
76e8f6a68cSThierry Reding ret = dev_pm_opp_add(dev, entry->freq, dfll_mv * 1000);
77fa63aa3dSTuomas Tynkkynen if (ret)
78fa63aa3dSTuomas Tynkkynen return ret;
79fa63aa3dSTuomas Tynkkynen }
80fa63aa3dSTuomas Tynkkynen
81fa63aa3dSTuomas Tynkkynen return 0;
82fa63aa3dSTuomas Tynkkynen }
83fa63aa3dSTuomas Tynkkynen
84fa63aa3dSTuomas Tynkkynen /**
85e8f6a68cSThierry Reding * tegra_cvb_add_opp_table - build OPP table from Tegra CVB tables
8642134fa2SJulia Lawall * @dev: the struct device * for which the OPP table is built
8742134fa2SJulia Lawall * @tables: array of CVB tables
8842134fa2SJulia Lawall * @count: size of the previously mentioned array
89*b565eb81SLee Jones * @align: parameters of the regulator step and offset
90fa63aa3dSTuomas Tynkkynen * @process_id: process id of the HW module
91fa63aa3dSTuomas Tynkkynen * @speedo_id: speedo id of the HW module
92fa63aa3dSTuomas Tynkkynen * @speedo_value: speedo value of the HW module
9342134fa2SJulia Lawall * @max_freq: highest safe clock rate
94fa63aa3dSTuomas Tynkkynen *
95fa63aa3dSTuomas Tynkkynen * On Tegra, a CVB table encodes the relationship between operating voltage
96fa63aa3dSTuomas Tynkkynen * and safe maximal frequency for a given module (e.g. GPU or CPU). This
97fa63aa3dSTuomas Tynkkynen * function calculates the optimal voltage-frequency operating points
98fa63aa3dSTuomas Tynkkynen * for the given arguments and exports them via the OPP library for the
9942134fa2SJulia Lawall * given @dev. Returns a pointer to the struct cvb_table that matched
100fa63aa3dSTuomas Tynkkynen * or an ERR_PTR on failure.
101fa63aa3dSTuomas Tynkkynen */
102e8f6a68cSThierry Reding const struct cvb_table *
tegra_cvb_add_opp_table(struct device * dev,const struct cvb_table * tables,size_t count,struct rail_alignment * align,int process_id,int speedo_id,int speedo_value,unsigned long max_freq)103e8f6a68cSThierry Reding tegra_cvb_add_opp_table(struct device *dev, const struct cvb_table *tables,
104b3cf8d06SJoseph Lo size_t count, struct rail_alignment *align,
105b3cf8d06SJoseph Lo int process_id, int speedo_id, int speedo_value,
106b3cf8d06SJoseph Lo unsigned long max_freq)
107fa63aa3dSTuomas Tynkkynen {
108e8f6a68cSThierry Reding size_t i;
109e8f6a68cSThierry Reding int ret;
110fa63aa3dSTuomas Tynkkynen
111e8f6a68cSThierry Reding for (i = 0; i < count; i++) {
112e8f6a68cSThierry Reding const struct cvb_table *table = &tables[i];
113fa63aa3dSTuomas Tynkkynen
114e8f6a68cSThierry Reding if (table->speedo_id != -1 && table->speedo_id != speedo_id)
115fa63aa3dSTuomas Tynkkynen continue;
116fa63aa3dSTuomas Tynkkynen
117e8f6a68cSThierry Reding if (table->process_id != -1 && table->process_id != process_id)
118e8f6a68cSThierry Reding continue;
119e8f6a68cSThierry Reding
120b3cf8d06SJoseph Lo ret = build_opp_table(dev, table, align, speedo_value,
121b3cf8d06SJoseph Lo max_freq);
122e8f6a68cSThierry Reding return ret ? ERR_PTR(ret) : table;
123fa63aa3dSTuomas Tynkkynen }
124fa63aa3dSTuomas Tynkkynen
125fa63aa3dSTuomas Tynkkynen return ERR_PTR(-EINVAL);
126fa63aa3dSTuomas Tynkkynen }
127f7c42d98SThierry Reding
tegra_cvb_remove_opp_table(struct device * dev,const struct cvb_table * table,unsigned long max_freq)128f7c42d98SThierry Reding void tegra_cvb_remove_opp_table(struct device *dev,
129f7c42d98SThierry Reding const struct cvb_table *table,
130f7c42d98SThierry Reding unsigned long max_freq)
131f7c42d98SThierry Reding {
132f7c42d98SThierry Reding unsigned int i;
133f7c42d98SThierry Reding
134f7c42d98SThierry Reding for (i = 0; i < MAX_DVFS_FREQS; i++) {
135f7c42d98SThierry Reding const struct cvb_table_freq_entry *entry = &table->entries[i];
136f7c42d98SThierry Reding
137f7c42d98SThierry Reding if (!entry->freq || (entry->freq > max_freq))
138f7c42d98SThierry Reding break;
139f7c42d98SThierry Reding
140f7c42d98SThierry Reding dev_pm_opp_remove(dev, entry->freq);
141f7c42d98SThierry Reding }
142f7c42d98SThierry Reding }
143