1*9c92ab61SThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-only */
2df6561e6SMaxime Ripard /*
3df6561e6SMaxime Ripard * Copyright (c) 2016 Maxime Ripard. All rights reserved.
4df6561e6SMaxime Ripard */
5df6561e6SMaxime Ripard
6df6561e6SMaxime Ripard #ifndef _CCU_NKM_H_
7df6561e6SMaxime Ripard #define _CCU_NKM_H_
8df6561e6SMaxime Ripard
9df6561e6SMaxime Ripard #include <linux/clk-provider.h>
10df6561e6SMaxime Ripard
11df6561e6SMaxime Ripard #include "ccu_common.h"
12df6561e6SMaxime Ripard #include "ccu_div.h"
13df6561e6SMaxime Ripard #include "ccu_mult.h"
14df6561e6SMaxime Ripard
15df6561e6SMaxime Ripard /*
16df6561e6SMaxime Ripard * struct ccu_nkm - Definition of an N-K-M clock
17df6561e6SMaxime Ripard *
18df6561e6SMaxime Ripard * Clocks based on the formula parent * N * K / M
19df6561e6SMaxime Ripard */
20df6561e6SMaxime Ripard struct ccu_nkm {
21df6561e6SMaxime Ripard u32 enable;
22df6561e6SMaxime Ripard u32 lock;
23df6561e6SMaxime Ripard
24a501a14eSMaxime Ripard struct ccu_mult_internal n;
25a501a14eSMaxime Ripard struct ccu_mult_internal k;
26a501a14eSMaxime Ripard struct ccu_div_internal m;
27a3658359SChen-Yu Tsai struct ccu_mux_internal mux;
28df6561e6SMaxime Ripard
29a6653773SIcenowy Zheng unsigned int fixed_post_div;
30a6653773SIcenowy Zheng
31df6561e6SMaxime Ripard struct ccu_common common;
32df6561e6SMaxime Ripard };
33df6561e6SMaxime Ripard
34a3658359SChen-Yu Tsai #define SUNXI_CCU_NKM_WITH_MUX_GATE_LOCK(_struct, _name, _parents, _reg, \
35a3658359SChen-Yu Tsai _nshift, _nwidth, \
36a3658359SChen-Yu Tsai _kshift, _kwidth, \
37a3658359SChen-Yu Tsai _mshift, _mwidth, \
38a3658359SChen-Yu Tsai _muxshift, _muxwidth, \
39a3658359SChen-Yu Tsai _gate, _lock, _flags) \
40a3658359SChen-Yu Tsai struct ccu_nkm _struct = { \
41a3658359SChen-Yu Tsai .enable = _gate, \
42a3658359SChen-Yu Tsai .lock = _lock, \
43a3658359SChen-Yu Tsai .k = _SUNXI_CCU_MULT(_kshift, _kwidth), \
44a3658359SChen-Yu Tsai .n = _SUNXI_CCU_MULT(_nshift, _nwidth), \
45a3658359SChen-Yu Tsai .m = _SUNXI_CCU_DIV(_mshift, _mwidth), \
4689af8525SMaxime Ripard .mux = _SUNXI_CCU_MUX(_muxshift, _muxwidth), \
47a3658359SChen-Yu Tsai .common = { \
48a3658359SChen-Yu Tsai .reg = _reg, \
49a3658359SChen-Yu Tsai .hw.init = CLK_HW_INIT_PARENTS(_name, \
50a3658359SChen-Yu Tsai _parents, \
51a3658359SChen-Yu Tsai &ccu_nkm_ops, \
52a3658359SChen-Yu Tsai _flags), \
53a3658359SChen-Yu Tsai }, \
54a3658359SChen-Yu Tsai }
55a3658359SChen-Yu Tsai
56df6561e6SMaxime Ripard #define SUNXI_CCU_NKM_WITH_GATE_LOCK(_struct, _name, _parent, _reg, \
57df6561e6SMaxime Ripard _nshift, _nwidth, \
58df6561e6SMaxime Ripard _kshift, _kwidth, \
59df6561e6SMaxime Ripard _mshift, _mwidth, \
60df6561e6SMaxime Ripard _gate, _lock, _flags) \
61df6561e6SMaxime Ripard struct ccu_nkm _struct = { \
62df6561e6SMaxime Ripard .enable = _gate, \
63df6561e6SMaxime Ripard .lock = _lock, \
64df6561e6SMaxime Ripard .k = _SUNXI_CCU_MULT(_kshift, _kwidth), \
65df6561e6SMaxime Ripard .n = _SUNXI_CCU_MULT(_nshift, _nwidth), \
66df6561e6SMaxime Ripard .m = _SUNXI_CCU_DIV(_mshift, _mwidth), \
67df6561e6SMaxime Ripard .common = { \
68df6561e6SMaxime Ripard .reg = _reg, \
69df6561e6SMaxime Ripard .hw.init = CLK_HW_INIT(_name, \
70df6561e6SMaxime Ripard _parent, \
71df6561e6SMaxime Ripard &ccu_nkm_ops, \
72df6561e6SMaxime Ripard _flags), \
73df6561e6SMaxime Ripard }, \
74df6561e6SMaxime Ripard }
75df6561e6SMaxime Ripard
hw_to_ccu_nkm(struct clk_hw * hw)76df6561e6SMaxime Ripard static inline struct ccu_nkm *hw_to_ccu_nkm(struct clk_hw *hw)
77df6561e6SMaxime Ripard {
78df6561e6SMaxime Ripard struct ccu_common *common = hw_to_ccu_common(hw);
79df6561e6SMaxime Ripard
80df6561e6SMaxime Ripard return container_of(common, struct ccu_nkm, common);
81df6561e6SMaxime Ripard }
82df6561e6SMaxime Ripard
83df6561e6SMaxime Ripard extern const struct clk_ops ccu_nkm_ops;
84df6561e6SMaxime Ripard
85df6561e6SMaxime Ripard #endif /* _CCU_NKM_H_ */
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