1fb038ce4SYangtao Li // SPDX-License-Identifier: GPL-2.0
2fb038ce4SYangtao Li /*
3fb038ce4SYangtao Li * Copyright (c) 2020 Yangtao Li <frank@allwinnertech.com>
4fb038ce4SYangtao Li */
5fb038ce4SYangtao Li
6fb038ce4SYangtao Li #include <linux/clk-provider.h>
7fb038ce4SYangtao Li #include <linux/module.h>
8fb038ce4SYangtao Li #include <linux/platform_device.h>
9fb038ce4SYangtao Li
10fb038ce4SYangtao Li #include "ccu_common.h"
11fb038ce4SYangtao Li #include "ccu_reset.h"
12fb038ce4SYangtao Li
13fb038ce4SYangtao Li #include "ccu_div.h"
14fb038ce4SYangtao Li #include "ccu_gate.h"
15fb038ce4SYangtao Li #include "ccu_mp.h"
16fb038ce4SYangtao Li #include "ccu_nm.h"
17fb038ce4SYangtao Li
18fb038ce4SYangtao Li #include "ccu-sun50i-a100-r.h"
19fb038ce4SYangtao Li
20fb038ce4SYangtao Li static const char * const cpus_r_apb2_parents[] = { "dcxo24M", "osc32k",
21fb038ce4SYangtao Li "iosc", "pll-periph0" };
22fb038ce4SYangtao Li static const struct ccu_mux_var_prediv cpus_r_apb2_predivs[] = {
23fb038ce4SYangtao Li { .index = 3, .shift = 0, .width = 5 },
24fb038ce4SYangtao Li };
25fb038ce4SYangtao Li
26fb038ce4SYangtao Li static struct ccu_div r_cpus_clk = {
27fb038ce4SYangtao Li .div = _SUNXI_CCU_DIV_FLAGS(8, 2, CLK_DIVIDER_POWER_OF_TWO),
28fb038ce4SYangtao Li
29fb038ce4SYangtao Li .mux = {
30fb038ce4SYangtao Li .shift = 24,
31fb038ce4SYangtao Li .width = 2,
32fb038ce4SYangtao Li
33fb038ce4SYangtao Li .var_predivs = cpus_r_apb2_predivs,
34fb038ce4SYangtao Li .n_var_predivs = ARRAY_SIZE(cpus_r_apb2_predivs),
35fb038ce4SYangtao Li },
36fb038ce4SYangtao Li
37fb038ce4SYangtao Li .common = {
38fb038ce4SYangtao Li .reg = 0x000,
39fb038ce4SYangtao Li .features = CCU_FEATURE_VARIABLE_PREDIV,
40fb038ce4SYangtao Li .hw.init = CLK_HW_INIT_PARENTS("cpus",
41fb038ce4SYangtao Li cpus_r_apb2_parents,
42fb038ce4SYangtao Li &ccu_div_ops,
43fb038ce4SYangtao Li 0),
44fb038ce4SYangtao Li },
45fb038ce4SYangtao Li };
46fb038ce4SYangtao Li
47fb038ce4SYangtao Li static CLK_FIXED_FACTOR_HW(r_ahb_clk, "r-ahb", &r_cpus_clk.common.hw, 1, 1, 0);
48fb038ce4SYangtao Li
49fb038ce4SYangtao Li static struct ccu_div r_apb1_clk = {
50fb038ce4SYangtao Li .div = _SUNXI_CCU_DIV(0, 2),
51fb038ce4SYangtao Li
52fb038ce4SYangtao Li .common = {
53fb038ce4SYangtao Li .reg = 0x00c,
54fb038ce4SYangtao Li .hw.init = CLK_HW_INIT("r-apb1",
55fb038ce4SYangtao Li "r-ahb",
56fb038ce4SYangtao Li &ccu_div_ops,
57fb038ce4SYangtao Li 0),
58fb038ce4SYangtao Li },
59fb038ce4SYangtao Li };
60fb038ce4SYangtao Li
61fb038ce4SYangtao Li static struct ccu_div r_apb2_clk = {
62fb038ce4SYangtao Li .div = _SUNXI_CCU_DIV_FLAGS(8, 2, CLK_DIVIDER_POWER_OF_TWO),
63fb038ce4SYangtao Li
64fb038ce4SYangtao Li .mux = {
65fb038ce4SYangtao Li .shift = 24,
66fb038ce4SYangtao Li .width = 2,
67fb038ce4SYangtao Li
68fb038ce4SYangtao Li .var_predivs = cpus_r_apb2_predivs,
69fb038ce4SYangtao Li .n_var_predivs = ARRAY_SIZE(cpus_r_apb2_predivs),
70fb038ce4SYangtao Li },
71fb038ce4SYangtao Li
72fb038ce4SYangtao Li .common = {
73fb038ce4SYangtao Li .reg = 0x010,
74fb038ce4SYangtao Li .features = CCU_FEATURE_VARIABLE_PREDIV,
75fb038ce4SYangtao Li .hw.init = CLK_HW_INIT_PARENTS("r-apb2",
76fb038ce4SYangtao Li cpus_r_apb2_parents,
77fb038ce4SYangtao Li &ccu_div_ops,
78fb038ce4SYangtao Li 0),
79fb038ce4SYangtao Li },
80fb038ce4SYangtao Li };
81fb038ce4SYangtao Li
82fb038ce4SYangtao Li static const struct clk_parent_data clk_parent_r_apb1[] = {
83fb038ce4SYangtao Li { .hw = &r_apb1_clk.common.hw },
84fb038ce4SYangtao Li };
85fb038ce4SYangtao Li
86fb038ce4SYangtao Li static const struct clk_parent_data clk_parent_r_apb2[] = {
87fb038ce4SYangtao Li { .hw = &r_apb2_clk.common.hw },
88fb038ce4SYangtao Li };
89fb038ce4SYangtao Li
90fb038ce4SYangtao Li static SUNXI_CCU_GATE_DATA(r_apb1_timer_clk, "r-apb1-timer", clk_parent_r_apb1,
91fb038ce4SYangtao Li 0x11c, BIT(0), 0);
92fb038ce4SYangtao Li
93fb038ce4SYangtao Li static SUNXI_CCU_GATE_DATA(r_apb1_twd_clk, "r-apb1-twd", clk_parent_r_apb1,
94fb038ce4SYangtao Li 0x12c, BIT(0), 0);
95fb038ce4SYangtao Li
96fb038ce4SYangtao Li static const char * const r_apb1_pwm_clk_parents[] = { "dcxo24M", "osc32k",
97fb038ce4SYangtao Li "iosc" };
98fb038ce4SYangtao Li static SUNXI_CCU_MUX(r_apb1_pwm_clk, "r-apb1-pwm", r_apb1_pwm_clk_parents,
99fb038ce4SYangtao Li 0x130, 24, 2, 0);
100fb038ce4SYangtao Li
101fb038ce4SYangtao Li static SUNXI_CCU_GATE_DATA(r_apb1_bus_pwm_clk, "r-apb1-bus-pwm",
102fb038ce4SYangtao Li clk_parent_r_apb1, 0x13c, BIT(0), 0);
103fb038ce4SYangtao Li
104fb038ce4SYangtao Li static SUNXI_CCU_GATE_DATA(r_apb1_ppu_clk, "r-apb1-ppu", clk_parent_r_apb1,
105fb038ce4SYangtao Li 0x17c, BIT(0), 0);
106fb038ce4SYangtao Li
107fb038ce4SYangtao Li static SUNXI_CCU_GATE_DATA(r_apb2_uart_clk, "r-apb2-uart", clk_parent_r_apb2,
108fb038ce4SYangtao Li 0x18c, BIT(0), 0);
109fb038ce4SYangtao Li
110fb038ce4SYangtao Li static SUNXI_CCU_GATE_DATA(r_apb2_i2c0_clk, "r-apb2-i2c0", clk_parent_r_apb2,
111fb038ce4SYangtao Li 0x19c, BIT(0), 0);
112fb038ce4SYangtao Li
113fb038ce4SYangtao Li static SUNXI_CCU_GATE_DATA(r_apb2_i2c1_clk, "r-apb2-i2c1", clk_parent_r_apb2,
114fb038ce4SYangtao Li 0x19c, BIT(1), 0);
115fb038ce4SYangtao Li
116fb038ce4SYangtao Li static const char * const r_apb1_ir_rx_parents[] = { "osc32k", "dcxo24M" };
117fb038ce4SYangtao Li static SUNXI_CCU_MP_WITH_MUX_GATE(r_apb1_ir_rx_clk, "r-apb1-ir-rx",
118fb038ce4SYangtao Li r_apb1_ir_rx_parents, 0x1c0,
119fb038ce4SYangtao Li 0, 5, /* M */
120fb038ce4SYangtao Li 8, 2, /* P */
121fb038ce4SYangtao Li 24, 1, /* mux */
122fb038ce4SYangtao Li BIT(31), /* gate */
123fb038ce4SYangtao Li 0);
124fb038ce4SYangtao Li
125fb038ce4SYangtao Li static SUNXI_CCU_GATE_DATA(r_apb1_bus_ir_rx_clk, "r-apb1-bus-ir-rx",
126fb038ce4SYangtao Li clk_parent_r_apb1, 0x1cc, BIT(0), 0);
127fb038ce4SYangtao Li
128fb038ce4SYangtao Li static SUNXI_CCU_GATE(r_ahb_bus_rtc_clk, "r-ahb-rtc", "r-ahb",
129fb038ce4SYangtao Li 0x20c, BIT(0), 0);
130fb038ce4SYangtao Li
131fb038ce4SYangtao Li static struct ccu_common *sun50i_a100_r_ccu_clks[] = {
132fb038ce4SYangtao Li &r_cpus_clk.common,
133fb038ce4SYangtao Li &r_apb1_clk.common,
134fb038ce4SYangtao Li &r_apb2_clk.common,
135fb038ce4SYangtao Li &r_apb1_timer_clk.common,
136fb038ce4SYangtao Li &r_apb1_twd_clk.common,
137fb038ce4SYangtao Li &r_apb1_pwm_clk.common,
138fb038ce4SYangtao Li &r_apb1_bus_pwm_clk.common,
139fb038ce4SYangtao Li &r_apb1_ppu_clk.common,
140fb038ce4SYangtao Li &r_apb2_uart_clk.common,
141fb038ce4SYangtao Li &r_apb2_i2c0_clk.common,
142fb038ce4SYangtao Li &r_apb2_i2c1_clk.common,
143fb038ce4SYangtao Li &r_apb1_ir_rx_clk.common,
144fb038ce4SYangtao Li &r_apb1_bus_ir_rx_clk.common,
145fb038ce4SYangtao Li &r_ahb_bus_rtc_clk.common,
146fb038ce4SYangtao Li };
147fb038ce4SYangtao Li
148fb038ce4SYangtao Li static struct clk_hw_onecell_data sun50i_a100_r_hw_clks = {
149fb038ce4SYangtao Li .hws = {
150fb038ce4SYangtao Li [CLK_R_CPUS] = &r_cpus_clk.common.hw,
151fb038ce4SYangtao Li [CLK_R_AHB] = &r_ahb_clk.hw,
152fb038ce4SYangtao Li [CLK_R_APB1] = &r_apb1_clk.common.hw,
153fb038ce4SYangtao Li [CLK_R_APB2] = &r_apb2_clk.common.hw,
154fb038ce4SYangtao Li [CLK_R_APB1_TIMER] = &r_apb1_timer_clk.common.hw,
155fb038ce4SYangtao Li [CLK_R_APB1_TWD] = &r_apb1_twd_clk.common.hw,
156fb038ce4SYangtao Li [CLK_R_APB1_PWM] = &r_apb1_pwm_clk.common.hw,
157fb038ce4SYangtao Li [CLK_R_APB1_BUS_PWM] = &r_apb1_bus_pwm_clk.common.hw,
158fb038ce4SYangtao Li [CLK_R_APB1_PPU] = &r_apb1_ppu_clk.common.hw,
159fb038ce4SYangtao Li [CLK_R_APB2_UART] = &r_apb2_uart_clk.common.hw,
160fb038ce4SYangtao Li [CLK_R_APB2_I2C0] = &r_apb2_i2c0_clk.common.hw,
161fb038ce4SYangtao Li [CLK_R_APB2_I2C1] = &r_apb2_i2c1_clk.common.hw,
162fb038ce4SYangtao Li [CLK_R_APB1_IR] = &r_apb1_ir_rx_clk.common.hw,
163fb038ce4SYangtao Li [CLK_R_APB1_BUS_IR] = &r_apb1_bus_ir_rx_clk.common.hw,
164fb038ce4SYangtao Li [CLK_R_AHB_BUS_RTC] = &r_ahb_bus_rtc_clk.common.hw,
165fb038ce4SYangtao Li },
166fb038ce4SYangtao Li .num = CLK_NUMBER,
167fb038ce4SYangtao Li };
168fb038ce4SYangtao Li
169fb038ce4SYangtao Li static struct ccu_reset_map sun50i_a100_r_ccu_resets[] = {
170fb038ce4SYangtao Li [RST_R_APB1_TIMER] = { 0x11c, BIT(16) },
171fb038ce4SYangtao Li [RST_R_APB1_BUS_PWM] = { 0x13c, BIT(16) },
172fb038ce4SYangtao Li [RST_R_APB1_PPU] = { 0x17c, BIT(16) },
173fb038ce4SYangtao Li [RST_R_APB2_UART] = { 0x18c, BIT(16) },
174fb038ce4SYangtao Li [RST_R_APB2_I2C0] = { 0x19c, BIT(16) },
175fb038ce4SYangtao Li [RST_R_APB2_I2C1] = { 0x19c, BIT(17) },
176fb038ce4SYangtao Li [RST_R_APB1_BUS_IR] = { 0x1cc, BIT(16) },
177fb038ce4SYangtao Li [RST_R_AHB_BUS_RTC] = { 0x20c, BIT(16) },
178fb038ce4SYangtao Li };
179fb038ce4SYangtao Li
180fb038ce4SYangtao Li static const struct sunxi_ccu_desc sun50i_a100_r_ccu_desc = {
181fb038ce4SYangtao Li .ccu_clks = sun50i_a100_r_ccu_clks,
182fb038ce4SYangtao Li .num_ccu_clks = ARRAY_SIZE(sun50i_a100_r_ccu_clks),
183fb038ce4SYangtao Li
184fb038ce4SYangtao Li .hw_clks = &sun50i_a100_r_hw_clks,
185fb038ce4SYangtao Li
186fb038ce4SYangtao Li .resets = sun50i_a100_r_ccu_resets,
187fb038ce4SYangtao Li .num_resets = ARRAY_SIZE(sun50i_a100_r_ccu_resets),
188fb038ce4SYangtao Li };
189fb038ce4SYangtao Li
sun50i_a100_r_ccu_probe(struct platform_device * pdev)190fb038ce4SYangtao Li static int sun50i_a100_r_ccu_probe(struct platform_device *pdev)
191fb038ce4SYangtao Li {
192fb038ce4SYangtao Li void __iomem *reg;
193fb038ce4SYangtao Li
194fb038ce4SYangtao Li reg = devm_platform_ioremap_resource(pdev, 0);
195fb038ce4SYangtao Li if (IS_ERR(reg))
196fb038ce4SYangtao Li return PTR_ERR(reg);
197fb038ce4SYangtao Li
1989bec2b9cSSamuel Holland return devm_sunxi_ccu_probe(&pdev->dev, reg, &sun50i_a100_r_ccu_desc);
199fb038ce4SYangtao Li }
200fb038ce4SYangtao Li
201fb038ce4SYangtao Li static const struct of_device_id sun50i_a100_r_ccu_ids[] = {
202fb038ce4SYangtao Li { .compatible = "allwinner,sun50i-a100-r-ccu" },
203fb038ce4SYangtao Li { }
204fb038ce4SYangtao Li };
205fb038ce4SYangtao Li
206fb038ce4SYangtao Li static struct platform_driver sun50i_a100_r_ccu_driver = {
207fb038ce4SYangtao Li .probe = sun50i_a100_r_ccu_probe,
208fb038ce4SYangtao Li .driver = {
209fb038ce4SYangtao Li .name = "sun50i-a100-r-ccu",
21066028ddbSSamuel Holland .suppress_bind_attrs = true,
211fb038ce4SYangtao Li .of_match_table = sun50i_a100_r_ccu_ids,
212fb038ce4SYangtao Li },
213fb038ce4SYangtao Li };
214fb038ce4SYangtao Li module_platform_driver(sun50i_a100_r_ccu_driver);
215*c8c525b0SSamuel Holland
216*c8c525b0SSamuel Holland MODULE_IMPORT_NS(SUNXI_CCU);
217*c8c525b0SSamuel Holland MODULE_LICENSE("GPL");
218