xref: /openbmc/linux/drivers/clk/sprd/mux.h (revision ead5d1f4d877e92c051e1a1ade623d0d30e71619)
17a12f838SNishad Kamdar /* SPDX-License-Identifier: GPL-2.0 */
2ab73cf2aSChunyan Zhang //
3ab73cf2aSChunyan Zhang // Spreadtrum multiplexer clock driver
4ab73cf2aSChunyan Zhang //
5ab73cf2aSChunyan Zhang // Copyright (C) 2017 Spreadtrum, Inc.
6ab73cf2aSChunyan Zhang // Author: Chunyan Zhang <chunyan.zhang@spreadtrum.com>
7ab73cf2aSChunyan Zhang 
8ab73cf2aSChunyan Zhang #ifndef _SPRD_MUX_H_
9ab73cf2aSChunyan Zhang #define _SPRD_MUX_H_
10ab73cf2aSChunyan Zhang 
11ab73cf2aSChunyan Zhang #include "common.h"
12ab73cf2aSChunyan Zhang 
13ab73cf2aSChunyan Zhang /**
14ab73cf2aSChunyan Zhang  * struct sprd_mux_ssel - Mux clock's source select bits in its register
15ab73cf2aSChunyan Zhang  * @shift: Bit offset of the divider in its register
16ab73cf2aSChunyan Zhang  * @width: Width of the divider field in its register
17ab73cf2aSChunyan Zhang  * @table: For some mux clocks, not all sources are used on some special
18ab73cf2aSChunyan Zhang  *	   chips, this matches the value of mux clock's register and the
19ab73cf2aSChunyan Zhang  *	   sources which are used for this mux clock
20ab73cf2aSChunyan Zhang  */
21ab73cf2aSChunyan Zhang struct sprd_mux_ssel {
22ab73cf2aSChunyan Zhang 	u8		shift;
23ab73cf2aSChunyan Zhang 	u8		width;
24ab73cf2aSChunyan Zhang 	const u8	*table;
25ab73cf2aSChunyan Zhang };
26ab73cf2aSChunyan Zhang 
27ab73cf2aSChunyan Zhang struct sprd_mux {
28ab73cf2aSChunyan Zhang 	struct sprd_mux_ssel mux;
29ab73cf2aSChunyan Zhang 	struct sprd_clk_common	common;
30ab73cf2aSChunyan Zhang };
31ab73cf2aSChunyan Zhang 
32ab73cf2aSChunyan Zhang #define _SPRD_MUX_CLK(_shift, _width, _table)		\
33ab73cf2aSChunyan Zhang 	{						\
34ab73cf2aSChunyan Zhang 		.shift	= _shift,			\
35ab73cf2aSChunyan Zhang 		.width	= _width,			\
36ab73cf2aSChunyan Zhang 		.table	= _table,			\
37ab73cf2aSChunyan Zhang 	}
38ab73cf2aSChunyan Zhang 
39*ea8ca310SChunyan Zhang #define SPRD_MUX_CLK_HW_INIT_FN(_struct, _name, _parents, _table,	\
40*ea8ca310SChunyan Zhang 				_reg, _shift, _width, _flags, _fn)	\
41ab73cf2aSChunyan Zhang 	struct sprd_mux _struct = {					\
42ab73cf2aSChunyan Zhang 		.mux	= _SPRD_MUX_CLK(_shift, _width, _table),	\
43ab73cf2aSChunyan Zhang 		.common	= {						\
44ab73cf2aSChunyan Zhang 			.regmap		= NULL,				\
45ab73cf2aSChunyan Zhang 			.reg		= _reg,				\
46*ea8ca310SChunyan Zhang 			.hw.init = _fn(_name, _parents,			\
47*ea8ca310SChunyan Zhang 				       &sprd_mux_ops, _flags),		\
48ab73cf2aSChunyan Zhang 		}							\
49ab73cf2aSChunyan Zhang 	}
50ab73cf2aSChunyan Zhang 
51*ea8ca310SChunyan Zhang #define SPRD_MUX_CLK_TABLE(_struct, _name, _parents, _table,		\
52*ea8ca310SChunyan Zhang 			   _reg, _shift, _width, _flags)		\
53*ea8ca310SChunyan Zhang 	SPRD_MUX_CLK_HW_INIT_FN(_struct, _name, _parents, _table,	\
54*ea8ca310SChunyan Zhang 				_reg, _shift, _width, _flags,		\
55*ea8ca310SChunyan Zhang 				CLK_HW_INIT_PARENTS)
56*ea8ca310SChunyan Zhang 
57ab73cf2aSChunyan Zhang #define SPRD_MUX_CLK(_struct, _name, _parents, _reg,		\
58ab73cf2aSChunyan Zhang 		     _shift, _width, _flags)			\
59ab73cf2aSChunyan Zhang 	SPRD_MUX_CLK_TABLE(_struct, _name, _parents, NULL,	\
60ab73cf2aSChunyan Zhang 			   _reg, _shift, _width, _flags)
61ab73cf2aSChunyan Zhang 
62*ea8ca310SChunyan Zhang #define SPRD_MUX_CLK_DATA_TABLE(_struct, _name, _parents, _table,	\
63*ea8ca310SChunyan Zhang 				_reg, _shift, _width, _flags)		\
64*ea8ca310SChunyan Zhang 	SPRD_MUX_CLK_HW_INIT_FN(_struct, _name, _parents, _table,	\
65*ea8ca310SChunyan Zhang 				_reg, _shift, _width, _flags,		\
66*ea8ca310SChunyan Zhang 				CLK_HW_INIT_PARENTS_DATA)
67*ea8ca310SChunyan Zhang 
68*ea8ca310SChunyan Zhang #define SPRD_MUX_CLK_DATA(_struct, _name, _parents, _reg,		\
69*ea8ca310SChunyan Zhang 			  _shift, _width, _flags)			\
70*ea8ca310SChunyan Zhang 	SPRD_MUX_CLK_DATA_TABLE(_struct, _name, _parents, NULL,		\
71*ea8ca310SChunyan Zhang 				_reg, _shift, _width, _flags)
72*ea8ca310SChunyan Zhang 
hw_to_sprd_mux(const struct clk_hw * hw)73ab73cf2aSChunyan Zhang static inline struct sprd_mux *hw_to_sprd_mux(const struct clk_hw *hw)
74ab73cf2aSChunyan Zhang {
75ab73cf2aSChunyan Zhang 	struct sprd_clk_common *common = hw_to_sprd_clk_common(hw);
76ab73cf2aSChunyan Zhang 
77ab73cf2aSChunyan Zhang 	return container_of(common, struct sprd_mux, common);
78ab73cf2aSChunyan Zhang }
79ab73cf2aSChunyan Zhang 
80ab73cf2aSChunyan Zhang extern const struct clk_ops sprd_mux_ops;
81ab73cf2aSChunyan Zhang 
82ab73cf2aSChunyan Zhang u8 sprd_mux_helper_get_parent(const struct sprd_clk_common *common,
83ab73cf2aSChunyan Zhang 			      const struct sprd_mux_ssel *mux);
84ab73cf2aSChunyan Zhang int sprd_mux_helper_set_parent(const struct sprd_clk_common *common,
85ab73cf2aSChunyan Zhang 			       const struct sprd_mux_ssel *mux,
86ab73cf2aSChunyan Zhang 			       u8 index);
87ab73cf2aSChunyan Zhang 
88ab73cf2aSChunyan Zhang #endif /* _SPRD_MUX_H_ */
89