xref: /openbmc/linux/drivers/clk/mediatek/clk-mt8188-img.c (revision 1ac731c529cd4d6adbce134754b51ff7d822b145)
1*b281039aSGarmin.Chang // SPDX-License-Identifier: GPL-2.0-only
2*b281039aSGarmin.Chang /*
3*b281039aSGarmin.Chang  * Copyright (c) 2022 MediaTek Inc.
4*b281039aSGarmin.Chang  * Author: Garmin Chang <garmin.chang@mediatek.com>
5*b281039aSGarmin.Chang  */
6*b281039aSGarmin.Chang 
7*b281039aSGarmin.Chang #include <dt-bindings/clock/mediatek,mt8188-clk.h>
8*b281039aSGarmin.Chang #include <linux/clk-provider.h>
9*b281039aSGarmin.Chang #include <linux/platform_device.h>
10*b281039aSGarmin.Chang 
11*b281039aSGarmin.Chang #include "clk-gate.h"
12*b281039aSGarmin.Chang #include "clk-mtk.h"
13*b281039aSGarmin.Chang 
14*b281039aSGarmin.Chang static const struct mtk_gate_regs imgsys_cg_regs = {
15*b281039aSGarmin.Chang 	.set_ofs = 0x4,
16*b281039aSGarmin.Chang 	.clr_ofs = 0x8,
17*b281039aSGarmin.Chang 	.sta_ofs = 0x0,
18*b281039aSGarmin.Chang };
19*b281039aSGarmin.Chang 
20*b281039aSGarmin.Chang #define GATE_IMGSYS(_id, _name, _parent, _shift)			\
21*b281039aSGarmin.Chang 	GATE_MTK(_id, _name, _parent, &imgsys_cg_regs, _shift, &mtk_clk_gate_ops_setclr)
22*b281039aSGarmin.Chang 
23*b281039aSGarmin.Chang static const struct mtk_gate imgsys_main_clks[] = {
24*b281039aSGarmin.Chang 	GATE_IMGSYS(CLK_IMGSYS_MAIN_LARB9, "imgsys_main_larb9", "top_img", 0),
25*b281039aSGarmin.Chang 	GATE_IMGSYS(CLK_IMGSYS_MAIN_TRAW0, "imgsys_main_traw0", "top_img", 1),
26*b281039aSGarmin.Chang 	GATE_IMGSYS(CLK_IMGSYS_MAIN_TRAW1, "imgsys_main_traw1", "top_img", 2),
27*b281039aSGarmin.Chang 	GATE_IMGSYS(CLK_IMGSYS_MAIN_VCORE_GALS, "imgsys_main_vcore_gals", "top_img", 3),
28*b281039aSGarmin.Chang 	GATE_IMGSYS(CLK_IMGSYS_MAIN_DIP0, "imgsys_main_dip0", "top_img", 8),
29*b281039aSGarmin.Chang 	GATE_IMGSYS(CLK_IMGSYS_MAIN_WPE0, "imgsys_main_wpe0", "top_img", 9),
30*b281039aSGarmin.Chang 	GATE_IMGSYS(CLK_IMGSYS_MAIN_IPE, "imgsys_main_ipe", "top_img", 10),
31*b281039aSGarmin.Chang 	GATE_IMGSYS(CLK_IMGSYS_MAIN_WPE1, "imgsys_main_wpe1", "top_img", 12),
32*b281039aSGarmin.Chang 	GATE_IMGSYS(CLK_IMGSYS_MAIN_WPE2, "imgsys_main_wpe2", "top_img", 13),
33*b281039aSGarmin.Chang 	GATE_IMGSYS(CLK_IMGSYS_MAIN_GALS, "imgsys_main_gals", "top_img", 31),
34*b281039aSGarmin.Chang };
35*b281039aSGarmin.Chang 
36*b281039aSGarmin.Chang static const struct mtk_gate imgsys_wpe1_clks[] = {
37*b281039aSGarmin.Chang 	GATE_IMGSYS(CLK_IMGSYS_WPE1_LARB11, "imgsys_wpe1_larb11", "top_img", 0),
38*b281039aSGarmin.Chang 	GATE_IMGSYS(CLK_IMGSYS_WPE1, "imgsys_wpe1", "top_img", 1),
39*b281039aSGarmin.Chang };
40*b281039aSGarmin.Chang 
41*b281039aSGarmin.Chang static const struct mtk_gate imgsys_wpe2_clks[] = {
42*b281039aSGarmin.Chang 	GATE_IMGSYS(CLK_IMGSYS_WPE2_LARB11, "imgsys_wpe2_larb11", "top_img", 0),
43*b281039aSGarmin.Chang 	GATE_IMGSYS(CLK_IMGSYS_WPE2, "imgsys_wpe2", "top_img", 1),
44*b281039aSGarmin.Chang };
45*b281039aSGarmin.Chang 
46*b281039aSGarmin.Chang static const struct mtk_gate imgsys_wpe3_clks[] = {
47*b281039aSGarmin.Chang 	GATE_IMGSYS(CLK_IMGSYS_WPE3_LARB11, "imgsys_wpe3_larb11", "top_img", 0),
48*b281039aSGarmin.Chang 	GATE_IMGSYS(CLK_IMGSYS_WPE3, "imgsys_wpe3", "top_img", 1),
49*b281039aSGarmin.Chang };
50*b281039aSGarmin.Chang 
51*b281039aSGarmin.Chang static const struct mtk_gate imgsys1_dip_top_clks[] = {
52*b281039aSGarmin.Chang 	GATE_IMGSYS(CLK_IMGSYS1_DIP_TOP_LARB10, "imgsys1_dip_larb10", "top_img", 0),
53*b281039aSGarmin.Chang 	GATE_IMGSYS(CLK_IMGSYS1_DIP_TOP_DIP_TOP, "imgsys1_dip_dip_top", "top_img", 1),
54*b281039aSGarmin.Chang };
55*b281039aSGarmin.Chang 
56*b281039aSGarmin.Chang static const struct mtk_gate imgsys1_dip_nr_clks[] = {
57*b281039aSGarmin.Chang 	GATE_IMGSYS(CLK_IMGSYS1_DIP_NR_LARB15, "imgsys1_dip_nr_larb15", "top_img", 0),
58*b281039aSGarmin.Chang 	GATE_IMGSYS(CLK_IMGSYS1_DIP_NR_DIP_NR, "imgsys1_dip_nr_dip_nr", "top_img", 1),
59*b281039aSGarmin.Chang };
60*b281039aSGarmin.Chang 
61*b281039aSGarmin.Chang static const struct mtk_clk_desc imgsys_main_desc = {
62*b281039aSGarmin.Chang 	.clks = imgsys_main_clks,
63*b281039aSGarmin.Chang 	.num_clks = ARRAY_SIZE(imgsys_main_clks),
64*b281039aSGarmin.Chang };
65*b281039aSGarmin.Chang 
66*b281039aSGarmin.Chang static const struct mtk_clk_desc imgsys_wpe1_desc = {
67*b281039aSGarmin.Chang 	.clks = imgsys_wpe1_clks,
68*b281039aSGarmin.Chang 	.num_clks = ARRAY_SIZE(imgsys_wpe1_clks),
69*b281039aSGarmin.Chang };
70*b281039aSGarmin.Chang 
71*b281039aSGarmin.Chang static const struct mtk_clk_desc imgsys_wpe2_desc = {
72*b281039aSGarmin.Chang 	.clks = imgsys_wpe2_clks,
73*b281039aSGarmin.Chang 	.num_clks = ARRAY_SIZE(imgsys_wpe2_clks),
74*b281039aSGarmin.Chang };
75*b281039aSGarmin.Chang 
76*b281039aSGarmin.Chang static const struct mtk_clk_desc imgsys_wpe3_desc = {
77*b281039aSGarmin.Chang 	.clks = imgsys_wpe3_clks,
78*b281039aSGarmin.Chang 	.num_clks = ARRAY_SIZE(imgsys_wpe3_clks),
79*b281039aSGarmin.Chang };
80*b281039aSGarmin.Chang 
81*b281039aSGarmin.Chang static const struct mtk_clk_desc imgsys1_dip_top_desc = {
82*b281039aSGarmin.Chang 	.clks = imgsys1_dip_top_clks,
83*b281039aSGarmin.Chang 	.num_clks = ARRAY_SIZE(imgsys1_dip_top_clks),
84*b281039aSGarmin.Chang };
85*b281039aSGarmin.Chang 
86*b281039aSGarmin.Chang static const struct mtk_clk_desc imgsys1_dip_nr_desc = {
87*b281039aSGarmin.Chang 	.clks = imgsys1_dip_nr_clks,
88*b281039aSGarmin.Chang 	.num_clks = ARRAY_SIZE(imgsys1_dip_nr_clks),
89*b281039aSGarmin.Chang };
90*b281039aSGarmin.Chang 
91*b281039aSGarmin.Chang static const struct of_device_id of_match_clk_mt8188_imgsys_main[] = {
92*b281039aSGarmin.Chang 	{ .compatible = "mediatek,mt8188-imgsys", .data = &imgsys_main_desc },
93*b281039aSGarmin.Chang 	{ .compatible = "mediatek,mt8188-imgsys-wpe1", .data = &imgsys_wpe1_desc },
94*b281039aSGarmin.Chang 	{ .compatible = "mediatek,mt8188-imgsys-wpe2", .data = &imgsys_wpe2_desc },
95*b281039aSGarmin.Chang 	{ .compatible = "mediatek,mt8188-imgsys-wpe3", .data = &imgsys_wpe3_desc },
96*b281039aSGarmin.Chang 	{ .compatible = "mediatek,mt8188-imgsys1-dip-top", .data = &imgsys1_dip_top_desc },
97*b281039aSGarmin.Chang 	{ .compatible = "mediatek,mt8188-imgsys1-dip-nr", .data = &imgsys1_dip_nr_desc },
98*b281039aSGarmin.Chang 	{ /* sentinel */ }
99*b281039aSGarmin.Chang };
100*b281039aSGarmin.Chang MODULE_DEVICE_TABLE(of, of_match_clk_mt8188_imgsys_main);
101*b281039aSGarmin.Chang 
102*b281039aSGarmin.Chang static struct platform_driver clk_mt8188_imgsys_main_drv = {
103*b281039aSGarmin.Chang 	.probe = mtk_clk_simple_probe,
104*b281039aSGarmin.Chang 	.remove_new = mtk_clk_simple_remove,
105*b281039aSGarmin.Chang 	.driver = {
106*b281039aSGarmin.Chang 		.name = "clk-mt8188-imgsys_main",
107*b281039aSGarmin.Chang 		.of_match_table = of_match_clk_mt8188_imgsys_main,
108*b281039aSGarmin.Chang 	},
109*b281039aSGarmin.Chang };
110*b281039aSGarmin.Chang 
111*b281039aSGarmin.Chang module_platform_driver(clk_mt8188_imgsys_main_drv);
112*b281039aSGarmin.Chang MODULE_LICENSE("GPL");
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