1*710774e0Smtk01761 // SPDX-License-Identifier: GPL-2.0 2*710774e0Smtk01761 /* 3*710774e0Smtk01761 * Copyright (c) 2019 MediaTek Inc. 4*710774e0Smtk01761 * Author: Wendell Lin <wendell.lin@mediatek.com> 5*710774e0Smtk01761 */ 6*710774e0Smtk01761 7*710774e0Smtk01761 #include <linux/clk-provider.h> 8*710774e0Smtk01761 #include <linux/platform_device.h> 9*710774e0Smtk01761 #include <dt-bindings/clock/mt6779-clk.h> 10*710774e0Smtk01761 11*710774e0Smtk01761 #include "clk-mtk.h" 12*710774e0Smtk01761 #include "clk-gate.h" 13*710774e0Smtk01761 14*710774e0Smtk01761 static const struct mtk_gate_regs cam_cg_regs = { 15*710774e0Smtk01761 .set_ofs = 0x0004, 16*710774e0Smtk01761 .clr_ofs = 0x0008, 17*710774e0Smtk01761 .sta_ofs = 0x0000, 18*710774e0Smtk01761 }; 19*710774e0Smtk01761 20*710774e0Smtk01761 #define GATE_CAM(_id, _name, _parent, _shift) \ 21*710774e0Smtk01761 GATE_MTK(_id, _name, _parent, &cam_cg_regs, _shift, \ 22*710774e0Smtk01761 &mtk_clk_gate_ops_setclr) 23*710774e0Smtk01761 24*710774e0Smtk01761 static const struct mtk_gate cam_clks[] = { 25*710774e0Smtk01761 GATE_CAM(CLK_CAM_LARB10, "camsys_larb10", "cam_sel", 0), 26*710774e0Smtk01761 GATE_CAM(CLK_CAM_DFP_VAD, "camsys_dfp_vad", "cam_sel", 1), 27*710774e0Smtk01761 GATE_CAM(CLK_CAM_LARB11, "camsys_larb11", "cam_sel", 2), 28*710774e0Smtk01761 GATE_CAM(CLK_CAM_LARB9, "camsys_larb9", "cam_sel", 3), 29*710774e0Smtk01761 GATE_CAM(CLK_CAM_CAM, "camsys_cam", "cam_sel", 6), 30*710774e0Smtk01761 GATE_CAM(CLK_CAM_CAMTG, "camsys_camtg", "cam_sel", 7), 31*710774e0Smtk01761 GATE_CAM(CLK_CAM_SENINF, "camsys_seninf", "cam_sel", 8), 32*710774e0Smtk01761 GATE_CAM(CLK_CAM_CAMSV0, "camsys_camsv0", "cam_sel", 9), 33*710774e0Smtk01761 GATE_CAM(CLK_CAM_CAMSV1, "camsys_camsv1", "cam_sel", 10), 34*710774e0Smtk01761 GATE_CAM(CLK_CAM_CAMSV2, "camsys_camsv2", "cam_sel", 11), 35*710774e0Smtk01761 GATE_CAM(CLK_CAM_CAMSV3, "camsys_camsv3", "cam_sel", 12), 36*710774e0Smtk01761 GATE_CAM(CLK_CAM_CCU, "camsys_ccu", "cam_sel", 13), 37*710774e0Smtk01761 GATE_CAM(CLK_CAM_FAKE_ENG, "camsys_fake_eng", "cam_sel", 14), 38*710774e0Smtk01761 }; 39*710774e0Smtk01761 40*710774e0Smtk01761 static const struct of_device_id of_match_clk_mt6779_cam[] = { 41*710774e0Smtk01761 { .compatible = "mediatek,mt6779-camsys", }, 42*710774e0Smtk01761 {} 43*710774e0Smtk01761 }; 44*710774e0Smtk01761 45*710774e0Smtk01761 static int clk_mt6779_cam_probe(struct platform_device *pdev) 46*710774e0Smtk01761 { 47*710774e0Smtk01761 struct clk_onecell_data *clk_data; 48*710774e0Smtk01761 struct device_node *node = pdev->dev.of_node; 49*710774e0Smtk01761 50*710774e0Smtk01761 clk_data = mtk_alloc_clk_data(CLK_CAM_NR_CLK); 51*710774e0Smtk01761 52*710774e0Smtk01761 mtk_clk_register_gates(node, cam_clks, ARRAY_SIZE(cam_clks), 53*710774e0Smtk01761 clk_data); 54*710774e0Smtk01761 55*710774e0Smtk01761 return of_clk_add_provider(node, of_clk_src_onecell_get, clk_data); 56*710774e0Smtk01761 } 57*710774e0Smtk01761 58*710774e0Smtk01761 static struct platform_driver clk_mt6779_cam_drv = { 59*710774e0Smtk01761 .probe = clk_mt6779_cam_probe, 60*710774e0Smtk01761 .driver = { 61*710774e0Smtk01761 .name = "clk-mt6779-cam", 62*710774e0Smtk01761 .of_match_table = of_match_clk_mt6779_cam, 63*710774e0Smtk01761 }, 64*710774e0Smtk01761 }; 65*710774e0Smtk01761 66*710774e0Smtk01761 builtin_platform_driver(clk_mt6779_cam_drv); 67