xref: /openbmc/linux/drivers/clk/mediatek/clk-mt2712-venc.c (revision f3e4e7350e2c457a63eb7efc0ea28277fa5fc990)
11802d0beSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-only
2e2f744a8Sweiyi.lu@mediatek.com /*
3e2f744a8Sweiyi.lu@mediatek.com  * Copyright (c) 2017 MediaTek Inc.
4e2f744a8Sweiyi.lu@mediatek.com  * Author: Weiyi Lu <weiyi.lu@mediatek.com>
5e2f744a8Sweiyi.lu@mediatek.com  */
6e2f744a8Sweiyi.lu@mediatek.com 
7e2f744a8Sweiyi.lu@mediatek.com #include <linux/clk-provider.h>
8e2f744a8Sweiyi.lu@mediatek.com #include <linux/platform_device.h>
9e2f744a8Sweiyi.lu@mediatek.com 
10e2f744a8Sweiyi.lu@mediatek.com #include "clk-mtk.h"
11e2f744a8Sweiyi.lu@mediatek.com #include "clk-gate.h"
12e2f744a8Sweiyi.lu@mediatek.com 
13e2f744a8Sweiyi.lu@mediatek.com #include <dt-bindings/clock/mt2712-clk.h>
14e2f744a8Sweiyi.lu@mediatek.com 
15e2f744a8Sweiyi.lu@mediatek.com static const struct mtk_gate_regs venc_cg_regs = {
16e2f744a8Sweiyi.lu@mediatek.com 	.set_ofs = 0x4,
17e2f744a8Sweiyi.lu@mediatek.com 	.clr_ofs = 0x8,
18e2f744a8Sweiyi.lu@mediatek.com 	.sta_ofs = 0x0,
19e2f744a8Sweiyi.lu@mediatek.com };
20e2f744a8Sweiyi.lu@mediatek.com 
21e2f744a8Sweiyi.lu@mediatek.com #define GATE_VENC(_id, _name, _parent, _shift) {	\
22e2f744a8Sweiyi.lu@mediatek.com 		.id = _id,				\
23e2f744a8Sweiyi.lu@mediatek.com 		.name = _name,				\
24e2f744a8Sweiyi.lu@mediatek.com 		.parent_name = _parent,			\
25e2f744a8Sweiyi.lu@mediatek.com 		.regs = &venc_cg_regs,			\
26e2f744a8Sweiyi.lu@mediatek.com 		.shift = _shift,			\
27e2f744a8Sweiyi.lu@mediatek.com 		.ops = &mtk_clk_gate_ops_setclr_inv,	\
28e2f744a8Sweiyi.lu@mediatek.com 	}
29e2f744a8Sweiyi.lu@mediatek.com 
30e2f744a8Sweiyi.lu@mediatek.com static const struct mtk_gate venc_clks[] = {
31e2f744a8Sweiyi.lu@mediatek.com 	GATE_VENC(CLK_VENC_SMI_COMMON_CON, "venc_smi", "mm_sel", 0),
32e2f744a8Sweiyi.lu@mediatek.com 	GATE_VENC(CLK_VENC_VENC, "venc_venc", "venc_sel", 4),
33e2f744a8Sweiyi.lu@mediatek.com 	GATE_VENC(CLK_VENC_SMI_LARB6, "venc_smi_larb6", "jpgdec_sel", 12),
34e2f744a8Sweiyi.lu@mediatek.com };
35e2f744a8Sweiyi.lu@mediatek.com 
36*f3e4e735SMiles Chen static const struct mtk_clk_desc venc_desc = {
37*f3e4e735SMiles Chen 	.clks = venc_clks,
38*f3e4e735SMiles Chen 	.num_clks = ARRAY_SIZE(venc_clks),
39*f3e4e735SMiles Chen };
40e2f744a8Sweiyi.lu@mediatek.com 
41e2f744a8Sweiyi.lu@mediatek.com static const struct of_device_id of_match_clk_mt2712_venc[] = {
42*f3e4e735SMiles Chen 	{
43*f3e4e735SMiles Chen 		.compatible = "mediatek,mt2712-vencsys",
44*f3e4e735SMiles Chen 		.data = &venc_desc,
45*f3e4e735SMiles Chen 	}, {
46*f3e4e735SMiles Chen 		/* sentinel */
47*f3e4e735SMiles Chen 	}
48e2f744a8Sweiyi.lu@mediatek.com };
49e2f744a8Sweiyi.lu@mediatek.com 
50e2f744a8Sweiyi.lu@mediatek.com static struct platform_driver clk_mt2712_venc_drv = {
51*f3e4e735SMiles Chen 	.probe = mtk_clk_simple_probe,
52*f3e4e735SMiles Chen 	.remove = mtk_clk_simple_remove,
53e2f744a8Sweiyi.lu@mediatek.com 	.driver = {
54e2f744a8Sweiyi.lu@mediatek.com 		.name = "clk-mt2712-venc",
55e2f744a8Sweiyi.lu@mediatek.com 		.of_match_table = of_match_clk_mt2712_venc,
56e2f744a8Sweiyi.lu@mediatek.com 	},
57e2f744a8Sweiyi.lu@mediatek.com };
58e2f744a8Sweiyi.lu@mediatek.com 
59e2f744a8Sweiyi.lu@mediatek.com builtin_platform_driver(clk_mt2712_venc_drv);
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