1*2025cf9eSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-only
2b68adc23SDaniel Lezcano /*
3b68adc23SDaniel Lezcano * Clock driver for Hi655x
4b68adc23SDaniel Lezcano *
5b68adc23SDaniel Lezcano * Copyright (c) 2017, Linaro Ltd.
6b68adc23SDaniel Lezcano *
7b68adc23SDaniel Lezcano * Author: Daniel Lezcano <daniel.lezcano@linaro.org>
8b68adc23SDaniel Lezcano */
9b68adc23SDaniel Lezcano #include <linux/clk-provider.h>
10b68adc23SDaniel Lezcano #include <linux/module.h>
11b68adc23SDaniel Lezcano #include <linux/platform_device.h>
12b68adc23SDaniel Lezcano #include <linux/regmap.h>
13b68adc23SDaniel Lezcano #include <linux/slab.h>
14b68adc23SDaniel Lezcano #include <linux/mfd/core.h>
15b68adc23SDaniel Lezcano #include <linux/mfd/hi655x-pmic.h>
16b68adc23SDaniel Lezcano
17b68adc23SDaniel Lezcano #define HI655X_CLK_BASE HI655X_BUS_ADDR(0x1c)
18b68adc23SDaniel Lezcano #define HI655X_CLK_SET BIT(6)
19b68adc23SDaniel Lezcano
20b68adc23SDaniel Lezcano struct hi655x_clk {
21b68adc23SDaniel Lezcano struct hi655x_pmic *hi655x;
22b68adc23SDaniel Lezcano struct clk_hw clk_hw;
23b68adc23SDaniel Lezcano };
24b68adc23SDaniel Lezcano
hi655x_clk_recalc_rate(struct clk_hw * hw,unsigned long parent_rate)25b68adc23SDaniel Lezcano static unsigned long hi655x_clk_recalc_rate(struct clk_hw *hw,
26b68adc23SDaniel Lezcano unsigned long parent_rate)
27b68adc23SDaniel Lezcano {
28b68adc23SDaniel Lezcano return 32768;
29b68adc23SDaniel Lezcano }
30b68adc23SDaniel Lezcano
hi655x_clk_enable(struct clk_hw * hw,bool enable)31b68adc23SDaniel Lezcano static int hi655x_clk_enable(struct clk_hw *hw, bool enable)
32b68adc23SDaniel Lezcano {
33b68adc23SDaniel Lezcano struct hi655x_clk *hi655x_clk =
34b68adc23SDaniel Lezcano container_of(hw, struct hi655x_clk, clk_hw);
35b68adc23SDaniel Lezcano
36b68adc23SDaniel Lezcano struct hi655x_pmic *hi655x = hi655x_clk->hi655x;
37b68adc23SDaniel Lezcano
38b68adc23SDaniel Lezcano return regmap_update_bits(hi655x->regmap, HI655X_CLK_BASE,
39b68adc23SDaniel Lezcano HI655X_CLK_SET, enable ? HI655X_CLK_SET : 0);
40b68adc23SDaniel Lezcano }
41b68adc23SDaniel Lezcano
hi655x_clk_prepare(struct clk_hw * hw)42b68adc23SDaniel Lezcano static int hi655x_clk_prepare(struct clk_hw *hw)
43b68adc23SDaniel Lezcano {
44b68adc23SDaniel Lezcano return hi655x_clk_enable(hw, true);
45b68adc23SDaniel Lezcano }
46b68adc23SDaniel Lezcano
hi655x_clk_unprepare(struct clk_hw * hw)47b68adc23SDaniel Lezcano static void hi655x_clk_unprepare(struct clk_hw *hw)
48b68adc23SDaniel Lezcano {
49b68adc23SDaniel Lezcano hi655x_clk_enable(hw, false);
50b68adc23SDaniel Lezcano }
51b68adc23SDaniel Lezcano
hi655x_clk_is_prepared(struct clk_hw * hw)52b68adc23SDaniel Lezcano static int hi655x_clk_is_prepared(struct clk_hw *hw)
53b68adc23SDaniel Lezcano {
54b68adc23SDaniel Lezcano struct hi655x_clk *hi655x_clk =
55b68adc23SDaniel Lezcano container_of(hw, struct hi655x_clk, clk_hw);
56b68adc23SDaniel Lezcano struct hi655x_pmic *hi655x = hi655x_clk->hi655x;
57b68adc23SDaniel Lezcano int ret;
58b68adc23SDaniel Lezcano uint32_t val;
59b68adc23SDaniel Lezcano
60b68adc23SDaniel Lezcano ret = regmap_read(hi655x->regmap, HI655X_CLK_BASE, &val);
61b68adc23SDaniel Lezcano if (ret < 0)
62b68adc23SDaniel Lezcano return ret;
63b68adc23SDaniel Lezcano
64b68adc23SDaniel Lezcano return val & HI655X_CLK_BASE;
65b68adc23SDaniel Lezcano }
66b68adc23SDaniel Lezcano
67b68adc23SDaniel Lezcano static const struct clk_ops hi655x_clk_ops = {
68b68adc23SDaniel Lezcano .prepare = hi655x_clk_prepare,
69b68adc23SDaniel Lezcano .unprepare = hi655x_clk_unprepare,
70b68adc23SDaniel Lezcano .is_prepared = hi655x_clk_is_prepared,
71b68adc23SDaniel Lezcano .recalc_rate = hi655x_clk_recalc_rate,
72b68adc23SDaniel Lezcano };
73b68adc23SDaniel Lezcano
hi655x_clk_probe(struct platform_device * pdev)74b68adc23SDaniel Lezcano static int hi655x_clk_probe(struct platform_device *pdev)
75b68adc23SDaniel Lezcano {
76b68adc23SDaniel Lezcano struct device *parent = pdev->dev.parent;
77b68adc23SDaniel Lezcano struct hi655x_pmic *hi655x = dev_get_drvdata(parent);
78b68adc23SDaniel Lezcano struct hi655x_clk *hi655x_clk;
79b68adc23SDaniel Lezcano const char *clk_name = "hi655x-clk";
80b68adc23SDaniel Lezcano struct clk_init_data init = {
81b68adc23SDaniel Lezcano .name = clk_name,
82b68adc23SDaniel Lezcano .ops = &hi655x_clk_ops
83b68adc23SDaniel Lezcano };
84b68adc23SDaniel Lezcano int ret;
85b68adc23SDaniel Lezcano
86b68adc23SDaniel Lezcano hi655x_clk = devm_kzalloc(&pdev->dev, sizeof(*hi655x_clk), GFP_KERNEL);
87b68adc23SDaniel Lezcano if (!hi655x_clk)
88b68adc23SDaniel Lezcano return -ENOMEM;
89b68adc23SDaniel Lezcano
90b68adc23SDaniel Lezcano of_property_read_string_index(parent->of_node, "clock-output-names",
91b68adc23SDaniel Lezcano 0, &clk_name);
92b68adc23SDaniel Lezcano
93b68adc23SDaniel Lezcano hi655x_clk->clk_hw.init = &init;
94b68adc23SDaniel Lezcano hi655x_clk->hi655x = hi655x;
95b68adc23SDaniel Lezcano
96b68adc23SDaniel Lezcano platform_set_drvdata(pdev, hi655x_clk);
97b68adc23SDaniel Lezcano
98b68adc23SDaniel Lezcano ret = devm_clk_hw_register(&pdev->dev, &hi655x_clk->clk_hw);
99b68adc23SDaniel Lezcano if (ret)
100b68adc23SDaniel Lezcano return ret;
101b68adc23SDaniel Lezcano
1021efadbf2SMatti Vaittinen return devm_of_clk_add_hw_provider(&pdev->dev, of_clk_hw_simple_get,
103b68adc23SDaniel Lezcano &hi655x_clk->clk_hw);
104b68adc23SDaniel Lezcano }
105b68adc23SDaniel Lezcano
106b68adc23SDaniel Lezcano static struct platform_driver hi655x_clk_driver = {
107b68adc23SDaniel Lezcano .probe = hi655x_clk_probe,
108b68adc23SDaniel Lezcano .driver = {
109b68adc23SDaniel Lezcano .name = "hi655x-clk",
110b68adc23SDaniel Lezcano },
111b68adc23SDaniel Lezcano };
112b68adc23SDaniel Lezcano
113b68adc23SDaniel Lezcano module_platform_driver(hi655x_clk_driver);
114b68adc23SDaniel Lezcano
115b68adc23SDaniel Lezcano MODULE_DESCRIPTION("Clk driver for the hi655x series PMICs");
116b68adc23SDaniel Lezcano MODULE_AUTHOR("Daniel Lezcano <daniel.lezcano@linaro.org>");
117b68adc23SDaniel Lezcano MODULE_LICENSE("GPL");
118b68adc23SDaniel Lezcano MODULE_ALIAS("platform:hi655x-clk");
119