1 /* 2 * RNG driver for VIA RNGs 3 * 4 * Copyright 2005 (c) MontaVista Software, Inc. 5 * 6 * with the majority of the code coming from: 7 * 8 * Hardware driver for the Intel/AMD/VIA Random Number Generators (RNG) 9 * (c) Copyright 2003 Red Hat Inc <jgarzik@redhat.com> 10 * 11 * derived from 12 * 13 * Hardware driver for the AMD 768 Random Number Generator (RNG) 14 * (c) Copyright 2001 Red Hat Inc <alan@redhat.com> 15 * 16 * derived from 17 * 18 * Hardware driver for Intel i810 Random Number Generator (RNG) 19 * Copyright 2000,2001 Jeff Garzik <jgarzik@pobox.com> 20 * Copyright 2000,2001 Philipp Rumpf <prumpf@mandrakesoft.com> 21 * 22 * This file is licensed under the terms of the GNU General Public 23 * License version 2. This program is licensed "as is" without any 24 * warranty of any kind, whether express or implied. 25 */ 26 27 #include <linux/module.h> 28 #include <linux/kernel.h> 29 #include <linux/hw_random.h> 30 #include <asm/io.h> 31 #include <asm/msr.h> 32 #include <asm/cpufeature.h> 33 34 35 #define PFX KBUILD_MODNAME ": " 36 37 38 enum { 39 VIA_STRFILT_CNT_SHIFT = 16, 40 VIA_STRFILT_FAIL = (1 << 15), 41 VIA_STRFILT_ENABLE = (1 << 14), 42 VIA_RAWBITS_ENABLE = (1 << 13), 43 VIA_RNG_ENABLE = (1 << 6), 44 VIA_XSTORE_CNT_MASK = 0x0F, 45 46 VIA_RNG_CHUNK_8 = 0x00, /* 64 rand bits, 64 stored bits */ 47 VIA_RNG_CHUNK_4 = 0x01, /* 32 rand bits, 32 stored bits */ 48 VIA_RNG_CHUNK_4_MASK = 0xFFFFFFFF, 49 VIA_RNG_CHUNK_2 = 0x02, /* 16 rand bits, 32 stored bits */ 50 VIA_RNG_CHUNK_2_MASK = 0xFFFF, 51 VIA_RNG_CHUNK_1 = 0x03, /* 8 rand bits, 32 stored bits */ 52 VIA_RNG_CHUNK_1_MASK = 0xFF, 53 }; 54 55 /* 56 * Investigate using the 'rep' prefix to obtain 32 bits of random data 57 * in one insn. The upside is potentially better performance. The 58 * downside is that the instruction becomes no longer atomic. Due to 59 * this, just like familiar issues with /dev/random itself, the worst 60 * case of a 'rep xstore' could potentially pause a cpu for an 61 * unreasonably long time. In practice, this condition would likely 62 * only occur when the hardware is failing. (or so we hope :)) 63 * 64 * Another possible performance boost may come from simply buffering 65 * until we have 4 bytes, thus returning a u32 at a time, 66 * instead of the current u8-at-a-time. 67 */ 68 69 static inline u32 xstore(u32 *addr, u32 edx_in) 70 { 71 u32 eax_out; 72 73 asm(".byte 0x0F,0xA7,0xC0 /* xstore %%edi (addr=%0) */" 74 :"=m"(*addr), "=a"(eax_out) 75 :"D"(addr), "d"(edx_in)); 76 77 return eax_out; 78 } 79 80 static int via_rng_data_present(struct hwrng *rng) 81 { 82 u32 bytes_out; 83 u32 *via_rng_datum = (u32 *)(&rng->priv); 84 85 /* We choose the recommended 1-byte-per-instruction RNG rate, 86 * for greater randomness at the expense of speed. Larger 87 * values 2, 4, or 8 bytes-per-instruction yield greater 88 * speed at lesser randomness. 89 * 90 * If you change this to another VIA_CHUNK_n, you must also 91 * change the ->n_bytes values in rng_vendor_ops[] tables. 92 * VIA_CHUNK_8 requires further code changes. 93 * 94 * A copy of MSR_VIA_RNG is placed in eax_out when xstore 95 * completes. 96 */ 97 98 *via_rng_datum = 0; /* paranoia, not really necessary */ 99 bytes_out = xstore(via_rng_datum, VIA_RNG_CHUNK_1); 100 bytes_out &= VIA_XSTORE_CNT_MASK; 101 if (bytes_out == 0) 102 return 0; 103 return 1; 104 } 105 106 static int via_rng_data_read(struct hwrng *rng, u32 *data) 107 { 108 u32 via_rng_datum = (u32)rng->priv; 109 110 *data = via_rng_datum; 111 112 return 1; 113 } 114 115 static int via_rng_init(struct hwrng *rng) 116 { 117 u32 lo, hi, old_lo; 118 119 /* Control the RNG via MSR. Tread lightly and pay very close 120 * close attention to values written, as the reserved fields 121 * are documented to be "undefined and unpredictable"; but it 122 * does not say to write them as zero, so I make a guess that 123 * we restore the values we find in the register. 124 */ 125 rdmsr(MSR_VIA_RNG, lo, hi); 126 127 old_lo = lo; 128 lo &= ~(0x7f << VIA_STRFILT_CNT_SHIFT); 129 lo &= ~VIA_XSTORE_CNT_MASK; 130 lo &= ~(VIA_STRFILT_ENABLE | VIA_STRFILT_FAIL | VIA_RAWBITS_ENABLE); 131 lo |= VIA_RNG_ENABLE; 132 133 if (lo != old_lo) 134 wrmsr(MSR_VIA_RNG, lo, hi); 135 136 /* perhaps-unnecessary sanity check; remove after testing if 137 unneeded */ 138 rdmsr(MSR_VIA_RNG, lo, hi); 139 if ((lo & VIA_RNG_ENABLE) == 0) { 140 printk(KERN_ERR PFX "cannot enable VIA C3 RNG, aborting\n"); 141 return -ENODEV; 142 } 143 144 return 0; 145 } 146 147 148 static struct hwrng via_rng = { 149 .name = "via", 150 .init = via_rng_init, 151 .data_present = via_rng_data_present, 152 .data_read = via_rng_data_read, 153 }; 154 155 156 static int __init mod_init(void) 157 { 158 int err; 159 160 if (!cpu_has_xstore) 161 return -ENODEV; 162 printk(KERN_INFO "VIA RNG detected\n"); 163 err = hwrng_register(&via_rng); 164 if (err) { 165 printk(KERN_ERR PFX "RNG registering failed (%d)\n", 166 err); 167 goto out; 168 } 169 out: 170 return err; 171 } 172 173 static void __exit mod_exit(void) 174 { 175 hwrng_unregister(&via_rng); 176 } 177 178 module_init(mod_init); 179 module_exit(mod_exit); 180 181 MODULE_DESCRIPTION("H/W RNG driver for VIA chipsets"); 182 MODULE_LICENSE("GPL"); 183