1f9baa4f7SManivannan Sadhasivam // SPDX-License-Identifier: GPL-2.0
2f9baa4f7SManivannan Sadhasivam /*
3f9baa4f7SManivannan Sadhasivam * Copyright (C) 2022 Linaro Ltd.
4f9baa4f7SManivannan Sadhasivam * Author: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
5f9baa4f7SManivannan Sadhasivam */
6f9baa4f7SManivannan Sadhasivam
7f9baa4f7SManivannan Sadhasivam #include <linux/errno.h>
8f9baa4f7SManivannan Sadhasivam #include <linux/mhi_ep.h>
9f9baa4f7SManivannan Sadhasivam #include "internal.h"
10f9baa4f7SManivannan Sadhasivam
mhi_ep_check_mhi_state(struct mhi_ep_cntrl * mhi_cntrl,enum mhi_state cur_mhi_state,enum mhi_state mhi_state)11f9baa4f7SManivannan Sadhasivam bool __must_check mhi_ep_check_mhi_state(struct mhi_ep_cntrl *mhi_cntrl,
12f9baa4f7SManivannan Sadhasivam enum mhi_state cur_mhi_state,
13f9baa4f7SManivannan Sadhasivam enum mhi_state mhi_state)
14f9baa4f7SManivannan Sadhasivam {
15f9baa4f7SManivannan Sadhasivam if (mhi_state == MHI_STATE_SYS_ERR)
16f9baa4f7SManivannan Sadhasivam return true; /* Allowed in any state */
17f9baa4f7SManivannan Sadhasivam
18f9baa4f7SManivannan Sadhasivam if (mhi_state == MHI_STATE_READY)
19f9baa4f7SManivannan Sadhasivam return cur_mhi_state == MHI_STATE_RESET;
20f9baa4f7SManivannan Sadhasivam
21f9baa4f7SManivannan Sadhasivam if (mhi_state == MHI_STATE_M0)
22f9baa4f7SManivannan Sadhasivam return cur_mhi_state == MHI_STATE_M3 || cur_mhi_state == MHI_STATE_READY;
23f9baa4f7SManivannan Sadhasivam
24f9baa4f7SManivannan Sadhasivam if (mhi_state == MHI_STATE_M3)
25f9baa4f7SManivannan Sadhasivam return cur_mhi_state == MHI_STATE_M0;
26f9baa4f7SManivannan Sadhasivam
27f9baa4f7SManivannan Sadhasivam return false;
28f9baa4f7SManivannan Sadhasivam }
29f9baa4f7SManivannan Sadhasivam
mhi_ep_set_mhi_state(struct mhi_ep_cntrl * mhi_cntrl,enum mhi_state mhi_state)30f9baa4f7SManivannan Sadhasivam int mhi_ep_set_mhi_state(struct mhi_ep_cntrl *mhi_cntrl, enum mhi_state mhi_state)
31f9baa4f7SManivannan Sadhasivam {
32f9baa4f7SManivannan Sadhasivam struct device *dev = &mhi_cntrl->mhi_dev->dev;
33f9baa4f7SManivannan Sadhasivam
34f9baa4f7SManivannan Sadhasivam if (!mhi_ep_check_mhi_state(mhi_cntrl, mhi_cntrl->mhi_state, mhi_state)) {
35f9baa4f7SManivannan Sadhasivam dev_err(dev, "MHI state change to %s from %s is not allowed!\n",
36f9baa4f7SManivannan Sadhasivam mhi_state_str(mhi_state),
37f9baa4f7SManivannan Sadhasivam mhi_state_str(mhi_cntrl->mhi_state));
38f9baa4f7SManivannan Sadhasivam return -EACCES;
39f9baa4f7SManivannan Sadhasivam }
40f9baa4f7SManivannan Sadhasivam
41f9baa4f7SManivannan Sadhasivam /* TODO: Add support for M1 and M2 states */
42f9baa4f7SManivannan Sadhasivam if (mhi_state == MHI_STATE_M1 || mhi_state == MHI_STATE_M2) {
43f9baa4f7SManivannan Sadhasivam dev_err(dev, "MHI state (%s) not supported\n", mhi_state_str(mhi_state));
44f9baa4f7SManivannan Sadhasivam return -EOPNOTSUPP;
45f9baa4f7SManivannan Sadhasivam }
46f9baa4f7SManivannan Sadhasivam
47f9baa4f7SManivannan Sadhasivam mhi_ep_mmio_masked_write(mhi_cntrl, EP_MHISTATUS, MHISTATUS_MHISTATE_MASK, mhi_state);
48f9baa4f7SManivannan Sadhasivam mhi_cntrl->mhi_state = mhi_state;
49f9baa4f7SManivannan Sadhasivam
50f9baa4f7SManivannan Sadhasivam if (mhi_state == MHI_STATE_READY)
51f9baa4f7SManivannan Sadhasivam mhi_ep_mmio_masked_write(mhi_cntrl, EP_MHISTATUS, MHISTATUS_READY_MASK, 1);
52f9baa4f7SManivannan Sadhasivam
53f9baa4f7SManivannan Sadhasivam if (mhi_state == MHI_STATE_SYS_ERR)
54f9baa4f7SManivannan Sadhasivam mhi_ep_mmio_masked_write(mhi_cntrl, EP_MHISTATUS, MHISTATUS_SYSERR_MASK, 1);
55f9baa4f7SManivannan Sadhasivam
56f9baa4f7SManivannan Sadhasivam return 0;
57f9baa4f7SManivannan Sadhasivam }
58f9baa4f7SManivannan Sadhasivam
mhi_ep_set_m0_state(struct mhi_ep_cntrl * mhi_cntrl)59f9baa4f7SManivannan Sadhasivam int mhi_ep_set_m0_state(struct mhi_ep_cntrl *mhi_cntrl)
60f9baa4f7SManivannan Sadhasivam {
61f9baa4f7SManivannan Sadhasivam struct device *dev = &mhi_cntrl->mhi_dev->dev;
62f9baa4f7SManivannan Sadhasivam enum mhi_state old_state;
63f9baa4f7SManivannan Sadhasivam int ret;
64f9baa4f7SManivannan Sadhasivam
65e4b7b5f0SManivannan Sadhasivam /* If MHI is in M3, resume suspended channels */
66*1ddc7618SManivannan Sadhasivam mutex_lock(&mhi_cntrl->state_lock);
67*1ddc7618SManivannan Sadhasivam
68f9baa4f7SManivannan Sadhasivam old_state = mhi_cntrl->mhi_state;
69e4b7b5f0SManivannan Sadhasivam if (old_state == MHI_STATE_M3)
70e4b7b5f0SManivannan Sadhasivam mhi_ep_resume_channels(mhi_cntrl);
71f9baa4f7SManivannan Sadhasivam
72f9baa4f7SManivannan Sadhasivam ret = mhi_ep_set_mhi_state(mhi_cntrl, MHI_STATE_M0);
73f7d0806bSManivannan Sadhasivam if (ret) {
74f7d0806bSManivannan Sadhasivam mhi_ep_handle_syserr(mhi_cntrl);
75*1ddc7618SManivannan Sadhasivam goto err_unlock;
76f7d0806bSManivannan Sadhasivam }
77f9baa4f7SManivannan Sadhasivam
78f9baa4f7SManivannan Sadhasivam /* Signal host that the device moved to M0 */
79f9baa4f7SManivannan Sadhasivam ret = mhi_ep_send_state_change_event(mhi_cntrl, MHI_STATE_M0);
80f9baa4f7SManivannan Sadhasivam if (ret) {
81f9baa4f7SManivannan Sadhasivam dev_err(dev, "Failed sending M0 state change event\n");
82*1ddc7618SManivannan Sadhasivam goto err_unlock;
83f9baa4f7SManivannan Sadhasivam }
84f9baa4f7SManivannan Sadhasivam
85f9baa4f7SManivannan Sadhasivam if (old_state == MHI_STATE_READY) {
86f9baa4f7SManivannan Sadhasivam /* Send AMSS EE event to host */
87f9baa4f7SManivannan Sadhasivam ret = mhi_ep_send_ee_event(mhi_cntrl, MHI_EE_AMSS);
88f9baa4f7SManivannan Sadhasivam if (ret) {
89f9baa4f7SManivannan Sadhasivam dev_err(dev, "Failed sending AMSS EE event\n");
90*1ddc7618SManivannan Sadhasivam goto err_unlock;
91f9baa4f7SManivannan Sadhasivam }
92f9baa4f7SManivannan Sadhasivam }
93f9baa4f7SManivannan Sadhasivam
94*1ddc7618SManivannan Sadhasivam err_unlock:
95*1ddc7618SManivannan Sadhasivam mutex_unlock(&mhi_cntrl->state_lock);
96*1ddc7618SManivannan Sadhasivam
97*1ddc7618SManivannan Sadhasivam return ret;
98f9baa4f7SManivannan Sadhasivam }
99f9baa4f7SManivannan Sadhasivam
mhi_ep_set_m3_state(struct mhi_ep_cntrl * mhi_cntrl)100f9baa4f7SManivannan Sadhasivam int mhi_ep_set_m3_state(struct mhi_ep_cntrl *mhi_cntrl)
101f9baa4f7SManivannan Sadhasivam {
102f9baa4f7SManivannan Sadhasivam struct device *dev = &mhi_cntrl->mhi_dev->dev;
103f9baa4f7SManivannan Sadhasivam int ret;
104f9baa4f7SManivannan Sadhasivam
105*1ddc7618SManivannan Sadhasivam mutex_lock(&mhi_cntrl->state_lock);
106f9baa4f7SManivannan Sadhasivam
107*1ddc7618SManivannan Sadhasivam ret = mhi_ep_set_mhi_state(mhi_cntrl, MHI_STATE_M3);
108f7d0806bSManivannan Sadhasivam if (ret) {
109f7d0806bSManivannan Sadhasivam mhi_ep_handle_syserr(mhi_cntrl);
110*1ddc7618SManivannan Sadhasivam goto err_unlock;
111f7d0806bSManivannan Sadhasivam }
112f9baa4f7SManivannan Sadhasivam
113e4b7b5f0SManivannan Sadhasivam mhi_ep_suspend_channels(mhi_cntrl);
114e4b7b5f0SManivannan Sadhasivam
115f9baa4f7SManivannan Sadhasivam /* Signal host that the device moved to M3 */
116f9baa4f7SManivannan Sadhasivam ret = mhi_ep_send_state_change_event(mhi_cntrl, MHI_STATE_M3);
117f9baa4f7SManivannan Sadhasivam if (ret) {
118f9baa4f7SManivannan Sadhasivam dev_err(dev, "Failed sending M3 state change event\n");
119*1ddc7618SManivannan Sadhasivam goto err_unlock;
120f9baa4f7SManivannan Sadhasivam }
121f9baa4f7SManivannan Sadhasivam
122*1ddc7618SManivannan Sadhasivam err_unlock:
123*1ddc7618SManivannan Sadhasivam mutex_unlock(&mhi_cntrl->state_lock);
124*1ddc7618SManivannan Sadhasivam
125*1ddc7618SManivannan Sadhasivam return ret;
126f9baa4f7SManivannan Sadhasivam }
127f9baa4f7SManivannan Sadhasivam
mhi_ep_set_ready_state(struct mhi_ep_cntrl * mhi_cntrl)128f9baa4f7SManivannan Sadhasivam int mhi_ep_set_ready_state(struct mhi_ep_cntrl *mhi_cntrl)
129f9baa4f7SManivannan Sadhasivam {
130f9baa4f7SManivannan Sadhasivam struct device *dev = &mhi_cntrl->mhi_dev->dev;
131f9baa4f7SManivannan Sadhasivam enum mhi_state mhi_state;
132f9baa4f7SManivannan Sadhasivam int ret, is_ready;
133f9baa4f7SManivannan Sadhasivam
134*1ddc7618SManivannan Sadhasivam mutex_lock(&mhi_cntrl->state_lock);
135*1ddc7618SManivannan Sadhasivam
136f9baa4f7SManivannan Sadhasivam /* Ensure that the MHISTATUS is set to RESET by host */
137f9baa4f7SManivannan Sadhasivam mhi_state = mhi_ep_mmio_masked_read(mhi_cntrl, EP_MHISTATUS, MHISTATUS_MHISTATE_MASK);
138f9baa4f7SManivannan Sadhasivam is_ready = mhi_ep_mmio_masked_read(mhi_cntrl, EP_MHISTATUS, MHISTATUS_READY_MASK);
139f9baa4f7SManivannan Sadhasivam
140f9baa4f7SManivannan Sadhasivam if (mhi_state != MHI_STATE_RESET || is_ready) {
141f9baa4f7SManivannan Sadhasivam dev_err(dev, "READY state transition failed. MHI host not in RESET state\n");
142*1ddc7618SManivannan Sadhasivam ret = -EIO;
143*1ddc7618SManivannan Sadhasivam goto err_unlock;
144f9baa4f7SManivannan Sadhasivam }
145f9baa4f7SManivannan Sadhasivam
146f9baa4f7SManivannan Sadhasivam ret = mhi_ep_set_mhi_state(mhi_cntrl, MHI_STATE_READY);
147f7d0806bSManivannan Sadhasivam if (ret)
148f7d0806bSManivannan Sadhasivam mhi_ep_handle_syserr(mhi_cntrl);
149f7d0806bSManivannan Sadhasivam
150*1ddc7618SManivannan Sadhasivam err_unlock:
151*1ddc7618SManivannan Sadhasivam mutex_unlock(&mhi_cntrl->state_lock);
152*1ddc7618SManivannan Sadhasivam
153f9baa4f7SManivannan Sadhasivam return ret;
154f9baa4f7SManivannan Sadhasivam }
155