1d9b2a2bbSLauri Kasanen // SPDX-License-Identifier: GPL-2.0
2d9b2a2bbSLauri Kasanen /*
3d9b2a2bbSLauri Kasanen * Support for the N64 cart.
4d9b2a2bbSLauri Kasanen *
5d9b2a2bbSLauri Kasanen * Copyright (c) 2021 Lauri Kasanen
6d9b2a2bbSLauri Kasanen */
7d9b2a2bbSLauri Kasanen
8f1e19224SChaitanya Kulkarni #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
9d9b2a2bbSLauri Kasanen #include <linux/bitops.h>
10d9b2a2bbSLauri Kasanen #include <linux/blkdev.h>
11d9b2a2bbSLauri Kasanen #include <linux/dma-mapping.h>
12d9b2a2bbSLauri Kasanen #include <linux/init.h>
13d9b2a2bbSLauri Kasanen #include <linux/module.h>
14d9b2a2bbSLauri Kasanen #include <linux/platform_device.h>
15d9b2a2bbSLauri Kasanen
162ce503b3SChaitanya Kulkarni enum {
172ce503b3SChaitanya Kulkarni PI_DRAM_REG = 0,
182ce503b3SChaitanya Kulkarni PI_CART_REG,
192ce503b3SChaitanya Kulkarni PI_READ_REG,
202ce503b3SChaitanya Kulkarni PI_WRITE_REG,
212ce503b3SChaitanya Kulkarni PI_STATUS_REG,
222ce503b3SChaitanya Kulkarni };
23d9b2a2bbSLauri Kasanen
24d9b2a2bbSLauri Kasanen #define PI_STATUS_DMA_BUSY (1 << 0)
25d9b2a2bbSLauri Kasanen #define PI_STATUS_IO_BUSY (1 << 1)
26d9b2a2bbSLauri Kasanen
27d9b2a2bbSLauri Kasanen #define CART_DOMAIN 0x10000000
28d9b2a2bbSLauri Kasanen #define CART_MAX 0x1FFFFFFF
29d9b2a2bbSLauri Kasanen
30d9b2a2bbSLauri Kasanen #define MIN_ALIGNMENT 8
31d9b2a2bbSLauri Kasanen
32e39e3132SChaitanya Kulkarni static u32 __iomem *reg_base;
33e39e3132SChaitanya Kulkarni
34e39e3132SChaitanya Kulkarni static unsigned int start;
35e39e3132SChaitanya Kulkarni module_param(start, uint, 0);
36e39e3132SChaitanya Kulkarni MODULE_PARM_DESC(start, "Start address of the cart block data");
37e39e3132SChaitanya Kulkarni
38e39e3132SChaitanya Kulkarni static unsigned int size;
39e39e3132SChaitanya Kulkarni module_param(size, uint, 0);
40e39e3132SChaitanya Kulkarni MODULE_PARM_DESC(size, "Size of the cart block data, in bytes");
41e39e3132SChaitanya Kulkarni
n64cart_write_reg(const u8 reg,const u32 value)42d9b2a2bbSLauri Kasanen static void n64cart_write_reg(const u8 reg, const u32 value)
43d9b2a2bbSLauri Kasanen {
44d9b2a2bbSLauri Kasanen writel(value, reg_base + reg);
45d9b2a2bbSLauri Kasanen }
46d9b2a2bbSLauri Kasanen
n64cart_read_reg(const u8 reg)47d9b2a2bbSLauri Kasanen static u32 n64cart_read_reg(const u8 reg)
48d9b2a2bbSLauri Kasanen {
49d9b2a2bbSLauri Kasanen return readl(reg_base + reg);
50d9b2a2bbSLauri Kasanen }
51d9b2a2bbSLauri Kasanen
n64cart_wait_dma(void)52d9b2a2bbSLauri Kasanen static void n64cart_wait_dma(void)
53d9b2a2bbSLauri Kasanen {
54d9b2a2bbSLauri Kasanen while (n64cart_read_reg(PI_STATUS_REG) &
55d9b2a2bbSLauri Kasanen (PI_STATUS_DMA_BUSY | PI_STATUS_IO_BUSY))
56d9b2a2bbSLauri Kasanen cpu_relax();
57d9b2a2bbSLauri Kasanen }
58d9b2a2bbSLauri Kasanen
59d9b2a2bbSLauri Kasanen /*
60d9b2a2bbSLauri Kasanen * Process a single bvec of a bio.
61d9b2a2bbSLauri Kasanen */
n64cart_do_bvec(struct device * dev,struct bio_vec * bv,u32 pos)62d9b2a2bbSLauri Kasanen static bool n64cart_do_bvec(struct device *dev, struct bio_vec *bv, u32 pos)
63d9b2a2bbSLauri Kasanen {
64d9b2a2bbSLauri Kasanen dma_addr_t dma_addr;
65d9b2a2bbSLauri Kasanen const u32 bstart = pos + start;
66d9b2a2bbSLauri Kasanen
67d9b2a2bbSLauri Kasanen /* Alignment check */
68d9b2a2bbSLauri Kasanen WARN_ON_ONCE((bv->bv_offset & (MIN_ALIGNMENT - 1)) ||
69d9b2a2bbSLauri Kasanen (bv->bv_len & (MIN_ALIGNMENT - 1)));
70d9b2a2bbSLauri Kasanen
71d9b2a2bbSLauri Kasanen dma_addr = dma_map_bvec(dev, bv, DMA_FROM_DEVICE, 0);
72d9b2a2bbSLauri Kasanen if (dma_mapping_error(dev, dma_addr))
73d9b2a2bbSLauri Kasanen return false;
74d9b2a2bbSLauri Kasanen
75d9b2a2bbSLauri Kasanen n64cart_wait_dma();
76d9b2a2bbSLauri Kasanen
77402e0b8cSChristoph Hellwig n64cart_write_reg(PI_DRAM_REG, dma_addr);
78d9b2a2bbSLauri Kasanen n64cart_write_reg(PI_CART_REG, (bstart | CART_DOMAIN) & CART_MAX);
79d9b2a2bbSLauri Kasanen n64cart_write_reg(PI_WRITE_REG, bv->bv_len - 1);
80d9b2a2bbSLauri Kasanen
81d9b2a2bbSLauri Kasanen n64cart_wait_dma();
82d9b2a2bbSLauri Kasanen
83d9b2a2bbSLauri Kasanen dma_unmap_page(dev, dma_addr, bv->bv_len, DMA_FROM_DEVICE);
84d9b2a2bbSLauri Kasanen return true;
85d9b2a2bbSLauri Kasanen }
86d9b2a2bbSLauri Kasanen
n64cart_submit_bio(struct bio * bio)873e08773cSChristoph Hellwig static void n64cart_submit_bio(struct bio *bio)
88d9b2a2bbSLauri Kasanen {
89d9b2a2bbSLauri Kasanen struct bio_vec bvec;
90d9b2a2bbSLauri Kasanen struct bvec_iter iter;
91b2479de3SJackie Liu struct device *dev = bio->bi_bdev->bd_disk->private_data;
9237772f91SChaitanya Kulkarni u32 pos = bio->bi_iter.bi_sector << SECTOR_SHIFT;
93d9b2a2bbSLauri Kasanen
94d9b2a2bbSLauri Kasanen bio_for_each_segment(bvec, bio, iter) {
953e08773cSChristoph Hellwig if (!n64cart_do_bvec(dev, &bvec, pos)) {
963e08773cSChristoph Hellwig bio_io_error(bio);
973e08773cSChristoph Hellwig return;
983e08773cSChristoph Hellwig }
99d9b2a2bbSLauri Kasanen pos += bvec.bv_len;
100d9b2a2bbSLauri Kasanen }
101d9b2a2bbSLauri Kasanen
102d9b2a2bbSLauri Kasanen bio_endio(bio);
103d9b2a2bbSLauri Kasanen }
104d9b2a2bbSLauri Kasanen
105d9b2a2bbSLauri Kasanen static const struct block_device_operations n64cart_fops = {
106d9b2a2bbSLauri Kasanen .owner = THIS_MODULE,
107d9b2a2bbSLauri Kasanen .submit_bio = n64cart_submit_bio,
108d9b2a2bbSLauri Kasanen };
109d9b2a2bbSLauri Kasanen
110d9b2a2bbSLauri Kasanen /*
111d9b2a2bbSLauri Kasanen * The target device is embedded and RAM-constrained. We save RAM
112d9b2a2bbSLauri Kasanen * by initializing in __init code that gets dropped late in boot.
113d9b2a2bbSLauri Kasanen * For the same reason there is no module or unloading support.
114d9b2a2bbSLauri Kasanen */
n64cart_probe(struct platform_device * pdev)115d9b2a2bbSLauri Kasanen static int __init n64cart_probe(struct platform_device *pdev)
116d9b2a2bbSLauri Kasanen {
117d9b2a2bbSLauri Kasanen struct gendisk *disk;
118d1df6021SLuis Chamberlain int err = -ENOMEM;
119d9b2a2bbSLauri Kasanen
120d9b2a2bbSLauri Kasanen if (!start || !size) {
121f1e19224SChaitanya Kulkarni pr_err("start or size not specified\n");
122d9b2a2bbSLauri Kasanen return -ENODEV;
123d9b2a2bbSLauri Kasanen }
124d9b2a2bbSLauri Kasanen
125d9b2a2bbSLauri Kasanen if (size & 4095) {
126f1e19224SChaitanya Kulkarni pr_err("size must be a multiple of 4K\n");
127d9b2a2bbSLauri Kasanen return -ENODEV;
128d9b2a2bbSLauri Kasanen }
129d9b2a2bbSLauri Kasanen
130d9b2a2bbSLauri Kasanen reg_base = devm_platform_ioremap_resource(pdev, 0);
131221e8360SYang Yingliang if (IS_ERR(reg_base))
132221e8360SYang Yingliang return PTR_ERR(reg_base);
133d9b2a2bbSLauri Kasanen
134f9dc931dSChristoph Hellwig disk = blk_alloc_disk(NUMA_NO_NODE);
1350d424780SChaitanya Kulkarni if (!disk)
136d1df6021SLuis Chamberlain goto out;
1370d424780SChaitanya Kulkarni
138d9b2a2bbSLauri Kasanen disk->first_minor = 0;
13946e7eac6SChristoph Hellwig disk->flags = GENHD_FL_NO_PART;
140d9b2a2bbSLauri Kasanen disk->fops = &n64cart_fops;
14113d41b53SChaitanya Kulkarni disk->private_data = &pdev->dev;
142d9b2a2bbSLauri Kasanen strcpy(disk->disk_name, "n64cart");
143d9b2a2bbSLauri Kasanen
144857f6fdeSChaitanya Kulkarni set_capacity(disk, size >> SECTOR_SHIFT);
145d9b2a2bbSLauri Kasanen set_disk_ro(disk, 1);
146d9b2a2bbSLauri Kasanen
1470d424780SChaitanya Kulkarni blk_queue_flag_set(QUEUE_FLAG_NONROT, disk->queue);
1480d424780SChaitanya Kulkarni blk_queue_physical_block_size(disk->queue, 4096);
1490d424780SChaitanya Kulkarni blk_queue_logical_block_size(disk->queue, 4096);
150d9b2a2bbSLauri Kasanen
151d1df6021SLuis Chamberlain err = add_disk(disk);
152d1df6021SLuis Chamberlain if (err)
153d1df6021SLuis Chamberlain goto out_cleanup_disk;
154d9b2a2bbSLauri Kasanen
155d9b2a2bbSLauri Kasanen pr_info("n64cart: %u kb disk\n", size / 1024);
156d9b2a2bbSLauri Kasanen
157d9b2a2bbSLauri Kasanen return 0;
158d1df6021SLuis Chamberlain
159d1df6021SLuis Chamberlain out_cleanup_disk:
160*8b9ab626SChristoph Hellwig put_disk(disk);
161d1df6021SLuis Chamberlain out:
162d1df6021SLuis Chamberlain return err;
163d9b2a2bbSLauri Kasanen }
164d9b2a2bbSLauri Kasanen
165d9b2a2bbSLauri Kasanen static struct platform_driver n64cart_driver = {
166d9b2a2bbSLauri Kasanen .driver = {
167d9b2a2bbSLauri Kasanen .name = "n64cart",
168d9b2a2bbSLauri Kasanen },
169d9b2a2bbSLauri Kasanen };
170d9b2a2bbSLauri Kasanen
n64cart_init(void)171d9b2a2bbSLauri Kasanen static int __init n64cart_init(void)
172d9b2a2bbSLauri Kasanen {
173d9b2a2bbSLauri Kasanen return platform_driver_probe(&n64cart_driver, n64cart_probe);
174d9b2a2bbSLauri Kasanen }
175d9b2a2bbSLauri Kasanen
176d9b2a2bbSLauri Kasanen module_init(n64cart_init);
1779ee8c9a1SChaitanya Kulkarni
1789ee8c9a1SChaitanya Kulkarni MODULE_AUTHOR("Lauri Kasanen <cand@gmx.com>");
1799ee8c9a1SChaitanya Kulkarni MODULE_DESCRIPTION("Driver for the N64 cart");
1809ee8c9a1SChaitanya Kulkarni MODULE_LICENSE("GPL");
181