1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * MSI framework for platform devices 4 * 5 * Copyright (C) 2015 ARM Limited, All Rights Reserved. 6 * Author: Marc Zyngier <marc.zyngier@arm.com> 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License version 2 as 10 * published by the Free Software Foundation. 11 * 12 * This program is distributed in the hope that it will be useful, 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * GNU General Public License for more details. 16 * 17 * You should have received a copy of the GNU General Public License 18 * along with this program. If not, see <http://www.gnu.org/licenses/>. 19 */ 20 21 #include <linux/device.h> 22 #include <linux/idr.h> 23 #include <linux/irq.h> 24 #include <linux/irqdomain.h> 25 #include <linux/msi.h> 26 #include <linux/slab.h> 27 28 #define DEV_ID_SHIFT 21 29 #define MAX_DEV_MSIS (1 << (32 - DEV_ID_SHIFT)) 30 31 /* 32 * Internal data structure containing a (made up, but unique) devid 33 * and the callback to write the MSI message. 34 */ 35 struct platform_msi_priv_data { 36 struct device *dev; 37 void *host_data; 38 msi_alloc_info_t arg; 39 irq_write_msi_msg_t write_msg; 40 int devid; 41 }; 42 43 /* The devid allocator */ 44 static DEFINE_IDA(platform_msi_devid_ida); 45 46 #ifdef GENERIC_MSI_DOMAIN_OPS 47 /* 48 * Convert an msi_desc to a globaly unique identifier (per-device 49 * devid + msi_desc position in the msi_list). 50 */ 51 static irq_hw_number_t platform_msi_calc_hwirq(struct msi_desc *desc) 52 { 53 u32 devid; 54 55 devid = desc->platform.msi_priv_data->devid; 56 57 return (devid << (32 - DEV_ID_SHIFT)) | desc->platform.msi_index; 58 } 59 60 static void platform_msi_set_desc(msi_alloc_info_t *arg, struct msi_desc *desc) 61 { 62 arg->desc = desc; 63 arg->hwirq = platform_msi_calc_hwirq(desc); 64 } 65 66 static int platform_msi_init(struct irq_domain *domain, 67 struct msi_domain_info *info, 68 unsigned int virq, irq_hw_number_t hwirq, 69 msi_alloc_info_t *arg) 70 { 71 return irq_domain_set_hwirq_and_chip(domain, virq, hwirq, 72 info->chip, info->chip_data); 73 } 74 #else 75 #define platform_msi_set_desc NULL 76 #define platform_msi_init NULL 77 #endif 78 79 static void platform_msi_update_dom_ops(struct msi_domain_info *info) 80 { 81 struct msi_domain_ops *ops = info->ops; 82 83 BUG_ON(!ops); 84 85 if (ops->msi_init == NULL) 86 ops->msi_init = platform_msi_init; 87 if (ops->set_desc == NULL) 88 ops->set_desc = platform_msi_set_desc; 89 } 90 91 static void platform_msi_write_msg(struct irq_data *data, struct msi_msg *msg) 92 { 93 struct msi_desc *desc = irq_data_get_msi_desc(data); 94 struct platform_msi_priv_data *priv_data; 95 96 priv_data = desc->platform.msi_priv_data; 97 98 priv_data->write_msg(desc, msg); 99 } 100 101 static void platform_msi_update_chip_ops(struct msi_domain_info *info) 102 { 103 struct irq_chip *chip = info->chip; 104 105 BUG_ON(!chip); 106 if (!chip->irq_mask) 107 chip->irq_mask = irq_chip_mask_parent; 108 if (!chip->irq_unmask) 109 chip->irq_unmask = irq_chip_unmask_parent; 110 if (!chip->irq_eoi) 111 chip->irq_eoi = irq_chip_eoi_parent; 112 if (!chip->irq_set_affinity) 113 chip->irq_set_affinity = msi_domain_set_affinity; 114 if (!chip->irq_write_msi_msg) 115 chip->irq_write_msi_msg = platform_msi_write_msg; 116 } 117 118 static void platform_msi_free_descs(struct device *dev, int base, int nvec) 119 { 120 struct msi_desc *desc, *tmp; 121 122 list_for_each_entry_safe(desc, tmp, dev_to_msi_list(dev), list) { 123 if (desc->platform.msi_index >= base && 124 desc->platform.msi_index < (base + nvec)) { 125 list_del(&desc->list); 126 free_msi_entry(desc); 127 } 128 } 129 } 130 131 static int platform_msi_alloc_descs_with_irq(struct device *dev, int virq, 132 int nvec, 133 struct platform_msi_priv_data *data) 134 135 { 136 struct msi_desc *desc; 137 int i, base = 0; 138 139 if (!list_empty(dev_to_msi_list(dev))) { 140 desc = list_last_entry(dev_to_msi_list(dev), 141 struct msi_desc, list); 142 base = desc->platform.msi_index + 1; 143 } 144 145 for (i = 0; i < nvec; i++) { 146 desc = alloc_msi_entry(dev, 1, NULL); 147 if (!desc) 148 break; 149 150 desc->platform.msi_priv_data = data; 151 desc->platform.msi_index = base + i; 152 desc->irq = virq ? virq + i : 0; 153 154 list_add_tail(&desc->list, dev_to_msi_list(dev)); 155 } 156 157 if (i != nvec) { 158 /* Clean up the mess */ 159 platform_msi_free_descs(dev, base, nvec); 160 161 return -ENOMEM; 162 } 163 164 return 0; 165 } 166 167 static int platform_msi_alloc_descs(struct device *dev, int nvec, 168 struct platform_msi_priv_data *data) 169 170 { 171 return platform_msi_alloc_descs_with_irq(dev, 0, nvec, data); 172 } 173 174 /** 175 * platform_msi_create_irq_domain - Create a platform MSI interrupt domain 176 * @fwnode: Optional fwnode of the interrupt controller 177 * @info: MSI domain info 178 * @parent: Parent irq domain 179 * 180 * Updates the domain and chip ops and creates a platform MSI 181 * interrupt domain. 182 * 183 * Returns: 184 * A domain pointer or NULL in case of failure. 185 */ 186 struct irq_domain *platform_msi_create_irq_domain(struct fwnode_handle *fwnode, 187 struct msi_domain_info *info, 188 struct irq_domain *parent) 189 { 190 struct irq_domain *domain; 191 192 if (info->flags & MSI_FLAG_USE_DEF_DOM_OPS) 193 platform_msi_update_dom_ops(info); 194 if (info->flags & MSI_FLAG_USE_DEF_CHIP_OPS) 195 platform_msi_update_chip_ops(info); 196 197 domain = msi_create_irq_domain(fwnode, info, parent); 198 if (domain) 199 irq_domain_update_bus_token(domain, DOMAIN_BUS_PLATFORM_MSI); 200 201 return domain; 202 } 203 204 static struct platform_msi_priv_data * 205 platform_msi_alloc_priv_data(struct device *dev, unsigned int nvec, 206 irq_write_msi_msg_t write_msi_msg) 207 { 208 struct platform_msi_priv_data *datap; 209 /* 210 * Limit the number of interrupts to 2048 per device. Should we 211 * need to bump this up, DEV_ID_SHIFT should be adjusted 212 * accordingly (which would impact the max number of MSI 213 * capable devices). 214 */ 215 if (!dev->msi_domain || !write_msi_msg || !nvec || nvec > MAX_DEV_MSIS) 216 return ERR_PTR(-EINVAL); 217 218 if (dev->msi_domain->bus_token != DOMAIN_BUS_PLATFORM_MSI) { 219 dev_err(dev, "Incompatible msi_domain, giving up\n"); 220 return ERR_PTR(-EINVAL); 221 } 222 223 /* Already had a helping of MSI? Greed... */ 224 if (!list_empty(dev_to_msi_list(dev))) 225 return ERR_PTR(-EBUSY); 226 227 datap = kzalloc(sizeof(*datap), GFP_KERNEL); 228 if (!datap) 229 return ERR_PTR(-ENOMEM); 230 231 datap->devid = ida_simple_get(&platform_msi_devid_ida, 232 0, 1 << DEV_ID_SHIFT, GFP_KERNEL); 233 if (datap->devid < 0) { 234 int err = datap->devid; 235 kfree(datap); 236 return ERR_PTR(err); 237 } 238 239 datap->write_msg = write_msi_msg; 240 datap->dev = dev; 241 242 return datap; 243 } 244 245 static void platform_msi_free_priv_data(struct platform_msi_priv_data *data) 246 { 247 ida_simple_remove(&platform_msi_devid_ida, data->devid); 248 kfree(data); 249 } 250 251 /** 252 * platform_msi_domain_alloc_irqs - Allocate MSI interrupts for @dev 253 * @dev: The device for which to allocate interrupts 254 * @nvec: The number of interrupts to allocate 255 * @write_msi_msg: Callback to write an interrupt message for @dev 256 * 257 * Returns: 258 * Zero for success, or an error code in case of failure 259 */ 260 int platform_msi_domain_alloc_irqs(struct device *dev, unsigned int nvec, 261 irq_write_msi_msg_t write_msi_msg) 262 { 263 struct platform_msi_priv_data *priv_data; 264 int err; 265 266 priv_data = platform_msi_alloc_priv_data(dev, nvec, write_msi_msg); 267 if (IS_ERR(priv_data)) 268 return PTR_ERR(priv_data); 269 270 err = platform_msi_alloc_descs(dev, nvec, priv_data); 271 if (err) 272 goto out_free_priv_data; 273 274 err = msi_domain_alloc_irqs(dev->msi_domain, dev, nvec); 275 if (err) 276 goto out_free_desc; 277 278 return 0; 279 280 out_free_desc: 281 platform_msi_free_descs(dev, 0, nvec); 282 out_free_priv_data: 283 platform_msi_free_priv_data(priv_data); 284 285 return err; 286 } 287 EXPORT_SYMBOL_GPL(platform_msi_domain_alloc_irqs); 288 289 /** 290 * platform_msi_domain_free_irqs - Free MSI interrupts for @dev 291 * @dev: The device for which to free interrupts 292 */ 293 void platform_msi_domain_free_irqs(struct device *dev) 294 { 295 if (!list_empty(dev_to_msi_list(dev))) { 296 struct msi_desc *desc; 297 298 desc = first_msi_entry(dev); 299 platform_msi_free_priv_data(desc->platform.msi_priv_data); 300 } 301 302 msi_domain_free_irqs(dev->msi_domain, dev); 303 platform_msi_free_descs(dev, 0, MAX_DEV_MSIS); 304 } 305 EXPORT_SYMBOL_GPL(platform_msi_domain_free_irqs); 306 307 /** 308 * platform_msi_get_host_data - Query the private data associated with 309 * a platform-msi domain 310 * @domain: The platform-msi domain 311 * 312 * Returns the private data provided when calling 313 * platform_msi_create_device_domain. 314 */ 315 void *platform_msi_get_host_data(struct irq_domain *domain) 316 { 317 struct platform_msi_priv_data *data = domain->host_data; 318 return data->host_data; 319 } 320 321 /** 322 * platform_msi_create_device_domain - Create a platform-msi domain 323 * 324 * @dev: The device generating the MSIs 325 * @nvec: The number of MSIs that need to be allocated 326 * @write_msi_msg: Callback to write an interrupt message for @dev 327 * @ops: The hierarchy domain operations to use 328 * @host_data: Private data associated to this domain 329 * 330 * Returns an irqdomain for @nvec interrupts 331 */ 332 struct irq_domain * 333 platform_msi_create_device_domain(struct device *dev, 334 unsigned int nvec, 335 irq_write_msi_msg_t write_msi_msg, 336 const struct irq_domain_ops *ops, 337 void *host_data) 338 { 339 struct platform_msi_priv_data *data; 340 struct irq_domain *domain; 341 int err; 342 343 data = platform_msi_alloc_priv_data(dev, nvec, write_msi_msg); 344 if (IS_ERR(data)) 345 return NULL; 346 347 data->host_data = host_data; 348 domain = irq_domain_create_hierarchy(dev->msi_domain, 0, nvec, 349 dev->fwnode, ops, data); 350 if (!domain) 351 goto free_priv; 352 353 err = msi_domain_prepare_irqs(domain->parent, dev, nvec, &data->arg); 354 if (err) 355 goto free_domain; 356 357 return domain; 358 359 free_domain: 360 irq_domain_remove(domain); 361 free_priv: 362 platform_msi_free_priv_data(data); 363 return NULL; 364 } 365 366 /** 367 * platform_msi_domain_free - Free interrupts associated with a platform-msi 368 * domain 369 * 370 * @domain: The platform-msi domain 371 * @virq: The base irq from which to perform the free operation 372 * @nvec: How many interrupts to free from @virq 373 */ 374 void platform_msi_domain_free(struct irq_domain *domain, unsigned int virq, 375 unsigned int nvec) 376 { 377 struct platform_msi_priv_data *data = domain->host_data; 378 struct msi_desc *desc; 379 for_each_msi_entry(desc, data->dev) { 380 if (WARN_ON(!desc->irq || desc->nvec_used != 1)) 381 return; 382 if (!(desc->irq >= virq && desc->irq < (virq + nvec))) 383 continue; 384 385 irq_domain_free_irqs_common(domain, desc->irq, 1); 386 } 387 } 388 389 /** 390 * platform_msi_domain_alloc - Allocate interrupts associated with 391 * a platform-msi domain 392 * 393 * @domain: The platform-msi domain 394 * @virq: The base irq from which to perform the allocate operation 395 * @nvec: How many interrupts to free from @virq 396 * 397 * Return 0 on success, or an error code on failure. Must be called 398 * with irq_domain_mutex held (which can only be done as part of a 399 * top-level interrupt allocation). 400 */ 401 int platform_msi_domain_alloc(struct irq_domain *domain, unsigned int virq, 402 unsigned int nr_irqs) 403 { 404 struct platform_msi_priv_data *data = domain->host_data; 405 int err; 406 407 err = platform_msi_alloc_descs_with_irq(data->dev, virq, nr_irqs, data); 408 if (err) 409 return err; 410 411 err = msi_domain_populate_irqs(domain->parent, data->dev, 412 virq, nr_irqs, &data->arg); 413 if (err) 414 platform_msi_domain_free(domain, virq, nr_irqs); 415 416 return err; 417 } 418