1*b2441318SGreg Kroah-Hartman /* SPDX-License-Identifier: GPL-2.0 */ 21da177e4SLinus Torvalds /* drivers/atm/eni.h - Efficient Networks ENI155P device driver declarations */ 31da177e4SLinus Torvalds 41da177e4SLinus Torvalds /* Written 1995-2000 by Werner Almesberger, EPFL LRC/ICA */ 51da177e4SLinus Torvalds 61da177e4SLinus Torvalds 71da177e4SLinus Torvalds #ifndef DRIVER_ATM_ENI_H 81da177e4SLinus Torvalds #define DRIVER_ATM_ENI_H 91da177e4SLinus Torvalds 101da177e4SLinus Torvalds #include <linux/atm.h> 111da177e4SLinus Torvalds #include <linux/atmdev.h> 12a6b7a407SAlexey Dobriyan #include <linux/interrupt.h> 131da177e4SLinus Torvalds #include <linux/sonet.h> 141da177e4SLinus Torvalds #include <linux/skbuff.h> 151da177e4SLinus Torvalds #include <linux/time.h> 161da177e4SLinus Torvalds #include <linux/pci.h> 171da177e4SLinus Torvalds #include <linux/spinlock.h> 1860063497SArun Sharma #include <linux/atomic.h> 191da177e4SLinus Torvalds 201da177e4SLinus Torvalds #include "midway.h" 211da177e4SLinus Torvalds 221da177e4SLinus Torvalds 231da177e4SLinus Torvalds #define DEV_LABEL "eni" 241da177e4SLinus Torvalds 251da177e4SLinus Torvalds #define UBR_BUFFER (128*1024) /* UBR buffer size */ 261da177e4SLinus Torvalds 271da177e4SLinus Torvalds #define RX_DMA_BUF 8 /* burst and skip a few things */ 281da177e4SLinus Torvalds #define TX_DMA_BUF 100 /* should be enough for 64 kB */ 291da177e4SLinus Torvalds 301da177e4SLinus Torvalds #define DEFAULT_RX_MULT 300 /* max_sdu*3 */ 311da177e4SLinus Torvalds #define DEFAULT_TX_MULT 300 /* max_sdu*3 */ 321da177e4SLinus Torvalds 331da177e4SLinus Torvalds #define ENI_ZEROES_SIZE 4 /* need that many DMA-able zero bytes */ 341da177e4SLinus Torvalds 351da177e4SLinus Torvalds 361da177e4SLinus Torvalds struct eni_free { 371da177e4SLinus Torvalds void __iomem *start; /* counting in bytes */ 381da177e4SLinus Torvalds int order; 391da177e4SLinus Torvalds }; 401da177e4SLinus Torvalds 411da177e4SLinus Torvalds struct eni_tx { 421da177e4SLinus Torvalds void __iomem *send; /* base, 0 if unused */ 431da177e4SLinus Torvalds int prescaler; /* shaping prescaler */ 441da177e4SLinus Torvalds int resolution; /* shaping divider */ 451da177e4SLinus Torvalds unsigned long tx_pos; /* current TX write position */ 461da177e4SLinus Torvalds unsigned long words; /* size of TX queue */ 471da177e4SLinus Torvalds int index; /* TX channel number */ 481da177e4SLinus Torvalds int reserved; /* reserved peak cell rate */ 491da177e4SLinus Torvalds int shaping; /* shaped peak cell rate */ 501da177e4SLinus Torvalds struct sk_buff_head backlog; /* queue of waiting TX buffers */ 511da177e4SLinus Torvalds }; 521da177e4SLinus Torvalds 531da177e4SLinus Torvalds struct eni_vcc { 541da177e4SLinus Torvalds int (*rx)(struct atm_vcc *vcc); /* RX function, NULL if none */ 551da177e4SLinus Torvalds void __iomem *recv; /* receive buffer */ 561da177e4SLinus Torvalds unsigned long words; /* its size in words */ 571da177e4SLinus Torvalds unsigned long descr; /* next descriptor (RX) */ 581da177e4SLinus Torvalds unsigned long rx_pos; /* current RX descriptor pos */ 591da177e4SLinus Torvalds struct eni_tx *tx; /* TXer, NULL if none */ 601da177e4SLinus Torvalds int rxing; /* number of pending PDUs */ 611da177e4SLinus Torvalds int servicing; /* number of waiting VCs (0 or 1) */ 621da177e4SLinus Torvalds int txing; /* number of pending TX bytes */ 638570419fSYOSHIFUJI Hideaki ktime_t timestamp; /* for RX timing */ 641da177e4SLinus Torvalds struct atm_vcc *next; /* next pending RX */ 651da177e4SLinus Torvalds struct sk_buff *last; /* last PDU being DMAed (used to carry 661da177e4SLinus Torvalds discard information) */ 671da177e4SLinus Torvalds }; 681da177e4SLinus Torvalds 691da177e4SLinus Torvalds struct eni_dev { 701da177e4SLinus Torvalds /*-------------------------------- spinlock */ 711da177e4SLinus Torvalds spinlock_t lock; /* sync with interrupt */ 721da177e4SLinus Torvalds struct tasklet_struct task; /* tasklet for interrupt work */ 731da177e4SLinus Torvalds u32 events; /* pending events */ 741da177e4SLinus Torvalds /*-------------------------------- base pointers into Midway address 751da177e4SLinus Torvalds space */ 76126a3fd2Sfrançois romieu void __iomem *ioaddr; 771da177e4SLinus Torvalds void __iomem *phy; /* PHY interface chip registers */ 781da177e4SLinus Torvalds void __iomem *reg; /* register base */ 791da177e4SLinus Torvalds void __iomem *ram; /* RAM base */ 801da177e4SLinus Torvalds void __iomem *vci; /* VCI table */ 811da177e4SLinus Torvalds void __iomem *rx_dma; /* RX DMA queue */ 821da177e4SLinus Torvalds void __iomem *tx_dma; /* TX DMA queue */ 831da177e4SLinus Torvalds void __iomem *service; /* service list */ 841da177e4SLinus Torvalds /*-------------------------------- TX part */ 851da177e4SLinus Torvalds struct eni_tx tx[NR_CHAN]; /* TX channels */ 861da177e4SLinus Torvalds struct eni_tx *ubr; /* UBR channel */ 871da177e4SLinus Torvalds struct sk_buff_head tx_queue; /* PDUs currently being TX DMAed*/ 881da177e4SLinus Torvalds wait_queue_head_t tx_wait; /* for close */ 891da177e4SLinus Torvalds int tx_bw; /* remaining bandwidth */ 901da177e4SLinus Torvalds u32 dma[TX_DMA_BUF*2]; /* DMA request scratch area */ 91126a3fd2Sfrançois romieu struct eni_zero { /* aligned "magic" zeroes */ 92126a3fd2Sfrançois romieu u32 *addr; 93126a3fd2Sfrançois romieu dma_addr_t dma; 94126a3fd2Sfrançois romieu } zero; 951da177e4SLinus Torvalds int tx_mult; /* buffer size multiplier (percent) */ 961da177e4SLinus Torvalds /*-------------------------------- RX part */ 971da177e4SLinus Torvalds u32 serv_read; /* host service read index */ 981da177e4SLinus Torvalds struct atm_vcc *fast,*last_fast;/* queues of VCCs with pending PDUs */ 991da177e4SLinus Torvalds struct atm_vcc *slow,*last_slow; 1001da177e4SLinus Torvalds struct atm_vcc **rx_map; /* for fast lookups */ 1011da177e4SLinus Torvalds struct sk_buff_head rx_queue; /* PDUs currently being RX-DMAed */ 1021da177e4SLinus Torvalds wait_queue_head_t rx_wait; /* for close */ 1031da177e4SLinus Torvalds int rx_mult; /* buffer size multiplier (percent) */ 1041da177e4SLinus Torvalds /*-------------------------------- statistics */ 1051da177e4SLinus Torvalds unsigned long lost; /* number of lost cells (RX) */ 1061da177e4SLinus Torvalds /*-------------------------------- memory management */ 1071da177e4SLinus Torvalds unsigned long base_diff; /* virtual-real base address */ 1081da177e4SLinus Torvalds int free_len; /* free list length */ 1091da177e4SLinus Torvalds struct eni_free *free_list; /* free list */ 1101da177e4SLinus Torvalds int free_list_size; /* maximum size of free list */ 1111da177e4SLinus Torvalds /*-------------------------------- ENI links */ 1121da177e4SLinus Torvalds struct atm_dev *more; /* other ENI devices */ 1131da177e4SLinus Torvalds /*-------------------------------- general information */ 1141da177e4SLinus Torvalds int mem; /* RAM on board (in bytes) */ 1151da177e4SLinus Torvalds int asic; /* PCI interface type, 0 for FPGA */ 1161da177e4SLinus Torvalds unsigned int irq; /* IRQ */ 1171da177e4SLinus Torvalds struct pci_dev *pci_dev; /* PCI stuff */ 1181da177e4SLinus Torvalds }; 1191da177e4SLinus Torvalds 1201da177e4SLinus Torvalds 1211da177e4SLinus Torvalds #define ENI_DEV(d) ((struct eni_dev *) (d)->dev_data) 1221da177e4SLinus Torvalds #define ENI_VCC(d) ((struct eni_vcc *) (d)->dev_data) 1231da177e4SLinus Torvalds 1241da177e4SLinus Torvalds 1251da177e4SLinus Torvalds struct eni_skb_prv { 1261da177e4SLinus Torvalds struct atm_skb_data _; /* reserved */ 1271da177e4SLinus Torvalds unsigned long pos; /* position of next descriptor */ 1281da177e4SLinus Torvalds int size; /* PDU size in reassembly buffer */ 1291da177e4SLinus Torvalds dma_addr_t paddr; /* DMA handle */ 1301da177e4SLinus Torvalds }; 1311da177e4SLinus Torvalds 1321da177e4SLinus Torvalds #define ENI_PRV_SIZE(skb) (((struct eni_skb_prv *) (skb)->cb)->size) 1331da177e4SLinus Torvalds #define ENI_PRV_POS(skb) (((struct eni_skb_prv *) (skb)->cb)->pos) 1341da177e4SLinus Torvalds #define ENI_PRV_PADDR(skb) (((struct eni_skb_prv *) (skb)->cb)->paddr) 1351da177e4SLinus Torvalds 1361da177e4SLinus Torvalds #endif 137