1c82ee6d3SThomas Gleixner // SPDX-License-Identifier: GPL-2.0-or-later
2c6fd2807SJeff Garzik /*
3c6fd2807SJeff Garzik * sata_uli.c - ULi Electronics SATA
4c6fd2807SJeff Garzik *
5c6fd2807SJeff Garzik * libata documentation is available via 'make {ps|pdf}docs',
619285f3cSMauro Carvalho Chehab * as Documentation/driver-api/libata.rst
7c6fd2807SJeff Garzik *
8c6fd2807SJeff Garzik * Hardware documentation available under NDA.
9c6fd2807SJeff Garzik */
10c6fd2807SJeff Garzik
11c6fd2807SJeff Garzik #include <linux/kernel.h>
12c6fd2807SJeff Garzik #include <linux/module.h>
135a0e3ad6STejun Heo #include <linux/gfp.h>
14c6fd2807SJeff Garzik #include <linux/pci.h>
15c6fd2807SJeff Garzik #include <linux/blkdev.h>
16c6fd2807SJeff Garzik #include <linux/delay.h>
17c6fd2807SJeff Garzik #include <linux/interrupt.h>
18c6fd2807SJeff Garzik #include <linux/device.h>
19c6fd2807SJeff Garzik #include <scsi/scsi_host.h>
20c6fd2807SJeff Garzik #include <linux/libata.h>
21c6fd2807SJeff Garzik
22c6fd2807SJeff Garzik #define DRV_NAME "sata_uli"
232a3103ceSJeff Garzik #define DRV_VERSION "1.3"
24c6fd2807SJeff Garzik
25c6fd2807SJeff Garzik enum {
26c6fd2807SJeff Garzik uli_5289 = 0,
27c6fd2807SJeff Garzik uli_5287 = 1,
28c6fd2807SJeff Garzik uli_5281 = 2,
29c6fd2807SJeff Garzik
30c6fd2807SJeff Garzik uli_max_ports = 4,
31c6fd2807SJeff Garzik
32c6fd2807SJeff Garzik /* PCI configuration registers */
33c6fd2807SJeff Garzik ULI5287_BASE = 0x90, /* sata0 phy SCR registers */
34c6fd2807SJeff Garzik ULI5287_OFFS = 0x10, /* offset from sata0->sata1 phy regs */
35c6fd2807SJeff Garzik ULI5281_BASE = 0x60, /* sata0 phy SCR registers */
36c6fd2807SJeff Garzik ULI5281_OFFS = 0x60, /* offset from sata0->sata1 phy regs */
37c6fd2807SJeff Garzik };
38c6fd2807SJeff Garzik
39c6fd2807SJeff Garzik struct uli_priv {
40c6fd2807SJeff Garzik unsigned int scr_cfg_addr[uli_max_ports];
41c6fd2807SJeff Garzik };
42c6fd2807SJeff Garzik
43c6fd2807SJeff Garzik static int uli_init_one(struct pci_dev *pdev, const struct pci_device_id *ent);
4482ef04fbSTejun Heo static int uli_scr_read(struct ata_link *link, unsigned int sc_reg, u32 *val);
4582ef04fbSTejun Heo static int uli_scr_write(struct ata_link *link, unsigned int sc_reg, u32 val);
46c6fd2807SJeff Garzik
47c6fd2807SJeff Garzik static const struct pci_device_id uli_pci_tbl[] = {
4854bb3a94SJeff Garzik { PCI_VDEVICE(AL, 0x5289), uli_5289 },
4954bb3a94SJeff Garzik { PCI_VDEVICE(AL, 0x5287), uli_5287 },
5054bb3a94SJeff Garzik { PCI_VDEVICE(AL, 0x5281), uli_5281 },
5154bb3a94SJeff Garzik
52c6fd2807SJeff Garzik { } /* terminate list */
53c6fd2807SJeff Garzik };
54c6fd2807SJeff Garzik
55c6fd2807SJeff Garzik static struct pci_driver uli_pci_driver = {
56c6fd2807SJeff Garzik .name = DRV_NAME,
57c6fd2807SJeff Garzik .id_table = uli_pci_tbl,
58c6fd2807SJeff Garzik .probe = uli_init_one,
59c6fd2807SJeff Garzik .remove = ata_pci_remove_one,
60c6fd2807SJeff Garzik };
61c6fd2807SJeff Garzik
62*25df73d9SBart Van Assche static const struct scsi_host_template uli_sht = {
6368d1d07bSTejun Heo ATA_BMDMA_SHT(DRV_NAME),
64c6fd2807SJeff Garzik };
65c6fd2807SJeff Garzik
66029cfd6bSTejun Heo static struct ata_port_operations uli_ops = {
67029cfd6bSTejun Heo .inherits = &ata_bmdma_port_ops,
68c6fd2807SJeff Garzik .scr_read = uli_scr_read,
69c6fd2807SJeff Garzik .scr_write = uli_scr_write,
7070a3143aSTejun Heo .hardreset = ATA_OP_NULL,
71c6fd2807SJeff Garzik };
72c6fd2807SJeff Garzik
731626aeb8STejun Heo static const struct ata_port_info uli_port_info = {
749cbe056fSSergei Shtylyov .flags = ATA_FLAG_SATA | ATA_FLAG_IGN_SIMPLEX,
7514bdef98SErik Inge Bolsø .pio_mask = ATA_PIO4,
76bf6263a8SJeff Garzik .udma_mask = ATA_UDMA6,
77c6fd2807SJeff Garzik .port_ops = &uli_ops,
78c6fd2807SJeff Garzik };
79c6fd2807SJeff Garzik
80c6fd2807SJeff Garzik
81c6fd2807SJeff Garzik MODULE_AUTHOR("Peer Chen");
82c6fd2807SJeff Garzik MODULE_DESCRIPTION("low-level driver for ULi Electronics SATA controller");
83c6fd2807SJeff Garzik MODULE_LICENSE("GPL");
84c6fd2807SJeff Garzik MODULE_DEVICE_TABLE(pci, uli_pci_tbl);
85c6fd2807SJeff Garzik MODULE_VERSION(DRV_VERSION);
86c6fd2807SJeff Garzik
get_scr_cfg_addr(struct ata_port * ap,unsigned int sc_reg)87c6fd2807SJeff Garzik static unsigned int get_scr_cfg_addr(struct ata_port *ap, unsigned int sc_reg)
88c6fd2807SJeff Garzik {
89cca3974eSJeff Garzik struct uli_priv *hpriv = ap->host->private_data;
90c6fd2807SJeff Garzik return hpriv->scr_cfg_addr[ap->port_no] + (4 * sc_reg);
91c6fd2807SJeff Garzik }
92c6fd2807SJeff Garzik
uli_scr_cfg_read(struct ata_link * link,unsigned int sc_reg)9382ef04fbSTejun Heo static u32 uli_scr_cfg_read(struct ata_link *link, unsigned int sc_reg)
94c6fd2807SJeff Garzik {
9582ef04fbSTejun Heo struct pci_dev *pdev = to_pci_dev(link->ap->host->dev);
9682ef04fbSTejun Heo unsigned int cfg_addr = get_scr_cfg_addr(link->ap, sc_reg);
97c6fd2807SJeff Garzik u32 val;
98c6fd2807SJeff Garzik
99c6fd2807SJeff Garzik pci_read_config_dword(pdev, cfg_addr, &val);
100c6fd2807SJeff Garzik return val;
101c6fd2807SJeff Garzik }
102c6fd2807SJeff Garzik
uli_scr_cfg_write(struct ata_link * link,unsigned int scr,u32 val)10382ef04fbSTejun Heo static void uli_scr_cfg_write(struct ata_link *link, unsigned int scr, u32 val)
104c6fd2807SJeff Garzik {
10582ef04fbSTejun Heo struct pci_dev *pdev = to_pci_dev(link->ap->host->dev);
10682ef04fbSTejun Heo unsigned int cfg_addr = get_scr_cfg_addr(link->ap, scr);
107c6fd2807SJeff Garzik
108c6fd2807SJeff Garzik pci_write_config_dword(pdev, cfg_addr, val);
109c6fd2807SJeff Garzik }
110c6fd2807SJeff Garzik
uli_scr_read(struct ata_link * link,unsigned int sc_reg,u32 * val)11182ef04fbSTejun Heo static int uli_scr_read(struct ata_link *link, unsigned int sc_reg, u32 *val)
112c6fd2807SJeff Garzik {
113c6fd2807SJeff Garzik if (sc_reg > SCR_CONTROL)
114da3dbb17STejun Heo return -EINVAL;
115c6fd2807SJeff Garzik
11682ef04fbSTejun Heo *val = uli_scr_cfg_read(link, sc_reg);
117da3dbb17STejun Heo return 0;
118c6fd2807SJeff Garzik }
119c6fd2807SJeff Garzik
uli_scr_write(struct ata_link * link,unsigned int sc_reg,u32 val)12082ef04fbSTejun Heo static int uli_scr_write(struct ata_link *link, unsigned int sc_reg, u32 val)
121c6fd2807SJeff Garzik {
122c6fd2807SJeff Garzik if (sc_reg > SCR_CONTROL) //SCR_CONTROL=2, SCR_ERROR=1, SCR_STATUS=0
123da3dbb17STejun Heo return -EINVAL;
124c6fd2807SJeff Garzik
12582ef04fbSTejun Heo uli_scr_cfg_write(link, sc_reg, val);
126da3dbb17STejun Heo return 0;
127c6fd2807SJeff Garzik }
128c6fd2807SJeff Garzik
uli_init_one(struct pci_dev * pdev,const struct pci_device_id * ent)129c6fd2807SJeff Garzik static int uli_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
130c6fd2807SJeff Garzik {
1319a829ccfSTejun Heo const struct ata_port_info *ppi[] = { &uli_port_info, NULL };
132c6fd2807SJeff Garzik unsigned int board_idx = (unsigned int) ent->driver_data;
1339a829ccfSTejun Heo struct ata_host *host;
134c6fd2807SJeff Garzik struct uli_priv *hpriv;
1350d5ff566STejun Heo void __iomem * const *iomap;
1369a829ccfSTejun Heo struct ata_ioports *ioaddr;
1379a829ccfSTejun Heo int n_ports, rc;
138c6fd2807SJeff Garzik
13906296a1eSJoe Perches ata_print_version_once(&pdev->dev, DRV_VERSION);
140c6fd2807SJeff Garzik
14124dc5f33STejun Heo rc = pcim_enable_device(pdev);
142c6fd2807SJeff Garzik if (rc)
143c6fd2807SJeff Garzik return rc;
144c6fd2807SJeff Garzik
1459a829ccfSTejun Heo n_ports = 2;
1469a829ccfSTejun Heo if (board_idx == uli_5287)
1479a829ccfSTejun Heo n_ports = 4;
1481626aeb8STejun Heo
1491626aeb8STejun Heo /* allocate the host */
1501626aeb8STejun Heo host = ata_host_alloc_pinfo(&pdev->dev, ppi, n_ports);
1511626aeb8STejun Heo if (!host)
1521626aeb8STejun Heo return -ENOMEM;
153c6fd2807SJeff Garzik
15424dc5f33STejun Heo hpriv = devm_kzalloc(&pdev->dev, sizeof(*hpriv), GFP_KERNEL);
15524dc5f33STejun Heo if (!hpriv)
15624dc5f33STejun Heo return -ENOMEM;
1579a829ccfSTejun Heo host->private_data = hpriv;
158c6fd2807SJeff Garzik
1591626aeb8STejun Heo /* the first two ports are standard SFF */
1609363c382STejun Heo rc = ata_pci_sff_init_host(host);
1611626aeb8STejun Heo if (rc)
1621626aeb8STejun Heo return rc;
1631626aeb8STejun Heo
164c7087652STejun Heo ata_pci_bmdma_init(host);
1651626aeb8STejun Heo
1669a829ccfSTejun Heo iomap = host->iomap;
1670d5ff566STejun Heo
168c6fd2807SJeff Garzik switch (board_idx) {
169c6fd2807SJeff Garzik case uli_5287:
1701626aeb8STejun Heo /* If there are four, the last two live right after
1711626aeb8STejun Heo * the standard SFF ports.
1721626aeb8STejun Heo */
173c6fd2807SJeff Garzik hpriv->scr_cfg_addr[0] = ULI5287_BASE;
174c6fd2807SJeff Garzik hpriv->scr_cfg_addr[1] = ULI5287_BASE + ULI5287_OFFS;
175c6fd2807SJeff Garzik
1769a829ccfSTejun Heo ioaddr = &host->ports[2]->ioaddr;
1779a829ccfSTejun Heo ioaddr->cmd_addr = iomap[0] + 8;
1789a829ccfSTejun Heo ioaddr->altstatus_addr =
1799a829ccfSTejun Heo ioaddr->ctl_addr = (void __iomem *)
1800d5ff566STejun Heo ((unsigned long)iomap[1] | ATA_PCI_CTL_OFS) + 4;
1819a829ccfSTejun Heo ioaddr->bmdma_addr = iomap[4] + 16;
182c6fd2807SJeff Garzik hpriv->scr_cfg_addr[2] = ULI5287_BASE + ULI5287_OFFS*4;
1839363c382STejun Heo ata_sff_std_ports(ioaddr);
184c6fd2807SJeff Garzik
185cbcdd875STejun Heo ata_port_desc(host->ports[2],
186cbcdd875STejun Heo "cmd 0x%llx ctl 0x%llx bmdma 0x%llx",
187cbcdd875STejun Heo (unsigned long long)pci_resource_start(pdev, 0) + 8,
188cbcdd875STejun Heo ((unsigned long long)pci_resource_start(pdev, 1) | ATA_PCI_CTL_OFS) + 4,
189cbcdd875STejun Heo (unsigned long long)pci_resource_start(pdev, 4) + 16);
190cbcdd875STejun Heo
1919a829ccfSTejun Heo ioaddr = &host->ports[3]->ioaddr;
1929a829ccfSTejun Heo ioaddr->cmd_addr = iomap[2] + 8;
1939a829ccfSTejun Heo ioaddr->altstatus_addr =
1949a829ccfSTejun Heo ioaddr->ctl_addr = (void __iomem *)
1950d5ff566STejun Heo ((unsigned long)iomap[3] | ATA_PCI_CTL_OFS) + 4;
1969a829ccfSTejun Heo ioaddr->bmdma_addr = iomap[4] + 24;
197c6fd2807SJeff Garzik hpriv->scr_cfg_addr[3] = ULI5287_BASE + ULI5287_OFFS*5;
1989363c382STejun Heo ata_sff_std_ports(ioaddr);
199cbcdd875STejun Heo
200cbcdd875STejun Heo ata_port_desc(host->ports[2],
201cbcdd875STejun Heo "cmd 0x%llx ctl 0x%llx bmdma 0x%llx",
202cbcdd875STejun Heo (unsigned long long)pci_resource_start(pdev, 2) + 9,
203cbcdd875STejun Heo ((unsigned long long)pci_resource_start(pdev, 3) | ATA_PCI_CTL_OFS) + 4,
204cbcdd875STejun Heo (unsigned long long)pci_resource_start(pdev, 4) + 24);
205cbcdd875STejun Heo
206c6fd2807SJeff Garzik break;
207c6fd2807SJeff Garzik
208c6fd2807SJeff Garzik case uli_5289:
209c6fd2807SJeff Garzik hpriv->scr_cfg_addr[0] = ULI5287_BASE;
210c6fd2807SJeff Garzik hpriv->scr_cfg_addr[1] = ULI5287_BASE + ULI5287_OFFS;
211c6fd2807SJeff Garzik break;
212c6fd2807SJeff Garzik
213c6fd2807SJeff Garzik case uli_5281:
214c6fd2807SJeff Garzik hpriv->scr_cfg_addr[0] = ULI5281_BASE;
215c6fd2807SJeff Garzik hpriv->scr_cfg_addr[1] = ULI5281_BASE + ULI5281_OFFS;
216c6fd2807SJeff Garzik break;
217c6fd2807SJeff Garzik
218c6fd2807SJeff Garzik default:
219c6fd2807SJeff Garzik BUG();
220c6fd2807SJeff Garzik break;
221c6fd2807SJeff Garzik }
222c6fd2807SJeff Garzik
223c6fd2807SJeff Garzik pci_set_master(pdev);
224c6fd2807SJeff Garzik pci_intx(pdev, 1);
225c3b28894STejun Heo return ata_host_activate(host, pdev->irq, ata_bmdma_interrupt,
2269363c382STejun Heo IRQF_SHARED, &uli_sht);
227c6fd2807SJeff Garzik }
228c6fd2807SJeff Garzik
2292fc75da0SAxel Lin module_pci_driver(uli_pci_driver);
230