1b2f46fd8SDan Williams /* 2b2f46fd8SDan Williams * Copyright(c) 2007 Yuri Tikhonov <yur@emcraft.com> 3b2f46fd8SDan Williams * Copyright(c) 2009 Intel Corporation 4b2f46fd8SDan Williams * 5b2f46fd8SDan Williams * This program is free software; you can redistribute it and/or modify it 6b2f46fd8SDan Williams * under the terms of the GNU General Public License as published by the Free 7b2f46fd8SDan Williams * Software Foundation; either version 2 of the License, or (at your option) 8b2f46fd8SDan Williams * any later version. 9b2f46fd8SDan Williams * 10b2f46fd8SDan Williams * This program is distributed in the hope that it will be useful, but WITHOUT 11b2f46fd8SDan Williams * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 12b2f46fd8SDan Williams * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 13b2f46fd8SDan Williams * more details. 14b2f46fd8SDan Williams * 15b2f46fd8SDan Williams * You should have received a copy of the GNU General Public License along with 16b2f46fd8SDan Williams * this program; if not, write to the Free Software Foundation, Inc., 59 17b2f46fd8SDan Williams * Temple Place - Suite 330, Boston, MA 02111-1307, USA. 18b2f46fd8SDan Williams * 19b2f46fd8SDan Williams * The full GNU General Public License is included in this distribution in the 20b2f46fd8SDan Williams * file called COPYING. 21b2f46fd8SDan Williams */ 22b2f46fd8SDan Williams #include <linux/kernel.h> 23b2f46fd8SDan Williams #include <linux/interrupt.h> 244bb33cc8SPaul Gortmaker #include <linux/module.h> 25b2f46fd8SDan Williams #include <linux/dma-mapping.h> 26b2f46fd8SDan Williams #include <linux/raid/pq.h> 27b2f46fd8SDan Williams #include <linux/async_tx.h> 285a0e3ad6STejun Heo #include <linux/gfp.h> 29b2f46fd8SDan Williams 30b2f46fd8SDan Williams /** 31030b0772SDan Williams * pq_scribble_page - space to hold throwaway P or Q buffer for 32030b0772SDan Williams * synchronous gen_syndrome 33b2f46fd8SDan Williams */ 34030b0772SDan Williams static struct page *pq_scribble_page; 35b2f46fd8SDan Williams 36b2f46fd8SDan Williams /* the struct page *blocks[] parameter passed to async_gen_syndrome() 37b2f46fd8SDan Williams * and async_syndrome_val() contains the 'P' destination address at 38b2f46fd8SDan Williams * blocks[disks-2] and the 'Q' destination address at blocks[disks-1] 39b2f46fd8SDan Williams * 40b2f46fd8SDan Williams * note: these are macros as they are used as lvalues 41b2f46fd8SDan Williams */ 42b2f46fd8SDan Williams #define P(b, d) (b[d-2]) 43b2f46fd8SDan Williams #define Q(b, d) (b[d-1]) 44b2f46fd8SDan Williams 45b2f46fd8SDan Williams /** 46b2f46fd8SDan Williams * do_async_gen_syndrome - asynchronously calculate P and/or Q 47b2f46fd8SDan Williams */ 48b2f46fd8SDan Williams static __async_inline struct dma_async_tx_descriptor * 497476bd79SDan Williams do_async_gen_syndrome(struct dma_chan *chan, 507476bd79SDan Williams const unsigned char *scfs, int disks, 517476bd79SDan Williams struct dmaengine_unmap_data *unmap, 527476bd79SDan Williams enum dma_ctrl_flags dma_flags, 53b2f46fd8SDan Williams struct async_submit_ctl *submit) 54b2f46fd8SDan Williams { 55b2f46fd8SDan Williams struct dma_async_tx_descriptor *tx = NULL; 56b2f46fd8SDan Williams struct dma_device *dma = chan->device; 57b2f46fd8SDan Williams enum async_tx_flags flags_orig = submit->flags; 58b2f46fd8SDan Williams dma_async_tx_callback cb_fn_orig = submit->cb_fn; 59b2f46fd8SDan Williams dma_async_tx_callback cb_param_orig = submit->cb_param; 60b2f46fd8SDan Williams int src_cnt = disks - 2; 61b2f46fd8SDan Williams unsigned short pq_src_cnt; 62b2f46fd8SDan Williams dma_addr_t dma_dest[2]; 63b2f46fd8SDan Williams int src_off = 0; 64b2f46fd8SDan Williams 657476bd79SDan Williams if (submit->flags & ASYNC_TX_FENCE) 667476bd79SDan Williams dma_flags |= DMA_PREP_FENCE; 67b2f46fd8SDan Williams 68b2f46fd8SDan Williams while (src_cnt > 0) { 69b2f46fd8SDan Williams submit->flags = flags_orig; 70b2f46fd8SDan Williams pq_src_cnt = min(src_cnt, dma_maxpq(dma, dma_flags)); 71b2f46fd8SDan Williams /* if we are submitting additional pqs, leave the chain open, 72b2f46fd8SDan Williams * clear the callback parameters, and leave the destination 73b2f46fd8SDan Williams * buffers mapped 74b2f46fd8SDan Williams */ 75b2f46fd8SDan Williams if (src_cnt > pq_src_cnt) { 76b2f46fd8SDan Williams submit->flags &= ~ASYNC_TX_ACK; 770403e382SDan Williams submit->flags |= ASYNC_TX_FENCE; 78b2f46fd8SDan Williams submit->cb_fn = NULL; 79b2f46fd8SDan Williams submit->cb_param = NULL; 80b2f46fd8SDan Williams } else { 81b2f46fd8SDan Williams submit->cb_fn = cb_fn_orig; 82b2f46fd8SDan Williams submit->cb_param = cb_param_orig; 83b2f46fd8SDan Williams if (cb_fn_orig) 84b2f46fd8SDan Williams dma_flags |= DMA_PREP_INTERRUPT; 85b2f46fd8SDan Williams } 86b2f46fd8SDan Williams 877476bd79SDan Williams /* Drivers force forward progress in case they can not provide 887476bd79SDan Williams * a descriptor 89b2f46fd8SDan Williams */ 90b2f46fd8SDan Williams for (;;) { 917476bd79SDan Williams dma_dest[0] = unmap->addr[disks - 2]; 927476bd79SDan Williams dma_dest[1] = unmap->addr[disks - 1]; 93b2f46fd8SDan Williams tx = dma->device_prep_dma_pq(chan, dma_dest, 947476bd79SDan Williams &unmap->addr[src_off], 95b2f46fd8SDan Williams pq_src_cnt, 967476bd79SDan Williams &scfs[src_off], unmap->len, 97b2f46fd8SDan Williams dma_flags); 98b2f46fd8SDan Williams if (likely(tx)) 99b2f46fd8SDan Williams break; 100b2f46fd8SDan Williams async_tx_quiesce(&submit->depend_tx); 101b2f46fd8SDan Williams dma_async_issue_pending(chan); 102b2f46fd8SDan Williams } 103b2f46fd8SDan Williams 1047476bd79SDan Williams dma_set_unmap(tx, unmap); 105b2f46fd8SDan Williams async_tx_submit(chan, tx, submit); 106b2f46fd8SDan Williams submit->depend_tx = tx; 107b2f46fd8SDan Williams 108b2f46fd8SDan Williams /* drop completed sources */ 109b2f46fd8SDan Williams src_cnt -= pq_src_cnt; 110b2f46fd8SDan Williams src_off += pq_src_cnt; 111b2f46fd8SDan Williams 112b2f46fd8SDan Williams dma_flags |= DMA_PREP_CONTINUE; 113b2f46fd8SDan Williams } 114b2f46fd8SDan Williams 115b2f46fd8SDan Williams return tx; 116b2f46fd8SDan Williams } 117b2f46fd8SDan Williams 118b2f46fd8SDan Williams /** 119b2f46fd8SDan Williams * do_sync_gen_syndrome - synchronously calculate a raid6 syndrome 120b2f46fd8SDan Williams */ 121b2f46fd8SDan Williams static void 122b2f46fd8SDan Williams do_sync_gen_syndrome(struct page **blocks, unsigned int offset, int disks, 123b2f46fd8SDan Williams size_t len, struct async_submit_ctl *submit) 124b2f46fd8SDan Williams { 125b2f46fd8SDan Williams void **srcs; 126b2f46fd8SDan Williams int i; 127584acdd4SMarkus Stockhausen int start = -1, stop = disks - 3; 128b2f46fd8SDan Williams 129b2f46fd8SDan Williams if (submit->scribble) 130b2f46fd8SDan Williams srcs = submit->scribble; 131b2f46fd8SDan Williams else 132b2f46fd8SDan Williams srcs = (void **) blocks; 133b2f46fd8SDan Williams 134b2f46fd8SDan Williams for (i = 0; i < disks; i++) { 1355dd33c9aSNeilBrown if (blocks[i] == NULL) { 136b2f46fd8SDan Williams BUG_ON(i > disks - 3); /* P or Q can't be zero */ 1375dd33c9aSNeilBrown srcs[i] = (void*)raid6_empty_zero_page; 138584acdd4SMarkus Stockhausen } else { 139b2f46fd8SDan Williams srcs[i] = page_address(blocks[i]) + offset; 140584acdd4SMarkus Stockhausen if (i < disks - 2) { 141584acdd4SMarkus Stockhausen stop = i; 142584acdd4SMarkus Stockhausen if (start == -1) 143584acdd4SMarkus Stockhausen start = i; 144b2f46fd8SDan Williams } 145584acdd4SMarkus Stockhausen } 146584acdd4SMarkus Stockhausen } 147584acdd4SMarkus Stockhausen if (submit->flags & ASYNC_TX_PQ_XOR_DST) { 148584acdd4SMarkus Stockhausen BUG_ON(!raid6_call.xor_syndrome); 149584acdd4SMarkus Stockhausen if (start >= 0) 150584acdd4SMarkus Stockhausen raid6_call.xor_syndrome(disks, start, stop, len, srcs); 151584acdd4SMarkus Stockhausen } else 152b2f46fd8SDan Williams raid6_call.gen_syndrome(disks, len, srcs); 153b2f46fd8SDan Williams async_tx_sync_epilog(submit); 154b2f46fd8SDan Williams } 155b2f46fd8SDan Williams 156b2f46fd8SDan Williams /** 157b2f46fd8SDan Williams * async_gen_syndrome - asynchronously calculate a raid6 syndrome 158b2f46fd8SDan Williams * @blocks: source blocks from idx 0..disks-3, P @ disks-2 and Q @ disks-1 159b2f46fd8SDan Williams * @offset: common offset into each block (src and dest) to start transaction 160b2f46fd8SDan Williams * @disks: number of blocks (including missing P or Q, see below) 161b2f46fd8SDan Williams * @len: length of operation in bytes 162b2f46fd8SDan Williams * @submit: submission/completion modifiers 163b2f46fd8SDan Williams * 164b2f46fd8SDan Williams * General note: This routine assumes a field of GF(2^8) with a 165b2f46fd8SDan Williams * primitive polynomial of 0x11d and a generator of {02}. 166b2f46fd8SDan Williams * 167b2f46fd8SDan Williams * 'disks' note: callers can optionally omit either P or Q (but not 168b2f46fd8SDan Williams * both) from the calculation by setting blocks[disks-2] or 169b2f46fd8SDan Williams * blocks[disks-1] to NULL. When P or Q is omitted 'len' must be <= 170b2f46fd8SDan Williams * PAGE_SIZE as a temporary buffer of this size is used in the 171b2f46fd8SDan Williams * synchronous path. 'disks' always accounts for both destination 1725676470fSDan Williams * buffers. If any source buffers (blocks[i] where i < disks - 2) are 1735676470fSDan Williams * set to NULL those buffers will be replaced with the raid6_zero_page 1745676470fSDan Williams * in the synchronous path and omitted in the hardware-asynchronous 1755676470fSDan Williams * path. 176b2f46fd8SDan Williams */ 177b2f46fd8SDan Williams struct dma_async_tx_descriptor * 178b2f46fd8SDan Williams async_gen_syndrome(struct page **blocks, unsigned int offset, int disks, 179b2f46fd8SDan Williams size_t len, struct async_submit_ctl *submit) 180b2f46fd8SDan Williams { 181b2f46fd8SDan Williams int src_cnt = disks - 2; 182b2f46fd8SDan Williams struct dma_chan *chan = async_tx_find_channel(submit, DMA_PQ, 183b2f46fd8SDan Williams &P(blocks, disks), 2, 184b2f46fd8SDan Williams blocks, src_cnt, len); 185b2f46fd8SDan Williams struct dma_device *device = chan ? chan->device : NULL; 1867476bd79SDan Williams struct dmaengine_unmap_data *unmap = NULL; 187b2f46fd8SDan Williams 188b2f46fd8SDan Williams BUG_ON(disks > 255 || !(P(blocks, disks) || Q(blocks, disks))); 189b2f46fd8SDan Williams 1907476bd79SDan Williams if (device) 191b02bab6bSNeilBrown unmap = dmaengine_get_unmap_data(device->dev, disks, GFP_NOWAIT); 192b2f46fd8SDan Williams 193584acdd4SMarkus Stockhausen /* XORing P/Q is only implemented in software */ 194584acdd4SMarkus Stockhausen if (unmap && !(submit->flags & ASYNC_TX_PQ_XOR_DST) && 195b2f46fd8SDan Williams (src_cnt <= dma_maxpq(device, 0) || 19683544ae9SDan Williams dma_maxpq(device, DMA_PREP_CONTINUE) > 0) && 19783544ae9SDan Williams is_dma_pq_aligned(device, offset, 0, len)) { 1987476bd79SDan Williams struct dma_async_tx_descriptor *tx; 1997476bd79SDan Williams enum dma_ctrl_flags dma_flags = 0; 2007476bd79SDan Williams unsigned char coefs[src_cnt]; 2017476bd79SDan Williams int i, j; 2027476bd79SDan Williams 203b2f46fd8SDan Williams /* run the p+q asynchronously */ 204b2f46fd8SDan Williams pr_debug("%s: (async) disks: %d len: %zu\n", 205b2f46fd8SDan Williams __func__, disks, len); 2067476bd79SDan Williams 2077476bd79SDan Williams /* convert source addresses being careful to collapse 'empty' 2087476bd79SDan Williams * sources and update the coefficients accordingly 2097476bd79SDan Williams */ 2107476bd79SDan Williams unmap->len = len; 2117476bd79SDan Williams for (i = 0, j = 0; i < src_cnt; i++) { 2127476bd79SDan Williams if (blocks[i] == NULL) 2137476bd79SDan Williams continue; 2147476bd79SDan Williams unmap->addr[j] = dma_map_page(device->dev, blocks[i], offset, 2157476bd79SDan Williams len, DMA_TO_DEVICE); 2167476bd79SDan Williams coefs[j] = raid6_gfexp[i]; 2177476bd79SDan Williams unmap->to_cnt++; 2187476bd79SDan Williams j++; 219b2f46fd8SDan Williams } 220b2f46fd8SDan Williams 2217476bd79SDan Williams /* 2227476bd79SDan Williams * DMAs use destinations as sources, 2237476bd79SDan Williams * so use BIDIRECTIONAL mapping 2247476bd79SDan Williams */ 2257476bd79SDan Williams unmap->bidi_cnt++; 2267476bd79SDan Williams if (P(blocks, disks)) 2277476bd79SDan Williams unmap->addr[j++] = dma_map_page(device->dev, P(blocks, disks), 2287476bd79SDan Williams offset, len, DMA_BIDIRECTIONAL); 2297476bd79SDan Williams else { 2307476bd79SDan Williams unmap->addr[j++] = 0; 2317476bd79SDan Williams dma_flags |= DMA_PREP_PQ_DISABLE_P; 2327476bd79SDan Williams } 2337476bd79SDan Williams 2347476bd79SDan Williams unmap->bidi_cnt++; 2357476bd79SDan Williams if (Q(blocks, disks)) 2367476bd79SDan Williams unmap->addr[j++] = dma_map_page(device->dev, Q(blocks, disks), 2377476bd79SDan Williams offset, len, DMA_BIDIRECTIONAL); 2387476bd79SDan Williams else { 2397476bd79SDan Williams unmap->addr[j++] = 0; 2407476bd79SDan Williams dma_flags |= DMA_PREP_PQ_DISABLE_Q; 2417476bd79SDan Williams } 2427476bd79SDan Williams 2437476bd79SDan Williams tx = do_async_gen_syndrome(chan, coefs, j, unmap, dma_flags, submit); 2447476bd79SDan Williams dmaengine_unmap_put(unmap); 2457476bd79SDan Williams return tx; 2467476bd79SDan Williams } 2477476bd79SDan Williams 2487476bd79SDan Williams dmaengine_unmap_put(unmap); 2497476bd79SDan Williams 250b2f46fd8SDan Williams /* run the pq synchronously */ 251b2f46fd8SDan Williams pr_debug("%s: (sync) disks: %d len: %zu\n", __func__, disks, len); 252b2f46fd8SDan Williams 253b2f46fd8SDan Williams /* wait for any prerequisite operations */ 254b2f46fd8SDan Williams async_tx_quiesce(&submit->depend_tx); 255b2f46fd8SDan Williams 256b2f46fd8SDan Williams if (!P(blocks, disks)) { 257030b0772SDan Williams P(blocks, disks) = pq_scribble_page; 258b2f46fd8SDan Williams BUG_ON(len + offset > PAGE_SIZE); 259b2f46fd8SDan Williams } 260b2f46fd8SDan Williams if (!Q(blocks, disks)) { 261030b0772SDan Williams Q(blocks, disks) = pq_scribble_page; 262b2f46fd8SDan Williams BUG_ON(len + offset > PAGE_SIZE); 263b2f46fd8SDan Williams } 264b2f46fd8SDan Williams do_sync_gen_syndrome(blocks, offset, disks, len, submit); 265b2f46fd8SDan Williams 266b2f46fd8SDan Williams return NULL; 267b2f46fd8SDan Williams } 268b2f46fd8SDan Williams EXPORT_SYMBOL_GPL(async_gen_syndrome); 269b2f46fd8SDan Williams 2707b3cc2b1SDan Williams static inline struct dma_chan * 2717b3cc2b1SDan Williams pq_val_chan(struct async_submit_ctl *submit, struct page **blocks, int disks, size_t len) 2727b3cc2b1SDan Williams { 2737b3cc2b1SDan Williams #ifdef CONFIG_ASYNC_TX_DISABLE_PQ_VAL_DMA 2747b3cc2b1SDan Williams return NULL; 2757b3cc2b1SDan Williams #endif 2767b3cc2b1SDan Williams return async_tx_find_channel(submit, DMA_PQ_VAL, NULL, 0, blocks, 2777b3cc2b1SDan Williams disks, len); 2787b3cc2b1SDan Williams } 2797b3cc2b1SDan Williams 280b2f46fd8SDan Williams /** 281b2f46fd8SDan Williams * async_syndrome_val - asynchronously validate a raid6 syndrome 282b2f46fd8SDan Williams * @blocks: source blocks from idx 0..disks-3, P @ disks-2 and Q @ disks-1 283b2f46fd8SDan Williams * @offset: common offset into each block (src and dest) to start transaction 284b2f46fd8SDan Williams * @disks: number of blocks (including missing P or Q, see below) 285b2f46fd8SDan Williams * @len: length of operation in bytes 286b2f46fd8SDan Williams * @pqres: on val failure SUM_CHECK_P_RESULT and/or SUM_CHECK_Q_RESULT are set 287b2f46fd8SDan Williams * @spare: temporary result buffer for the synchronous case 288b2f46fd8SDan Williams * @submit: submission / completion modifiers 289b2f46fd8SDan Williams * 290b2f46fd8SDan Williams * The same notes from async_gen_syndrome apply to the 'blocks', 291b2f46fd8SDan Williams * and 'disks' parameters of this routine. The synchronous path 292b2f46fd8SDan Williams * requires a temporary result buffer and submit->scribble to be 293b2f46fd8SDan Williams * specified. 294b2f46fd8SDan Williams */ 295b2f46fd8SDan Williams struct dma_async_tx_descriptor * 296b2f46fd8SDan Williams async_syndrome_val(struct page **blocks, unsigned int offset, int disks, 297b2f46fd8SDan Williams size_t len, enum sum_check_flags *pqres, struct page *spare, 298b2f46fd8SDan Williams struct async_submit_ctl *submit) 299b2f46fd8SDan Williams { 3007b3cc2b1SDan Williams struct dma_chan *chan = pq_val_chan(submit, blocks, disks, len); 301b2f46fd8SDan Williams struct dma_device *device = chan ? chan->device : NULL; 302b2f46fd8SDan Williams struct dma_async_tx_descriptor *tx; 303b2141e69SNeilBrown unsigned char coefs[disks-2]; 304b2f46fd8SDan Williams enum dma_ctrl_flags dma_flags = submit->cb_fn ? DMA_PREP_INTERRUPT : 0; 3051786b943SDan Williams struct dmaengine_unmap_data *unmap = NULL; 306b2f46fd8SDan Williams 307b2f46fd8SDan Williams BUG_ON(disks < 4); 308b2f46fd8SDan Williams 3091786b943SDan Williams if (device) 310b02bab6bSNeilBrown unmap = dmaengine_get_unmap_data(device->dev, disks, GFP_NOWAIT); 311b2f46fd8SDan Williams 3121786b943SDan Williams if (unmap && disks <= dma_maxpq(device, 0) && 31383544ae9SDan Williams is_dma_pq_aligned(device, offset, 0, len)) { 314b2f46fd8SDan Williams struct device *dev = device->dev; 3151786b943SDan Williams dma_addr_t pq[2]; 3161786b943SDan Williams int i, j = 0, src_cnt = 0; 317b2f46fd8SDan Williams 318b2f46fd8SDan Williams pr_debug("%s: (async) disks: %d len: %zu\n", 319b2f46fd8SDan Williams __func__, disks, len); 3201786b943SDan Williams 3211786b943SDan Williams unmap->len = len; 3221786b943SDan Williams for (i = 0; i < disks-2; i++) 3231786b943SDan Williams if (likely(blocks[i])) { 3241786b943SDan Williams unmap->addr[j] = dma_map_page(dev, blocks[i], 3251786b943SDan Williams offset, len, 3261786b943SDan Williams DMA_TO_DEVICE); 3271786b943SDan Williams coefs[j] = raid6_gfexp[i]; 3281786b943SDan Williams unmap->to_cnt++; 3291786b943SDan Williams src_cnt++; 3301786b943SDan Williams j++; 3311786b943SDan Williams } 3321786b943SDan Williams 3331786b943SDan Williams if (!P(blocks, disks)) { 3341786b943SDan Williams pq[0] = 0; 335b2f46fd8SDan Williams dma_flags |= DMA_PREP_PQ_DISABLE_P; 3361786b943SDan Williams } else { 337b2141e69SNeilBrown pq[0] = dma_map_page(dev, P(blocks, disks), 338b2141e69SNeilBrown offset, len, 339b2141e69SNeilBrown DMA_TO_DEVICE); 3401786b943SDan Williams unmap->addr[j++] = pq[0]; 3411786b943SDan Williams unmap->to_cnt++; 3421786b943SDan Williams } 3431786b943SDan Williams if (!Q(blocks, disks)) { 3441786b943SDan Williams pq[1] = 0; 345b2f46fd8SDan Williams dma_flags |= DMA_PREP_PQ_DISABLE_Q; 3461786b943SDan Williams } else { 347b2141e69SNeilBrown pq[1] = dma_map_page(dev, Q(blocks, disks), 348b2141e69SNeilBrown offset, len, 349b2141e69SNeilBrown DMA_TO_DEVICE); 3501786b943SDan Williams unmap->addr[j++] = pq[1]; 3511786b943SDan Williams unmap->to_cnt++; 3521786b943SDan Williams } 353b2141e69SNeilBrown 3540403e382SDan Williams if (submit->flags & ASYNC_TX_FENCE) 3550403e382SDan Williams dma_flags |= DMA_PREP_FENCE; 356b2f46fd8SDan Williams for (;;) { 3571786b943SDan Williams tx = device->device_prep_dma_pq_val(chan, pq, 3581786b943SDan Williams unmap->addr, 359b2141e69SNeilBrown src_cnt, 360b2141e69SNeilBrown coefs, 361b2f46fd8SDan Williams len, pqres, 362b2f46fd8SDan Williams dma_flags); 363b2f46fd8SDan Williams if (likely(tx)) 364b2f46fd8SDan Williams break; 365b2f46fd8SDan Williams async_tx_quiesce(&submit->depend_tx); 366b2f46fd8SDan Williams dma_async_issue_pending(chan); 367b2f46fd8SDan Williams } 3681786b943SDan Williams 3691786b943SDan Williams dma_set_unmap(tx, unmap); 370b2f46fd8SDan Williams async_tx_submit(chan, tx, submit); 371b2f46fd8SDan Williams 372b2f46fd8SDan Williams return tx; 373b2f46fd8SDan Williams } else { 374b2f46fd8SDan Williams struct page *p_src = P(blocks, disks); 375b2f46fd8SDan Williams struct page *q_src = Q(blocks, disks); 376b2f46fd8SDan Williams enum async_tx_flags flags_orig = submit->flags; 377b2f46fd8SDan Williams dma_async_tx_callback cb_fn_orig = submit->cb_fn; 378b2f46fd8SDan Williams void *scribble = submit->scribble; 379b2f46fd8SDan Williams void *cb_param_orig = submit->cb_param; 380b2f46fd8SDan Williams void *p, *q, *s; 381b2f46fd8SDan Williams 382b2f46fd8SDan Williams pr_debug("%s: (sync) disks: %d len: %zu\n", 383b2f46fd8SDan Williams __func__, disks, len); 384b2f46fd8SDan Williams 385b2f46fd8SDan Williams /* caller must provide a temporary result buffer and 386b2f46fd8SDan Williams * allow the input parameters to be preserved 387b2f46fd8SDan Williams */ 388b2f46fd8SDan Williams BUG_ON(!spare || !scribble); 389b2f46fd8SDan Williams 390b2f46fd8SDan Williams /* wait for any prerequisite operations */ 391b2f46fd8SDan Williams async_tx_quiesce(&submit->depend_tx); 392b2f46fd8SDan Williams 393b2f46fd8SDan Williams /* recompute p and/or q into the temporary buffer and then 394b2f46fd8SDan Williams * check to see the result matches the current value 395b2f46fd8SDan Williams */ 396b2f46fd8SDan Williams tx = NULL; 397b2f46fd8SDan Williams *pqres = 0; 398b2f46fd8SDan Williams if (p_src) { 399b2f46fd8SDan Williams init_async_submit(submit, ASYNC_TX_XOR_ZERO_DST, NULL, 400b2f46fd8SDan Williams NULL, NULL, scribble); 401b2f46fd8SDan Williams tx = async_xor(spare, blocks, offset, disks-2, len, submit); 402b2f46fd8SDan Williams async_tx_quiesce(&tx); 403b2f46fd8SDan Williams p = page_address(p_src) + offset; 404b2f46fd8SDan Williams s = page_address(spare) + offset; 405b2f46fd8SDan Williams *pqres |= !!memcmp(p, s, len) << SUM_CHECK_P; 406b2f46fd8SDan Williams } 407b2f46fd8SDan Williams 408b2f46fd8SDan Williams if (q_src) { 409b2f46fd8SDan Williams P(blocks, disks) = NULL; 410b2f46fd8SDan Williams Q(blocks, disks) = spare; 411b2f46fd8SDan Williams init_async_submit(submit, 0, NULL, NULL, NULL, scribble); 412b2f46fd8SDan Williams tx = async_gen_syndrome(blocks, offset, disks, len, submit); 413b2f46fd8SDan Williams async_tx_quiesce(&tx); 414b2f46fd8SDan Williams q = page_address(q_src) + offset; 415b2f46fd8SDan Williams s = page_address(spare) + offset; 416b2f46fd8SDan Williams *pqres |= !!memcmp(q, s, len) << SUM_CHECK_Q; 417b2f46fd8SDan Williams } 418b2f46fd8SDan Williams 419b2f46fd8SDan Williams /* restore P, Q and submit */ 420b2f46fd8SDan Williams P(blocks, disks) = p_src; 421b2f46fd8SDan Williams Q(blocks, disks) = q_src; 422b2f46fd8SDan Williams 423b2f46fd8SDan Williams submit->cb_fn = cb_fn_orig; 424b2f46fd8SDan Williams submit->cb_param = cb_param_orig; 425b2f46fd8SDan Williams submit->flags = flags_orig; 426b2f46fd8SDan Williams async_tx_sync_epilog(submit); 427b2f46fd8SDan Williams 428b2f46fd8SDan Williams return NULL; 429b2f46fd8SDan Williams } 430b2f46fd8SDan Williams } 431b2f46fd8SDan Williams EXPORT_SYMBOL_GPL(async_syndrome_val); 432b2f46fd8SDan Williams 433b2f46fd8SDan Williams static int __init async_pq_init(void) 434b2f46fd8SDan Williams { 435030b0772SDan Williams pq_scribble_page = alloc_page(GFP_KERNEL); 436b2f46fd8SDan Williams 437030b0772SDan Williams if (pq_scribble_page) 438b2f46fd8SDan Williams return 0; 439b2f46fd8SDan Williams 440b2f46fd8SDan Williams pr_err("%s: failed to allocate required spare page\n", __func__); 441b2f46fd8SDan Williams 442b2f46fd8SDan Williams return -ENOMEM; 443b2f46fd8SDan Williams } 444b2f46fd8SDan Williams 445b2f46fd8SDan Williams static void __exit async_pq_exit(void) 446b2f46fd8SDan Williams { 447*95813b8fSJoonsoo Kim __free_page(pq_scribble_page); 448b2f46fd8SDan Williams } 449b2f46fd8SDan Williams 450b2f46fd8SDan Williams module_init(async_pq_init); 451b2f46fd8SDan Williams module_exit(async_pq_exit); 452b2f46fd8SDan Williams 453b2f46fd8SDan Williams MODULE_DESCRIPTION("asynchronous raid6 syndrome generation/validation"); 454b2f46fd8SDan Williams MODULE_LICENSE("GPL"); 455