1 /* 2 * Xtensa SMP support functions. 3 * 4 * This file is subject to the terms and conditions of the GNU General Public 5 * License. See the file "COPYING" in the main directory of this archive 6 * for more details. 7 * 8 * Copyright (C) 2008 - 2013 Tensilica Inc. 9 * 10 * Chris Zankel <chris@zankel.net> 11 * Joe Taylor <joe@tensilica.com> 12 * Pete Delaney <piet@tensilica.com 13 */ 14 15 #include <linux/cpu.h> 16 #include <linux/cpumask.h> 17 #include <linux/delay.h> 18 #include <linux/init.h> 19 #include <linux/interrupt.h> 20 #include <linux/irqdomain.h> 21 #include <linux/irq.h> 22 #include <linux/kdebug.h> 23 #include <linux/module.h> 24 #include <linux/reboot.h> 25 #include <linux/seq_file.h> 26 #include <linux/smp.h> 27 #include <linux/thread_info.h> 28 29 #include <asm/cacheflush.h> 30 #include <asm/kdebug.h> 31 #include <asm/mmu_context.h> 32 #include <asm/mxregs.h> 33 #include <asm/platform.h> 34 #include <asm/tlbflush.h> 35 #include <asm/traps.h> 36 37 #ifdef CONFIG_SMP 38 # if XCHAL_HAVE_S32C1I == 0 39 # error "The S32C1I option is required for SMP." 40 # endif 41 #endif 42 43 static void system_invalidate_dcache_range(unsigned long start, 44 unsigned long size); 45 static void system_flush_invalidate_dcache_range(unsigned long start, 46 unsigned long size); 47 48 /* IPI (Inter Process Interrupt) */ 49 50 #define IPI_IRQ 0 51 52 static irqreturn_t ipi_interrupt(int irq, void *dev_id); 53 static struct irqaction ipi_irqaction = { 54 .handler = ipi_interrupt, 55 .flags = IRQF_PERCPU, 56 .name = "ipi", 57 }; 58 59 void ipi_init(void) 60 { 61 unsigned irq = irq_create_mapping(NULL, IPI_IRQ); 62 setup_irq(irq, &ipi_irqaction); 63 } 64 65 static inline unsigned int get_core_count(void) 66 { 67 /* Bits 18..21 of SYSCFGID contain the core count minus 1. */ 68 unsigned int syscfgid = get_er(SYSCFGID); 69 return ((syscfgid >> 18) & 0xf) + 1; 70 } 71 72 static inline int get_core_id(void) 73 { 74 /* Bits 0...18 of SYSCFGID contain the core id */ 75 unsigned int core_id = get_er(SYSCFGID); 76 return core_id & 0x3fff; 77 } 78 79 void __init smp_prepare_cpus(unsigned int max_cpus) 80 { 81 unsigned i; 82 83 for (i = 0; i < max_cpus; ++i) 84 set_cpu_present(i, true); 85 } 86 87 void __init smp_init_cpus(void) 88 { 89 unsigned i; 90 unsigned int ncpus = get_core_count(); 91 unsigned int core_id = get_core_id(); 92 93 pr_info("%s: Core Count = %d\n", __func__, ncpus); 94 pr_info("%s: Core Id = %d\n", __func__, core_id); 95 96 for (i = 0; i < ncpus; ++i) 97 set_cpu_possible(i, true); 98 } 99 100 void __init smp_prepare_boot_cpu(void) 101 { 102 unsigned int cpu = smp_processor_id(); 103 BUG_ON(cpu != 0); 104 cpu_asid_cache(cpu) = ASID_USER_FIRST; 105 } 106 107 void __init smp_cpus_done(unsigned int max_cpus) 108 { 109 } 110 111 static int boot_secondary_processors = 1; /* Set with xt-gdb via .xt-gdb */ 112 static DECLARE_COMPLETION(cpu_running); 113 114 void secondary_start_kernel(void) 115 { 116 struct mm_struct *mm = &init_mm; 117 unsigned int cpu = smp_processor_id(); 118 119 init_mmu(); 120 121 #ifdef CONFIG_DEBUG_KERNEL 122 if (boot_secondary_processors == 0) { 123 pr_debug("%s: boot_secondary_processors:%d; Hanging cpu:%d\n", 124 __func__, boot_secondary_processors, cpu); 125 for (;;) 126 __asm__ __volatile__ ("waiti " __stringify(LOCKLEVEL)); 127 } 128 129 pr_debug("%s: boot_secondary_processors:%d; Booting cpu:%d\n", 130 __func__, boot_secondary_processors, cpu); 131 #endif 132 /* Init EXCSAVE1 */ 133 134 secondary_trap_init(); 135 136 /* All kernel threads share the same mm context. */ 137 138 atomic_inc(&mm->mm_users); 139 atomic_inc(&mm->mm_count); 140 current->active_mm = mm; 141 cpumask_set_cpu(cpu, mm_cpumask(mm)); 142 enter_lazy_tlb(mm, current); 143 144 preempt_disable(); 145 trace_hardirqs_off(); 146 147 calibrate_delay(); 148 149 notify_cpu_starting(cpu); 150 151 secondary_init_irq(); 152 local_timer_setup(cpu); 153 154 local_irq_enable(); 155 156 set_cpu_online(cpu, true); 157 complete(&cpu_running); 158 159 cpu_startup_entry(CPUHP_ONLINE); 160 } 161 162 static void mx_cpu_start(void *p) 163 { 164 unsigned cpu = (unsigned)p; 165 unsigned long run_stall_mask = get_er(MPSCORE); 166 167 set_er(run_stall_mask & ~(1u << cpu), MPSCORE); 168 pr_debug("%s: cpu: %d, run_stall_mask: %lx ---> %lx\n", 169 __func__, cpu, run_stall_mask, get_er(MPSCORE)); 170 } 171 172 static void mx_cpu_stop(void *p) 173 { 174 unsigned cpu = (unsigned)p; 175 unsigned long run_stall_mask = get_er(MPSCORE); 176 177 set_er(run_stall_mask | (1u << cpu), MPSCORE); 178 pr_debug("%s: cpu: %d, run_stall_mask: %lx ---> %lx\n", 179 __func__, cpu, run_stall_mask, get_er(MPSCORE)); 180 } 181 182 #ifdef CONFIG_HOTPLUG_CPU 183 unsigned long cpu_start_id __cacheline_aligned; 184 #endif 185 unsigned long cpu_start_ccount; 186 187 static int boot_secondary(unsigned int cpu, struct task_struct *ts) 188 { 189 unsigned long timeout = jiffies + msecs_to_jiffies(1000); 190 unsigned long ccount; 191 int i; 192 193 #ifdef CONFIG_HOTPLUG_CPU 194 cpu_start_id = cpu; 195 system_flush_invalidate_dcache_range( 196 (unsigned long)&cpu_start_id, sizeof(cpu_start_id)); 197 #endif 198 smp_call_function_single(0, mx_cpu_start, (void *)cpu, 1); 199 200 for (i = 0; i < 2; ++i) { 201 do 202 ccount = get_ccount(); 203 while (!ccount); 204 205 cpu_start_ccount = ccount; 206 207 while (time_before(jiffies, timeout)) { 208 mb(); 209 if (!cpu_start_ccount) 210 break; 211 } 212 213 if (cpu_start_ccount) { 214 smp_call_function_single(0, mx_cpu_stop, 215 (void *)cpu, 1); 216 cpu_start_ccount = 0; 217 return -EIO; 218 } 219 } 220 return 0; 221 } 222 223 int __cpu_up(unsigned int cpu, struct task_struct *idle) 224 { 225 int ret = 0; 226 227 if (cpu_asid_cache(cpu) == 0) 228 cpu_asid_cache(cpu) = ASID_USER_FIRST; 229 230 start_info.stack = (unsigned long)task_pt_regs(idle); 231 wmb(); 232 233 pr_debug("%s: Calling wakeup_secondary(cpu:%d, idle:%p, sp: %08lx)\n", 234 __func__, cpu, idle, start_info.stack); 235 236 ret = boot_secondary(cpu, idle); 237 if (ret == 0) { 238 wait_for_completion_timeout(&cpu_running, 239 msecs_to_jiffies(1000)); 240 if (!cpu_online(cpu)) 241 ret = -EIO; 242 } 243 244 if (ret) 245 pr_err("CPU %u failed to boot\n", cpu); 246 247 return ret; 248 } 249 250 #ifdef CONFIG_HOTPLUG_CPU 251 252 /* 253 * __cpu_disable runs on the processor to be shutdown. 254 */ 255 int __cpu_disable(void) 256 { 257 unsigned int cpu = smp_processor_id(); 258 259 /* 260 * Take this CPU offline. Once we clear this, we can't return, 261 * and we must not schedule until we're ready to give up the cpu. 262 */ 263 set_cpu_online(cpu, false); 264 265 /* 266 * OK - migrate IRQs away from this CPU 267 */ 268 migrate_irqs(); 269 270 /* 271 * Flush user cache and TLB mappings, and then remove this CPU 272 * from the vm mask set of all processes. 273 */ 274 local_flush_cache_all(); 275 local_flush_tlb_all(); 276 invalidate_page_directory(); 277 278 clear_tasks_mm_cpumask(cpu); 279 280 return 0; 281 } 282 283 static void platform_cpu_kill(unsigned int cpu) 284 { 285 smp_call_function_single(0, mx_cpu_stop, (void *)cpu, true); 286 } 287 288 /* 289 * called on the thread which is asking for a CPU to be shutdown - 290 * waits until shutdown has completed, or it is timed out. 291 */ 292 void __cpu_die(unsigned int cpu) 293 { 294 unsigned long timeout = jiffies + msecs_to_jiffies(1000); 295 while (time_before(jiffies, timeout)) { 296 system_invalidate_dcache_range((unsigned long)&cpu_start_id, 297 sizeof(cpu_start_id)); 298 if (cpu_start_id == -cpu) { 299 platform_cpu_kill(cpu); 300 return; 301 } 302 } 303 pr_err("CPU%u: unable to kill\n", cpu); 304 } 305 306 void arch_cpu_idle_dead(void) 307 { 308 cpu_die(); 309 } 310 /* 311 * Called from the idle thread for the CPU which has been shutdown. 312 * 313 * Note that we disable IRQs here, but do not re-enable them 314 * before returning to the caller. This is also the behaviour 315 * of the other hotplug-cpu capable cores, so presumably coming 316 * out of idle fixes this. 317 */ 318 void __ref cpu_die(void) 319 { 320 idle_task_exit(); 321 local_irq_disable(); 322 __asm__ __volatile__( 323 " movi a2, cpu_restart\n" 324 " jx a2\n"); 325 } 326 327 #endif /* CONFIG_HOTPLUG_CPU */ 328 329 enum ipi_msg_type { 330 IPI_RESCHEDULE = 0, 331 IPI_CALL_FUNC, 332 IPI_CPU_STOP, 333 IPI_MAX 334 }; 335 336 static const struct { 337 const char *short_text; 338 const char *long_text; 339 } ipi_text[] = { 340 { .short_text = "RES", .long_text = "Rescheduling interrupts" }, 341 { .short_text = "CAL", .long_text = "Function call interrupts" }, 342 { .short_text = "DIE", .long_text = "CPU shutdown interrupts" }, 343 }; 344 345 struct ipi_data { 346 unsigned long ipi_count[IPI_MAX]; 347 }; 348 349 static DEFINE_PER_CPU(struct ipi_data, ipi_data); 350 351 static void send_ipi_message(const struct cpumask *callmask, 352 enum ipi_msg_type msg_id) 353 { 354 int index; 355 unsigned long mask = 0; 356 357 for_each_cpu(index, callmask) 358 if (index != smp_processor_id()) 359 mask |= 1 << index; 360 361 set_er(mask, MIPISET(msg_id)); 362 } 363 364 void arch_send_call_function_ipi_mask(const struct cpumask *mask) 365 { 366 send_ipi_message(mask, IPI_CALL_FUNC); 367 } 368 369 void arch_send_call_function_single_ipi(int cpu) 370 { 371 send_ipi_message(cpumask_of(cpu), IPI_CALL_FUNC); 372 } 373 374 void smp_send_reschedule(int cpu) 375 { 376 send_ipi_message(cpumask_of(cpu), IPI_RESCHEDULE); 377 } 378 379 void smp_send_stop(void) 380 { 381 struct cpumask targets; 382 383 cpumask_copy(&targets, cpu_online_mask); 384 cpumask_clear_cpu(smp_processor_id(), &targets); 385 send_ipi_message(&targets, IPI_CPU_STOP); 386 } 387 388 static void ipi_cpu_stop(unsigned int cpu) 389 { 390 set_cpu_online(cpu, false); 391 machine_halt(); 392 } 393 394 irqreturn_t ipi_interrupt(int irq, void *dev_id) 395 { 396 unsigned int cpu = smp_processor_id(); 397 struct ipi_data *ipi = &per_cpu(ipi_data, cpu); 398 unsigned int msg; 399 unsigned i; 400 401 msg = get_er(MIPICAUSE(cpu)); 402 for (i = 0; i < IPI_MAX; i++) 403 if (msg & (1 << i)) { 404 set_er(1 << i, MIPICAUSE(cpu)); 405 ++ipi->ipi_count[i]; 406 } 407 408 if (msg & (1 << IPI_RESCHEDULE)) 409 scheduler_ipi(); 410 if (msg & (1 << IPI_CALL_FUNC)) 411 generic_smp_call_function_interrupt(); 412 if (msg & (1 << IPI_CPU_STOP)) 413 ipi_cpu_stop(cpu); 414 415 return IRQ_HANDLED; 416 } 417 418 void show_ipi_list(struct seq_file *p, int prec) 419 { 420 unsigned int cpu; 421 unsigned i; 422 423 for (i = 0; i < IPI_MAX; ++i) { 424 seq_printf(p, "%*s:", prec, ipi_text[i].short_text); 425 for_each_online_cpu(cpu) 426 seq_printf(p, " %10lu", 427 per_cpu(ipi_data, cpu).ipi_count[i]); 428 seq_printf(p, " %s\n", ipi_text[i].long_text); 429 } 430 } 431 432 int setup_profiling_timer(unsigned int multiplier) 433 { 434 pr_debug("setup_profiling_timer %d\n", multiplier); 435 return 0; 436 } 437 438 /* TLB flush functions */ 439 440 struct flush_data { 441 struct vm_area_struct *vma; 442 unsigned long addr1; 443 unsigned long addr2; 444 }; 445 446 static void ipi_flush_tlb_all(void *arg) 447 { 448 local_flush_tlb_all(); 449 } 450 451 void flush_tlb_all(void) 452 { 453 on_each_cpu(ipi_flush_tlb_all, NULL, 1); 454 } 455 456 static void ipi_flush_tlb_mm(void *arg) 457 { 458 local_flush_tlb_mm(arg); 459 } 460 461 void flush_tlb_mm(struct mm_struct *mm) 462 { 463 on_each_cpu(ipi_flush_tlb_mm, mm, 1); 464 } 465 466 static void ipi_flush_tlb_page(void *arg) 467 { 468 struct flush_data *fd = arg; 469 local_flush_tlb_page(fd->vma, fd->addr1); 470 } 471 472 void flush_tlb_page(struct vm_area_struct *vma, unsigned long addr) 473 { 474 struct flush_data fd = { 475 .vma = vma, 476 .addr1 = addr, 477 }; 478 on_each_cpu(ipi_flush_tlb_page, &fd, 1); 479 } 480 481 static void ipi_flush_tlb_range(void *arg) 482 { 483 struct flush_data *fd = arg; 484 local_flush_tlb_range(fd->vma, fd->addr1, fd->addr2); 485 } 486 487 void flush_tlb_range(struct vm_area_struct *vma, 488 unsigned long start, unsigned long end) 489 { 490 struct flush_data fd = { 491 .vma = vma, 492 .addr1 = start, 493 .addr2 = end, 494 }; 495 on_each_cpu(ipi_flush_tlb_range, &fd, 1); 496 } 497 498 /* Cache flush functions */ 499 500 static void ipi_flush_cache_all(void *arg) 501 { 502 local_flush_cache_all(); 503 } 504 505 void flush_cache_all(void) 506 { 507 on_each_cpu(ipi_flush_cache_all, NULL, 1); 508 } 509 510 static void ipi_flush_cache_page(void *arg) 511 { 512 struct flush_data *fd = arg; 513 local_flush_cache_page(fd->vma, fd->addr1, fd->addr2); 514 } 515 516 void flush_cache_page(struct vm_area_struct *vma, 517 unsigned long address, unsigned long pfn) 518 { 519 struct flush_data fd = { 520 .vma = vma, 521 .addr1 = address, 522 .addr2 = pfn, 523 }; 524 on_each_cpu(ipi_flush_cache_page, &fd, 1); 525 } 526 527 static void ipi_flush_cache_range(void *arg) 528 { 529 struct flush_data *fd = arg; 530 local_flush_cache_range(fd->vma, fd->addr1, fd->addr2); 531 } 532 533 void flush_cache_range(struct vm_area_struct *vma, 534 unsigned long start, unsigned long end) 535 { 536 struct flush_data fd = { 537 .vma = vma, 538 .addr1 = start, 539 .addr2 = end, 540 }; 541 on_each_cpu(ipi_flush_cache_range, &fd, 1); 542 } 543 544 static void ipi_flush_icache_range(void *arg) 545 { 546 struct flush_data *fd = arg; 547 local_flush_icache_range(fd->addr1, fd->addr2); 548 } 549 550 void flush_icache_range(unsigned long start, unsigned long end) 551 { 552 struct flush_data fd = { 553 .addr1 = start, 554 .addr2 = end, 555 }; 556 on_each_cpu(ipi_flush_icache_range, &fd, 1); 557 } 558 559 /* ------------------------------------------------------------------------- */ 560 561 static void ipi_invalidate_dcache_range(void *arg) 562 { 563 struct flush_data *fd = arg; 564 __invalidate_dcache_range(fd->addr1, fd->addr2); 565 } 566 567 static void system_invalidate_dcache_range(unsigned long start, 568 unsigned long size) 569 { 570 struct flush_data fd = { 571 .addr1 = start, 572 .addr2 = size, 573 }; 574 on_each_cpu(ipi_invalidate_dcache_range, &fd, 1); 575 } 576 577 static void ipi_flush_invalidate_dcache_range(void *arg) 578 { 579 struct flush_data *fd = arg; 580 __flush_invalidate_dcache_range(fd->addr1, fd->addr2); 581 } 582 583 static void system_flush_invalidate_dcache_range(unsigned long start, 584 unsigned long size) 585 { 586 struct flush_data fd = { 587 .addr1 = start, 588 .addr2 = size, 589 }; 590 on_each_cpu(ipi_flush_invalidate_dcache_range, &fd, 1); 591 } 592