1 /* 2 * arch/xtensa/kernel/setup.c 3 * 4 * This file is subject to the terms and conditions of the GNU General Public 5 * License. See the file "COPYING" in the main directory of this archive 6 * for more details. 7 * 8 * Copyright (C) 1995 Linus Torvalds 9 * Copyright (C) 2001 - 2005 Tensilica Inc. 10 * 11 * Chris Zankel <chris@zankel.net> 12 * Joe Taylor <joe@tensilica.com, joetylr@yahoo.com> 13 * Kevin Chea 14 * Marc Gauthier<marc@tensilica.com> <marc@alumni.uwaterloo.ca> 15 */ 16 17 #include <linux/errno.h> 18 #include <linux/init.h> 19 #include <linux/mm.h> 20 #include <linux/proc_fs.h> 21 #include <linux/screen_info.h> 22 #include <linux/bootmem.h> 23 #include <linux/kernel.h> 24 25 #if defined(CONFIG_VGA_CONSOLE) || defined(CONFIG_DUMMY_CONSOLE) 26 # include <linux/console.h> 27 #endif 28 29 #ifdef CONFIG_RTC 30 # include <linux/timex.h> 31 #endif 32 33 #ifdef CONFIG_PROC_FS 34 # include <linux/seq_file.h> 35 #endif 36 37 #include <asm/system.h> 38 #include <asm/bootparam.h> 39 #include <asm/pgtable.h> 40 #include <asm/processor.h> 41 #include <asm/timex.h> 42 #include <asm/platform.h> 43 #include <asm/page.h> 44 #include <asm/setup.h> 45 #include <asm/param.h> 46 47 #include <platform/hardware.h> 48 49 #if defined(CONFIG_VGA_CONSOLE) || defined(CONFIG_DUMMY_CONSOLE) 50 struct screen_info screen_info = { 0, 24, 0, 0, 0, 80, 0, 0, 0, 24, 1, 16}; 51 #endif 52 53 #ifdef CONFIG_BLK_DEV_FD 54 extern struct fd_ops no_fd_ops; 55 struct fd_ops *fd_ops; 56 #endif 57 58 extern struct rtc_ops no_rtc_ops; 59 struct rtc_ops *rtc_ops; 60 61 #ifdef CONFIG_BLK_DEV_INITRD 62 extern void *initrd_start; 63 extern void *initrd_end; 64 extern void *__initrd_start; 65 extern void *__initrd_end; 66 int initrd_is_mapped = 0; 67 extern int initrd_below_start_ok; 68 #endif 69 70 unsigned char aux_device_present; 71 extern unsigned long loops_per_jiffy; 72 73 /* Command line specified as configuration option. */ 74 75 static char __initdata command_line[COMMAND_LINE_SIZE]; 76 77 #ifdef CONFIG_CMDLINE_BOOL 78 static char default_command_line[COMMAND_LINE_SIZE] __initdata = CONFIG_CMDLINE; 79 #endif 80 81 sysmem_info_t __initdata sysmem; 82 83 #ifdef CONFIG_BLK_DEV_INITRD 84 int initrd_is_mapped; 85 #endif 86 87 extern void init_mmu(void); 88 89 /* 90 * Boot parameter parsing. 91 * 92 * The Xtensa port uses a list of variable-sized tags to pass data to 93 * the kernel. The first tag must be a BP_TAG_FIRST tag for the list 94 * to be recognised. The list is terminated with a zero-sized 95 * BP_TAG_LAST tag. 96 */ 97 98 typedef struct tagtable { 99 u32 tag; 100 int (*parse)(const bp_tag_t*); 101 } tagtable_t; 102 103 #define __tagtable(tag, fn) static tagtable_t __tagtable_##fn \ 104 __attribute__((unused, __section__(".taglist"))) = { tag, fn } 105 106 /* parse current tag */ 107 108 static int __init parse_tag_mem(const bp_tag_t *tag) 109 { 110 meminfo_t *mi = (meminfo_t*)(tag->data); 111 112 if (mi->type != MEMORY_TYPE_CONVENTIONAL) 113 return -1; 114 115 if (sysmem.nr_banks >= SYSMEM_BANKS_MAX) { 116 printk(KERN_WARNING 117 "Ignoring memory bank 0x%08lx size %ldKB\n", 118 (unsigned long)mi->start, 119 (unsigned long)mi->end - (unsigned long)mi->start); 120 return -EINVAL; 121 } 122 sysmem.bank[sysmem.nr_banks].type = mi->type; 123 sysmem.bank[sysmem.nr_banks].start = PAGE_ALIGN(mi->start); 124 sysmem.bank[sysmem.nr_banks].end = mi->end & PAGE_SIZE; 125 sysmem.nr_banks++; 126 127 return 0; 128 } 129 130 __tagtable(BP_TAG_MEMORY, parse_tag_mem); 131 132 #ifdef CONFIG_BLK_DEV_INITRD 133 134 static int __init parse_tag_initrd(const bp_tag_t* tag) 135 { 136 meminfo_t* mi; 137 mi = (meminfo_t*)(tag->data); 138 initrd_start = (void*)(mi->start); 139 initrd_end = (void*)(mi->end); 140 141 return 0; 142 } 143 144 __tagtable(BP_TAG_INITRD, parse_tag_initrd); 145 146 #endif /* CONFIG_BLK_DEV_INITRD */ 147 148 static int __init parse_tag_cmdline(const bp_tag_t* tag) 149 { 150 strncpy(command_line, (char*)(tag->data), COMMAND_LINE_SIZE); 151 command_line[COMMAND_LINE_SIZE - 1] = '\0'; 152 return 0; 153 } 154 155 __tagtable(BP_TAG_COMMAND_LINE, parse_tag_cmdline); 156 157 static int __init parse_bootparam(const bp_tag_t* tag) 158 { 159 extern tagtable_t __tagtable_begin, __tagtable_end; 160 tagtable_t *t; 161 162 /* Boot parameters must start with a BP_TAG_FIRST tag. */ 163 164 if (tag->id != BP_TAG_FIRST) { 165 printk(KERN_WARNING "Invalid boot parameters!\n"); 166 return 0; 167 } 168 169 tag = (bp_tag_t*)((unsigned long)tag + sizeof(bp_tag_t) + tag->size); 170 171 /* Parse all tags. */ 172 173 while (tag != NULL && tag->id != BP_TAG_LAST) { 174 for (t = &__tagtable_begin; t < &__tagtable_end; t++) { 175 if (tag->id == t->tag) { 176 t->parse(tag); 177 break; 178 } 179 } 180 if (t == &__tagtable_end) 181 printk(KERN_WARNING "Ignoring tag " 182 "0x%08x\n", tag->id); 183 tag = (bp_tag_t*)((unsigned long)(tag + 1) + tag->size); 184 } 185 186 return 0; 187 } 188 189 /* 190 * Initialize architecture. (Early stage) 191 */ 192 193 void __init init_arch(bp_tag_t *bp_start) 194 { 195 196 #ifdef CONFIG_BLK_DEV_INITRD 197 initrd_start = &__initrd_start; 198 initrd_end = &__initrd_end; 199 #endif 200 201 sysmem.nr_banks = 0; 202 203 #ifdef CONFIG_CMDLINE_BOOL 204 strcpy(command_line, default_command_line); 205 #endif 206 207 /* Parse boot parameters */ 208 209 if (bp_start) 210 parse_bootparam(bp_start); 211 212 if (sysmem.nr_banks == 0) { 213 sysmem.nr_banks = 1; 214 sysmem.bank[0].start = PLATFORM_DEFAULT_MEM_START; 215 sysmem.bank[0].end = PLATFORM_DEFAULT_MEM_START 216 + PLATFORM_DEFAULT_MEM_SIZE; 217 } 218 219 /* Early hook for platforms */ 220 221 platform_init(bp_start); 222 223 /* Initialize MMU. */ 224 225 init_mmu(); 226 } 227 228 /* 229 * Initialize system. Setup memory and reserve regions. 230 */ 231 232 extern char _end; 233 extern char _stext; 234 extern char _WindowVectors_text_start; 235 extern char _WindowVectors_text_end; 236 extern char _DebugInterruptVector_literal_start; 237 extern char _DebugInterruptVector_text_end; 238 extern char _KernelExceptionVector_literal_start; 239 extern char _KernelExceptionVector_text_end; 240 extern char _UserExceptionVector_literal_start; 241 extern char _UserExceptionVector_text_end; 242 extern char _DoubleExceptionVector_literal_start; 243 extern char _DoubleExceptionVector_text_end; 244 245 void __init setup_arch(char **cmdline_p) 246 { 247 extern int mem_reserve(unsigned long, unsigned long, int); 248 extern void bootmem_init(void); 249 250 memcpy(boot_command_line, command_line, COMMAND_LINE_SIZE); 251 boot_command_line[COMMAND_LINE_SIZE-1] = '\0'; 252 *cmdline_p = command_line; 253 254 /* Reserve some memory regions */ 255 256 #ifdef CONFIG_BLK_DEV_INITRD 257 if (initrd_start < initrd_end) { 258 initrd_is_mapped = mem_reserve(__pa(initrd_start), 259 __pa(initrd_end), 0); 260 initrd_below_start_ok = 1; 261 } else { 262 initrd_start = 0; 263 } 264 #endif 265 266 mem_reserve(__pa(&_stext),__pa(&_end), 1); 267 268 mem_reserve(__pa(&_WindowVectors_text_start), 269 __pa(&_WindowVectors_text_end), 0); 270 271 mem_reserve(__pa(&_DebugInterruptVector_literal_start), 272 __pa(&_DebugInterruptVector_text_end), 0); 273 274 mem_reserve(__pa(&_KernelExceptionVector_literal_start), 275 __pa(&_KernelExceptionVector_text_end), 0); 276 277 mem_reserve(__pa(&_UserExceptionVector_literal_start), 278 __pa(&_UserExceptionVector_text_end), 0); 279 280 mem_reserve(__pa(&_DoubleExceptionVector_literal_start), 281 __pa(&_DoubleExceptionVector_text_end), 0); 282 283 bootmem_init(); 284 285 platform_setup(cmdline_p); 286 287 288 paging_init(); 289 290 #ifdef CONFIG_VT 291 # if defined(CONFIG_VGA_CONSOLE) 292 conswitchp = &vga_con; 293 # elif defined(CONFIG_DUMMY_CONSOLE) 294 conswitchp = &dummy_con; 295 # endif 296 #endif 297 298 #ifdef CONFIG_PCI 299 platform_pcibios_init(); 300 #endif 301 } 302 303 void machine_restart(char * cmd) 304 { 305 platform_restart(); 306 } 307 308 void machine_halt(void) 309 { 310 platform_halt(); 311 while (1); 312 } 313 314 void machine_power_off(void) 315 { 316 platform_power_off(); 317 while (1); 318 } 319 #ifdef CONFIG_PROC_FS 320 321 /* 322 * Display some core information through /proc/cpuinfo. 323 */ 324 325 static int 326 c_show(struct seq_file *f, void *slot) 327 { 328 /* high-level stuff */ 329 seq_printf(f,"processor\t: 0\n" 330 "vendor_id\t: Tensilica\n" 331 "model\t\t: Xtensa " XCHAL_HW_VERSION_NAME "\n" 332 "core ID\t\t: " XCHAL_CORE_ID "\n" 333 "build ID\t: 0x%x\n" 334 "byte order\t: %s\n" 335 "cpu MHz\t\t: %lu.%02lu\n" 336 "bogomips\t: %lu.%02lu\n", 337 XCHAL_BUILD_UNIQUE_ID, 338 XCHAL_HAVE_BE ? "big" : "little", 339 CCOUNT_PER_JIFFY/(1000000/HZ), 340 (CCOUNT_PER_JIFFY/(10000/HZ)) % 100, 341 loops_per_jiffy/(500000/HZ), 342 (loops_per_jiffy/(5000/HZ)) % 100); 343 344 seq_printf(f,"flags\t\t: " 345 #if XCHAL_HAVE_NMI 346 "nmi " 347 #endif 348 #if XCHAL_HAVE_DEBUG 349 "debug " 350 # if XCHAL_HAVE_OCD 351 "ocd " 352 # endif 353 #endif 354 #if XCHAL_HAVE_DENSITY 355 "density " 356 #endif 357 #if XCHAL_HAVE_BOOLEANS 358 "boolean " 359 #endif 360 #if XCHAL_HAVE_LOOPS 361 "loop " 362 #endif 363 #if XCHAL_HAVE_NSA 364 "nsa " 365 #endif 366 #if XCHAL_HAVE_MINMAX 367 "minmax " 368 #endif 369 #if XCHAL_HAVE_SEXT 370 "sext " 371 #endif 372 #if XCHAL_HAVE_CLAMPS 373 "clamps " 374 #endif 375 #if XCHAL_HAVE_MAC16 376 "mac16 " 377 #endif 378 #if XCHAL_HAVE_MUL16 379 "mul16 " 380 #endif 381 #if XCHAL_HAVE_MUL32 382 "mul32 " 383 #endif 384 #if XCHAL_HAVE_MUL32_HIGH 385 "mul32h " 386 #endif 387 #if XCHAL_HAVE_FP 388 "fpu " 389 #endif 390 "\n"); 391 392 /* Registers. */ 393 seq_printf(f,"physical aregs\t: %d\n" 394 "misc regs\t: %d\n" 395 "ibreak\t\t: %d\n" 396 "dbreak\t\t: %d\n", 397 XCHAL_NUM_AREGS, 398 XCHAL_NUM_MISC_REGS, 399 XCHAL_NUM_IBREAK, 400 XCHAL_NUM_DBREAK); 401 402 403 /* Interrupt. */ 404 seq_printf(f,"num ints\t: %d\n" 405 "ext ints\t: %d\n" 406 "int levels\t: %d\n" 407 "timers\t\t: %d\n" 408 "debug level\t: %d\n", 409 XCHAL_NUM_INTERRUPTS, 410 XCHAL_NUM_EXTINTERRUPTS, 411 XCHAL_NUM_INTLEVELS, 412 XCHAL_NUM_TIMERS, 413 XCHAL_DEBUGLEVEL); 414 415 /* Cache */ 416 seq_printf(f,"icache line size: %d\n" 417 "icache ways\t: %d\n" 418 "icache size\t: %d\n" 419 "icache flags\t: " 420 #if XCHAL_ICACHE_LINE_LOCKABLE 421 "lock" 422 #endif 423 "\n" 424 "dcache line size: %d\n" 425 "dcache ways\t: %d\n" 426 "dcache size\t: %d\n" 427 "dcache flags\t: " 428 #if XCHAL_DCACHE_IS_WRITEBACK 429 "writeback" 430 #endif 431 #if XCHAL_DCACHE_LINE_LOCKABLE 432 "lock" 433 #endif 434 "\n", 435 XCHAL_ICACHE_LINESIZE, 436 XCHAL_ICACHE_WAYS, 437 XCHAL_ICACHE_SIZE, 438 XCHAL_DCACHE_LINESIZE, 439 XCHAL_DCACHE_WAYS, 440 XCHAL_DCACHE_SIZE); 441 442 return 0; 443 } 444 445 /* 446 * We show only CPU #0 info. 447 */ 448 static void * 449 c_start(struct seq_file *f, loff_t *pos) 450 { 451 return (void *) ((*pos == 0) ? (void *)1 : NULL); 452 } 453 454 static void * 455 c_next(struct seq_file *f, void *v, loff_t *pos) 456 { 457 return NULL; 458 } 459 460 static void 461 c_stop(struct seq_file *f, void *v) 462 { 463 } 464 465 const struct seq_operations cpuinfo_op = 466 { 467 start: c_start, 468 next: c_next, 469 stop: c_stop, 470 show: c_show 471 }; 472 473 #endif /* CONFIG_PROC_FS */ 474 475